target-arm: Properly support EL2 and EL3 in arm_el_is_aa64()
commit446c81abf8e0572b8d5d23fe056516ac62af278d
authorPeter Maydell <peter.maydell@linaro.org>
Thu, 21 Jan 2016 14:15:08 +0000 (21 14:15 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 21 Jan 2016 14:15:08 +0000 (21 14:15 +0000)
tree4026e3f4d9c98d3ca6b32c05d3d31a2590010927
parent3355c360534321f81d25afb1aeaab15ab6e43be8
target-arm: Properly support EL2 and EL3 in arm_el_is_aa64()

Support EL2 and EL3 in arm_el_is_aa64() by implementing the
logic for checking the SCR_EL3 and HCR_EL2 register-width bits
as appropriate to determine the register width of lower exception
levels.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
target-arm/cpu.h