hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU<N>_PWRCTRL register block
commit4239b311467bea86578d9da3cd22909de69d7af7
authorPeter Maydell <peter.maydell@linaro.org>
Fri, 19 Feb 2021 14:45:53 +0000 (19 14:45 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 8 Mar 2021 17:20:02 +0000 (8 17:20 +0000)
tree08cda6fa9220594cedb44f70909324b1bf09bf79
parent370d75d935c4f58a3f94597a9e6609aefbc5bb34
hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU<N>_PWRCTRL register block

The SSE-300 has a new register block CPU<N>_PWRCTRL.  There is one
instance of this per CPU in the system (so just one for the SSE-300),
and as well as the usual CIDR/PIDR ID registers it has just one
register, CPUPWRCFG.  This register allows the guest to configure
behaviour of the system in power-down and deep-sleep states.  Since
QEMU does not model those, we make the register a dummy
reads-as-written implementation.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210219144617.4782-21-peter.maydell@linaro.org
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hw/arm/Kconfig
hw/misc/Kconfig
hw/misc/armsse-cpu-pwrctrl.c [new file with mode: 0644]
hw/misc/meson.build
hw/misc/trace-events
include/hw/misc/armsse-cpu-pwrctrl.h [new file with mode: 0644]