| commit | 41c4fb94aa8a6a16bd107687cd3b5204c68a4042 | |
| author | Eric Auger <eric.auger@redhat.com> | |
| Fri, 15 Mar 2019 11:12:28 +0000 (15 11:12 +0000) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 15 Mar 2019 11:12:28 +0000 (15 11:12 +0000) | ||
| tree | 31ea1bbdf090ebe1cdbcbbd034e612f01af165cf | treesnapshot (tar.gz zip) |
| parent | 67d80321f26d9ea2b623ffac567a2f758ceae037 | commitdiff |
hw/arm/virt-acpi-build: Fix SMMUv3 GSIV values
The GSIV numbers of the SPI based interrupts is not correct as
ARM_SPI_BASE was not added to the irqmap[VIRT_SMMU] value. So
this may collide with VIRTIO_MMIO irq window.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20190312091031.5185-1-eric.auger@redhat.com
Reviewed-by: Shannon Zhao <shannon.zhaosl@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The GSIV numbers of the SPI based interrupts is not correct as
ARM_SPI_BASE was not added to the irqmap[VIRT_SMMU] value. So
this may collide with VIRTIO_MMIO irq window.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20190312091031.5185-1-eric.auger@redhat.com
Reviewed-by: Shannon Zhao <shannon.zhaosl@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/arm/virt-acpi-build.c | diffblobblamehistory |