| commit | 3ea728d0c87011845666caedc582eaa9629797db | |
| author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | |
| Mon, 3 Jun 2013 16:17:41 +0000 (3 17:17 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Mon, 3 Jun 2013 16:17:41 +0000 (3 17:17 +0100) | ||
| tree | 4695dbd7e397536779b3372ef363189ee497dcc0 | treesnapshot (tar.gz zip) |
| parent | 87920b44a1e04a45bf74ee0a88a2dfa51c65acdb | commitdiff |
xilinx_spips: Inhibit interrupts in LQSPI mode
The real hardware does not produce interrupts in LQSPI mode. Inhibit
generation of interrupts when the LQ_MODE bit is set.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: dff794a06872009ea7e5733ce6adcff94d18bbd0.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The real hardware does not produce interrupts in LQSPI mode. Inhibit
generation of interrupts when the LQ_MODE bit is set.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: dff794a06872009ea7e5733ce6adcff94d18bbd0.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/ssi/xilinx_spips.c | diffblobblamehistory |