| commit | 3d304620ec6c95f31db17acc132f42f243369299 | |
| author | Paolo Bonzini <pbonzini@redhat.com> | |
| Sat, 7 Jan 2023 17:14:20 +0000 (7 18:14 +0100) | ||
| committer | Paolo Bonzini <pbonzini@redhat.com> | |
| Wed, 11 Jan 2023 09:44:35 +0000 (11 10:44 +0100) | ||
| tree | 16d0b49a1e975a5874525d7432fc0adda78487b2 | treesnapshot (tar.gz zip) |
| parent | 8d5666d76b0a2b0f852e51412c79c3d3d8c90801 | commitdiff |
target/i386: fix operand size of unary SSE operations
VRCPSS, VRSQRTSS and VCVTSx2Sx have a 32-bit or 64-bit memory operand,
which is represented in the decoding tables by X86_VEX_REPScalar. Add it
to the tables, and make validate_vex() handle the case of an instruction
that is in exception type 4 without the REP prefix and exception type 5
with it; this is the cas of VRCP and VRSQRT.
Reported-by: yongwoo <https://gitlab.com/yongwoo36>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1377
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
VRCPSS, VRSQRTSS and VCVTSx2Sx have a 32-bit or 64-bit memory operand,
which is represented in the decoding tables by X86_VEX_REPScalar. Add it
to the tables, and make validate_vex() handle the case of an instruction
that is in exception type 4 without the REP prefix and exception type 5
with it; this is the cas of VRCP and VRSQRT.
Reported-by: yongwoo <https://gitlab.com/yongwoo36>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1377
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| target/i386/tcg/decode-new.c.inc | diffblobblamehistory |