| commit | 3a95f572112ab4c789d66af666644adcdb2b45a6 | |
| author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | |
| Thu, 15 Feb 2024 15:52:06 +0000 (15 15:52 +0000) | ||
| committer | Michael S. Tsirkin <mst@redhat.com> | |
| Tue, 12 Mar 2024 21:56:55 +0000 (12 17:56 -0400) | ||
| tree | c6de0405e26845c5192350e02ad3d5d6fe890d2f | treesnapshot (tar.gz zip) |
| parent | a8516e5c9719cf45fd81d6790bc9ffdcf753376b | commitdiff |
hw/pci-bridge/pxb-cxl: Drop RAS capability from host bridge.
This CXL component isn't allowed to have a RAS capability.
Whilst this should be harmless as software is not expected to look
here, good to clean it up.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20240215155206.2736-1-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This CXL component isn't allowed to have a RAS capability.
Whilst this should be harmless as software is not expected to look
here, good to clean it up.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20240215155206.2736-1-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| hw/cxl/cxl-component-utils.c | diffblobblamehistory | |
| hw/pci-bridge/pci_expander_bridge.c | diffblobblamehistory | |
| include/hw/cxl/cxl_component.h | diffblobblamehistory |