target-arm: Correct "preferred return address" for cpreg access exceptions
commit3977ee5d7a9f2e3664dd8b233f3224694e23b62b
authorPeter Maydell <peter.maydell@linaro.org>
Mon, 15 Jun 2015 17:06:11 +0000 (15 18:06 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 15 Jun 2015 17:06:11 +0000 (15 18:06 +0100)
tree3ba600a3235d2c28eb62f1a7f46d4dd84964fa26
parent63a183ed0eac2956574745c84faffa042d99afb8
target-arm: Correct "preferred return address" for cpreg access exceptions

The architecture defines that when taking an exception trying to
access a coprocessor register, the "preferred return address" for
the exception is the address of the instruction that caused the
exception. Correct an off-by-4 error which meant we were returning
the address after the instruction for traps which happened because
of a failure of a runtime access-check function on an AArch32
register. (Traps caused by translate-time checkable permissions
failures had the correct address, as did traps on AArch64 registers.)

This fixes https://bugs.launchpad.net/qemu/+bug/1463338

Reported-by: Robert Buhren <robert@robertbuhren.de>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1433861440-30133-1-git-send-email-peter.maydell@linaro.org
target-arm/translate.c