| commit | 38e65936a8df1c9e7f5d19eae38a42133fab844b | |
| author | Paolo Bonzini <pbonzini@redhat.com> | |
| Wed, 30 Nov 2022 14:16:57 +0000 (30 15:16 +0100) | ||
| committer | Paolo Bonzini <pbonzini@redhat.com> | |
| Thu, 1 Dec 2022 08:05:05 +0000 (1 09:05 +0100) | ||
| tree | ad40919079514fdb618aefdb08bb0a03da0bf8cf | treesnapshot (tar.gz zip) |
| parent | 7c09a7f6ae1770d15535980d15dffdb23f4d9786 | commitdiff |
target/i386: allow MMX instructions with CR4.OSFXSR=0
MMX state is saved/restored by FSAVE/FRSTOR so the instructions are
not illegal opcodes even if CR4.OSFXSR=0. Make sure that validate_vex
takes into account the prefix and only checks HF_OSFXSR_MASK in the
presence of an SSE instruction.
Fixes: 20581aadec5e ("target/i386: validate VEX prefixes via the instructions' exception classes", 2022-10-18)
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1350
Reported-by: Helge Konetzka (@hejko on gitlab.com)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
MMX state is saved/restored by FSAVE/FRSTOR so the instructions are
not illegal opcodes even if CR4.OSFXSR=0. Make sure that validate_vex
takes into account the prefix and only checks HF_OSFXSR_MASK in the
presence of an SSE instruction.
Fixes: 20581aadec5e ("target/i386: validate VEX prefixes via the instructions' exception classes", 2022-10-18)
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1350
Reported-by: Helge Konetzka (@hejko on gitlab.com)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| target/i386/tcg/decode-new.c.inc | diffblobblamehistory |