| commit | 3580ecad0acf25a28464c145f2c74a929d0e57b1 | |
| author | Max Filippov <jcmvbkbc@gmail.com> | |
| Mon, 5 Sep 2011 23:55:35 +0000 (6 03:55 +0400) | ||
| committer | Blue Swirl <blauwirbel@gmail.com> | |
| Sat, 10 Sep 2011 16:57:38 +0000 (10 16:57 +0000) | ||
| tree | a608720eeb1e6e6dfb289682b91781d803bcad20 | treesnapshot (tar.gz zip) |
| parent | b8132eff891bce658b799df20748a1cb39f4dc06 | commitdiff |
target-xtensa: implement shifts (ST1 and RST1 groups)
- ST1: SAR (shift amount special register) manipulation, NSA(U);
- RST1: shifts, 16-bit multiplication.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
- ST1: SAR (shift amount special register) manipulation, NSA(U);
- RST1: shifts, 16-bit multiplication.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| target-xtensa/cpu.h | diffblobblamehistory | |
| target-xtensa/helpers.h | diffblobblamehistory | |
| target-xtensa/op_helper.c | diffblobblamehistory | |
| target-xtensa/translate.c | diffblobblamehistory |