| commit | 339cd2a82aca031370cd71b1118a5565dc2af0a9 | |
| author | Leon Alrae <leon.alrae@imgtec.com> | |
| Fri, 11 Jul 2014 15:11:33 +0000 (11 16:11 +0100) | ||
| committer | Leon Alrae <leon.alrae@imgtec.com> | |
| Mon, 3 Nov 2014 11:48:34 +0000 (3 11:48 +0000) | ||
| tree | d17b67cee2ea8d66d248e463f287a4a802a41126 | treesnapshot (tar.gz zip) |
| parent | faf1f68ba11c919191dd7a5f32cfd0b6401c4827 | commitdiff |
target-mips: implement forbidden slot
When conditional compact branch is encountered decode one more instruction in
current translation block - that will be forbidden slot. Instruction in
forbidden slot will be executed only if conditional compact branch is not taken.
Any control transfer instruction (CTI) which are branches, jumps, ERET,
DERET, WAIT and PAUSE will generate RI exception if executed in forbidden or
delay slot.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
When conditional compact branch is encountered decode one more instruction in
current translation block - that will be forbidden slot. Instruction in
forbidden slot will be executed only if conditional compact branch is not taken.
Any control transfer instruction (CTI) which are branches, jumps, ERET,
DERET, WAIT and PAUSE will generate RI exception if executed in forbidden or
delay slot.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
| target-mips/cpu.h | diffblobblamehistory | |
| target-mips/translate.c | diffblobblamehistory |