| commit | 330ef14e6e749919c5c70e9fd6f73aaeac8a15ae | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 16 Apr 2021 10:40:10 +0000 (16 11:40 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Sat, 17 Apr 2021 17:47:11 +0000 (17 18:47 +0100) | ||
| tree | b1ca451d9a9a24e62c368ea65d598363544a6995 | treesnapshot (tar.gz zip) |
| parent | 1df0878cff267128393b0076da4a96467ac04094 | commitdiff |
hw/arm/armsse: Make SSE-300 use Cortex-M55
The SSE-300 has a Cortex-M55 (which was the whole reason for us
modelling it), but we forgot to actually update the code to let it
have a different CPU type from the IoTKit and SSE-200. Add CPU type
as a field for ARMSSEInfo instead of hardcoding it to always use a
Cortex-M33.
Buglink: https://bugs.launchpad.net/qemu/+bug/1923861
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210416104010.13228-1-peter.maydell@linaro.org
The SSE-300 has a Cortex-M55 (which was the whole reason for us
modelling it), but we forgot to actually update the code to let it
have a different CPU type from the IoTKit and SSE-200. Add CPU type
as a field for ARMSSEInfo instead of hardcoding it to always use a
Cortex-M33.
Buglink: https://bugs.launchpad.net/qemu/+bug/1923861
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210416104010.13228-1-peter.maydell@linaro.org
| hw/arm/armsse.c | diffblobblamehistory |