target/riscv: Merge m/vsstatus and m/vsstatush into one uint64_t unit
commit284d697c74ef3f4210cbccc5cd6b4894740e4ab3
authorYifei Jiang <jiangyifei@huawei.com>
Mon, 26 Oct 2020 11:55:25 +0000 (26 19:55 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Tue, 3 Nov 2020 15:17:23 +0000 (3 07:17 -0800)
tree77632a14686704370e95bc94f181117355332675
parent4e1e3003fbfbba38bd46d0fd3677b2d43b0a91e3
target/riscv: Merge m/vsstatus and m/vsstatush into one uint64_t unit

mstatus/mstatush and vsstatus/vsstatush are two halved for RISCV32.
This patch expands mstatus and vsstatus to uint64_t instead of
target_ulong so that it can be saved as one unit and reduce some
ifdefs in the code.

Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20201026115530.304-2-jiangyifei@huawei.com
target/riscv/cpu.c
target/riscv/cpu.h
target/riscv/cpu_bits.h
target/riscv/cpu_helper.c
target/riscv/csr.c
target/riscv/op_helper.c