| commit | 27d6dea3d702b4f9cefacfc8438a9478c03092e4 | |
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | |
| Mon, 4 May 2020 07:28:21 +0000 (4 09:28 +0200) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Mon, 11 May 2020 10:05:52 +0000 (11 11:05 +0100) | ||
| tree | a8b2a2aed46997ef9631814bebf364ff4d182896 | treesnapshot (tar.gz zip) |
| parent | 54595a5731ed7c94491008b0d3835ad3f786dbcc | commitdiff |
hw/timer/nrf51_timer: Display timer ID in trace events
The NRF51 series SoC have 3 timer peripherals, each having
4 counters. To help differentiate which peripheral is accessed,
display the timer ID in the trace events.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200504072822.18799-4-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The NRF51 series SoC have 3 timer peripherals, each having
4 counters. To help differentiate which peripheral is accessed,
display the timer ID in the trace events.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200504072822.18799-4-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/arm/nrf51_soc.c | diffblobblamehistory | |
| hw/timer/nrf51_timer.c | diffblobblamehistory | |
| hw/timer/trace-events | diffblobblamehistory | |
| include/hw/timer/nrf51_timer.h | diffblobblamehistory |