target/riscv: progressively load the instruction during decode
commit25139bf7f87a0d0e758d4198579a227ab551802a
authorAlex Bennée <alex.bennee@linaro.org>
Tue, 25 Feb 2020 12:47:05 +0000 (25 12:47 +0000)
committerAlex Bennée <alex.bennee@linaro.org>
Tue, 25 Feb 2020 20:20:23 +0000 (25 20:20 +0000)
tree8cbe5a4d09daf9cb4985b972a8e35c2347d86f8e
parented04c8b14c8bed6b8d940547ed237d309fca7dfc
target/riscv: progressively load the instruction during decode

The plugin system would throw up a harmless warning when it detected
that a disassembly of an instruction didn't use all it's bytes. Fix
the riscv decoder to only load the instruction bytes it needs as it
needs them.

This drops opcode from the ctx in favour if passing the appropriately
sized opcode down a few levels of the decode.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Robert Foley <robert.foley@linaro.org>
Message-Id: <20200225124710.14152-15-alex.bennee@linaro.org>
target/riscv/instmap.h
target/riscv/translate.c