target/openrisc: Tidy ppc/npc implementation
commit24c328521b19aff2559118809ddf0522d6dfaaea
authorRichard Henderson <rth@twiddle.net>
Tue, 5 Apr 2016 18:41:48 +0000 (5 11:41 -0700)
committerRichard Henderson <rth@twiddle.net>
Mon, 13 Feb 2017 21:15:00 +0000 (14 08:15 +1100)
treed8bd63c5a682fbc3aeb9d019195059928c482477
parenta8000cb480c8cfb612b039bf0382c41b9d6c7d45
target/openrisc: Tidy ppc/npc implementation

The NPC SPR is really only supposed to be used for FPGA debugging.
It contains the same contents as PC, unless one plays games.  Follow
the or1ksim implementation in flushing delayed branch state when it
is changed.

The PPC SPR need not be updated every instruction, merely when we
exit the TB or attempt to read its contents.

Signed-off-by: Richard Henderson <rth@twiddle.net>
target/openrisc/cpu.h
target/openrisc/gdbstub.c
target/openrisc/interrupt_helper.c
target/openrisc/machine.c
target/openrisc/sys_helper.c
target/openrisc/translate.c