target/mips: Support R5900 three-operand MULT and MULTU instructions
commit21e8e8b230af38b6bd8c953fa5f31e4a5a128e1c
authorFredrik Noring <noring@nocrew.org>
Sun, 21 Oct 2018 15:38:21 +0000 (21 17:38 +0200)
committerAleksandar Markovic <amarkovic@wavecomp.com>
Wed, 24 Oct 2018 13:20:31 +0000 (24 15:20 +0200)
tree2c9b702bb8e4464bbc221727329bcdf6c783282a
parentec1944fc8eb862d48a0c74671105ce13acbc9c9e
target/mips: Support R5900 three-operand MULT and MULTU instructions

The three-operand MULT and MULTU are the only R5900-specific
instructions emitted by GCC 7.3. The R5900 also implements the three-
operand MADD and MADDU instructions, but they are omitted in QEMU for
now since they are absent in programs compiled by current GCC versions.

Likewise, the R5900-specific pipeline 1 instruction variants MULT1,
MULTU1, DIV1, DIVU1, MADD1, MADDU1, MFHI1, MFLO1, MTHI1 and MTLO1
are omitted here as well.

Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
target/mips/translate.c