| commit | 1ea8a6f59b8d6dbcc5d0aa59380ae45a18231b88 | |
| author | Mostafa Saleh <smostafa@google.com> | |
| Mon, 15 Jul 2024 08:45:12 +0000 (15 08:45 +0000) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Thu, 18 Jul 2024 12:49:29 +0000 (18 13:49 +0100) | ||
| tree | d9f2fa31801fa1ef2a419643225e229ed103c909 | treesnapshot (tar.gz zip) |
| parent | f42a0a57c0a22210456e83676f43e88782e43942 | commitdiff |
hw/arm/smmu: Support nesting in smmuv3_range_inval()
With nesting, we would need to invalidate IPAs without
over-invalidating stage-1 IOVAs. This can be done by
distinguishing IPAs in the TLBs by having ASID=-1.
To achieve that, rework the invalidation for IPAs to have a
separate function, while for IOVA invalidation ASID=-1 means
invalidate for all ASIDs.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Mostafa Saleh <smostafa@google.com>
Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20240715084519.1189624-13-smostafa@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
With nesting, we would need to invalidate IPAs without
over-invalidating stage-1 IOVAs. This can be done by
distinguishing IPAs in the TLBs by having ASID=-1.
To achieve that, rework the invalidation for IPAs to have a
separate function, while for IOVA invalidation ASID=-1 means
invalidate for all ASIDs.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Mostafa Saleh <smostafa@google.com>
Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20240715084519.1189624-13-smostafa@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/arm/smmu-common.c | diffblobblamehistory | |
| hw/arm/smmuv3.c | diffblobblamehistory | |
| hw/arm/trace-events | diffblobblamehistory | |
| include/hw/arm/smmu-common.h | diffblobblamehistory |