target/riscv: Don't force update priv spec version to latest
commit188000952ca002402e41efe0a0d333097024dd90
authorAnup Patel <apatel@ventanamicro.com>
Sat, 11 Jun 2022 08:01:04 +0000 (11 13:31 +0530)
committerAlistair Francis <alistair@alistair23.me>
Sun, 3 Jul 2022 00:03:20 +0000 (3 10:03 +1000)
tree70fa910923b57c2eb62c94155a68691404114801
parentbe2265c776a67287cea03908495cf1e785271c6f
target/riscv: Don't force update priv spec version to latest

The riscv_cpu_realize() sets priv spec version to v1.12 when it is
when "env->priv_ver == 0" (i.e. default v1.10) because the enum
value of priv spec v1.10 is zero.

Due to above issue, the sifive_u machine will see priv spec v1.12
instead of priv spec v1.10.

To fix this issue, we set latest priv spec version (i.e. v1.12)
for base rv64/rv32 cpu and riscv_cpu_realize() will override priv
spec version only when "cpu->cfg.priv_spec != NULL".

Fixes: 7100fe6c2441 ("target/riscv: Enable privileged spec version 1.12")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-Id: <20220611080107.391981-2-apatel@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c