hw/misc/stm32l4x5_rcc: Initialize PLLs and clock multiplexers
commit141c29a23bb8eb63c04199a2c3653195ca14f76a
authorArnaud Minier <arnaud.minier@telecom-paris.fr>
Sun, 3 Mar 2024 14:06:39 +0000 (3 15:06 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 5 Mar 2024 13:22:56 +0000 (5 13:22 +0000)
treee389a06a18761c4c274b3f747fd7fdf02c0827f7
parent6487653efd54ea16c9fa39f0f7a648f27bc2c548
hw/misc/stm32l4x5_rcc: Initialize PLLs and clock multiplexers

Instantiate the whole clock tree and using the Clock multiplexers and
the PLLs defined in the previous commits. This allows to statically
define the clock tree and easily follow the clock signal from one end to
another.

Also handle three-phase reset now that we have defined a known base
state for every object.
(Reset handling based on hw/misc/zynq_sclr.c)

Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
Message-id: 20240303140643.81957-5-arnaud.minier@telecom-paris.fr
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
hw/misc/stm32l4x5_rcc.c
include/hw/misc/stm32l4x5_rcc_internals.h