| commit | 10e60b35d04359fba1d759925018204527a1b9f5 | |
| author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | |
| Mon, 3 Jun 2013 16:17:42 +0000 (3 17:17 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Mon, 3 Jun 2013 16:17:42 +0000 (3 17:17 +0100) | ||
| tree | 83677544f79eaad691a9cb1ba4f101ffc639b388 | treesnapshot (tar.gz zip) |
| parent | abef5fa6438d654de59dfa083166f41a4067f6b7 | commitdiff |
xilinx_spips: Fix QSPI FIFO size
QSPI has a bigger FIFO than the regular SPI controller. Differentiate
between the two with correct FIFO sizes for each.
This is the first piece of class data for SPIPS, so this patch sees
the creation of the XilinxSPIPSClass definition and assoicated QOM
constructs.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: acee25dd5e203215cbc15ca5d3cb5d5b2efebe7b.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
QSPI has a bigger FIFO than the regular SPI controller. Differentiate
between the two with correct FIFO sizes for each.
This is the first piece of class data for SPIPS, so this patch sees
the creation of the XilinxSPIPSClass definition and assoicated QOM
constructs.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: acee25dd5e203215cbc15ca5d3cb5d5b2efebe7b.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/ssi/xilinx_spips.c | diffblobblamehistory |