| commit | 0ae0326b984e77a55c224b7863071bd3d8951231 | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Thu, 10 Sep 2020 17:38:51 +0000 (10 18:38 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Thu, 1 Oct 2020 14:31:00 +0000 (1 15:31 +0100) | ||
| tree | 2ec89f8faee13ce2fea173cb596ce4a0b3a1d2d5 | treesnapshot (tar.gz zip) |
| parent | 37a712a0f969ca2df7f01182409a6c4825cebfb5 | commitdiff |
target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check
The ARM_FEATURE_PXN bit indicates whether the CPU supports the PXN
bit in short-descriptor translation table format descriptors. This
is indicated by ID_MMFR0.VMSA being at least 0b0100. Replace the
feature bit with an ID register check, in line with our preference
for ID register checks over feature bits.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200910173855.4068-2-peter.maydell@linaro.org
The ARM_FEATURE_PXN bit indicates whether the CPU supports the PXN
bit in short-descriptor translation table format descriptors. This
is indicated by ID_MMFR0.VMSA being at least 0b0100. Replace the
feature bit with an ID register check, in line with our preference
for ID register checks over feature bits.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200910173855.4068-2-peter.maydell@linaro.org
| target/arm/cpu.c | diffblobblamehistory | |
| target/arm/cpu.h | diffblobblamehistory | |
| target/arm/helper.c | diffblobblamehistory |