target-tricore: Add instructions of RRR opcode format
commit0953225588ee30de2e92485331ad1bb3d7c7d089
authorBastian Koppelmann <kbastian@mail.uni-paderborn.de>
Mon, 19 Jan 2015 15:43:07 +0000 (19 15:43 +0000)
committerBastian Koppelmann <kbastian@mail.uni-paderborn.de>
Tue, 27 Jan 2015 11:48:02 +0000 (27 11:48 +0000)
treedc174613fe64f12f8c704c4c5de9f1e79f131957
parent8fb9d0eb68376363553d81525cc526842543e2dc
target-tricore: Add instructions of RRR opcode format

Add microcode generator function gen_cond_sub.

Add helper functions:
    * ixmax/ixmin: search for the max/min value and its related index in a
                   vector of 16-bit values.
    * pack: dack two data registers into an IEEE-754 single precision floating
            point format number.
    * dvadj: divide-adjust the result after dvstep instructions.
    * dvstep: divide a reg by a divisor, producing 8-bits of quotient at a time.

OPCM_32_RRR_FLOAT -> OPCM_32_RRR_DIVIDE

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
target-tricore/helper.h
target-tricore/op_helper.c
target-tricore/translate.c
target-tricore/tricore-opcodes.h