| commit | 085bb5bb64069a16b843fca840f91cdfb3f40fda | |
| author | Aurelien Jarno <aurelien@aurel32.net> | |
| Wed, 6 Nov 2013 18:51:21 +0000 (6 19:51 +0100) | ||
| committer | Richard Henderson <rth@twiddle.net> | |
| Sat, 25 Jan 2014 23:19:19 +0000 (25 15:19 -0800) | ||
| tree | bdb7fc514599ac98f8c0b189c46543498e31d091 | treesnapshot (tar.gz zip) |
| parent | 2a1137753f9618283ac40394a75976d18f608e39 | commitdiff |
tcg/i386: use movbe instruction in qemu_ldst routines
The movbe instruction has been added on some Intel Atom CPUs and on
recent Intel Haswell CPUs. It allows to load/store a value and at the
same time bswap it.
This patch detects the avaibility of this instruction and when available
use it in the qemu load/store routines in replacement of load/store +
bswap. Note that for 16-bit unsigned loads, movbe + movzw is basically the
same as movzw + bswap, so the patch doesn't touch this case.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
[RTH: Reduced the number of conditionals using "movop".]
Signed-off-by: Richard Henderson <rth@twiddle.net>
The movbe instruction has been added on some Intel Atom CPUs and on
recent Intel Haswell CPUs. It allows to load/store a value and at the
same time bswap it.
This patch detects the avaibility of this instruction and when available
use it in the qemu load/store routines in replacement of load/store +
bswap. Note that for 16-bit unsigned loads, movbe + movzw is basically the
same as movzw + bswap, so the patch doesn't touch this case.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
[RTH: Reduced the number of conditionals using "movop".]
Signed-off-by: Richard Henderson <rth@twiddle.net>
| tcg/i386/tcg-target.c | diffblobblamehistory |