target-arm: Abstract out load/store from a vaddr in AArch32
commit08307563ff6cf8cb8d2a7927804dfc5c7dbe86d6
authorPeter Maydell <peter.maydell@linaro.org>
Tue, 3 Sep 2013 19:12:02 +0000 (3 20:12 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 10 Sep 2013 18:11:27 +0000 (10 19:11 +0100)
treefc78888c87914b5f2c714a705a4ea65ac1738d6c
parent4d017979aa1672b40ccc083daf455f8740eead82
target-arm: Abstract out load/store from a vaddr in AArch32

AArch32 code (ie traditional 32 bit world) expects to be
able to pass a vaddr in a TCGv_i32. However when QEMU is
compiled with TARGET_LONG_BITS=32 the TCG load/store
functions take a TCGv_i64. Abstract out load/store with
a 32 bit vaddr so we have a place to put the zero extension
of the vaddr and the extension/truncation of the data value.

Apart from the function definitions most of this patch is
a simple s/tcg_gen_qemu_/gen_aa32_/.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-3-git-send-email-peter.maydell@linaro.org
target-arm/translate.c