4 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
23 #include "hw/qdev-core.h"
24 #include "disas/dis-asm.h"
25 #include "exec/hwaddr.h"
26 #include "exec/memattrs.h"
27 #include "qapi/qapi-types-run-state.h"
28 #include "qemu/bitmap.h"
29 #include "qemu/rcu_queue.h"
30 #include "qemu/queue.h"
31 #include "qemu/thread.h"
32 #include "qemu/plugin.h"
33 #include "qom/object.h"
35 typedef int (*WriteCoreDumpFunction
)(const void *buf
, size_t size
,
40 * Type wide enough to contain any #target_ulong virtual address.
42 typedef uint64_t vaddr
;
43 #define VADDR_PRId PRId64
44 #define VADDR_PRIu PRIu64
45 #define VADDR_PRIo PRIo64
46 #define VADDR_PRIx PRIx64
47 #define VADDR_PRIX PRIX64
48 #define VADDR_MAX UINT64_MAX
52 * @section_id: QEMU-cpu
54 * @short_description: Base class for all CPUs
57 #define TYPE_CPU "cpu"
59 /* Since this macro is used a lot in hot code paths and in conjunction with
60 * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
63 #define CPU(obj) ((CPUState *)(obj))
65 typedef struct CPUClass CPUClass
;
66 DECLARE_CLASS_CHECKERS(CPUClass
, CPU
,
69 typedef enum MMUAccessType
{
75 typedef struct CPUWatchpoint CPUWatchpoint
;
77 /* see tcg-cpu-ops.h */
85 * @class_by_name: Callback to map -cpu command line model name to an
86 * instantiatable CPU type.
87 * @parse_features: Callback to parse command line arguments.
88 * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
89 * @has_work: Callback for checking if there is work to do.
90 * @virtio_is_big_endian: Callback to return %true if a CPU which supports
91 * runtime configurable endianness is currently big-endian. Non-configurable
92 * CPUs can use the default implementation of this method. This method should
93 * not be used by any callers other than the pre-1.0 virtio devices.
94 * @memory_rw_debug: Callback for GDB memory access.
95 * @dump_state: Callback for dumping state.
96 * @dump_statistics: Callback for dumping statistics.
97 * @get_arch_id: Callback for getting architecture-dependent CPU ID.
98 * @get_paging_enabled: Callback for inquiring whether paging is enabled.
99 * @get_memory_mapping: Callback for obtaining the memory mappings.
100 * @set_pc: Callback for setting the Program Counter register. This
101 * should have the semantics used by the target architecture when
102 * setting the PC from a source such as an ELF file entry point;
103 * for example on Arm it will also set the Thumb mode bit based
104 * on the least significant bit of the new PC value.
105 * If the target behaviour here is anything other than "set
106 * the PC register to the value passed in" then the target must
107 * also implement the synchronize_from_tb hook.
108 * @get_phys_page_debug: Callback for obtaining a physical address.
109 * @get_phys_page_attrs_debug: Callback for obtaining a physical address and the
110 * associated memory transaction attributes to use for the access.
111 * CPUs which use memory transaction attributes should implement this
112 * instead of get_phys_page_debug.
113 * @asidx_from_attrs: Callback to return the CPU AddressSpace to use for
114 * a memory access with the specified memory transaction attributes.
115 * @gdb_read_register: Callback for letting GDB read a register.
116 * @gdb_write_register: Callback for letting GDB write a register.
117 * @write_elf64_note: Callback for writing a CPU-specific ELF note to a
118 * 64-bit VM coredump.
119 * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
120 * note to a 32-bit VM coredump.
121 * @write_elf32_note: Callback for writing a CPU-specific ELF note to a
122 * 32-bit VM coredump.
123 * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
124 * note to a 32-bit VM coredump.
125 * @vmsd: State description for migration.
126 * @gdb_num_core_regs: Number of core registers accessible to GDB.
127 * @gdb_core_xml_file: File name for core registers GDB XML description.
128 * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
129 * before the insn which triggers a watchpoint rather than after it.
130 * @gdb_arch_name: Optional callback that returns the architecture name known
131 * to GDB. The caller must free the returned string with g_free.
132 * @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the
133 * gdb stub. Returns a pointer to the XML contents for the specified XML file
134 * or NULL if the CPU doesn't have a dynamically generated content for it.
135 * @disas_set_info: Setup architecture specific components of disassembly info
136 * @adjust_watchpoint_address: Perform a target-specific adjustment to an
137 * address before attempting to match it against watchpoints.
138 * @deprecation_note: If this CPUClass is deprecated, this field provides
139 * related information.
141 * Represents a CPU family or model.
145 DeviceClass parent_class
;
148 ObjectClass
*(*class_by_name
)(const char *cpu_model
);
149 void (*parse_features
)(const char *typename
, char *str
, Error
**errp
);
151 int reset_dump_flags
;
152 bool (*has_work
)(CPUState
*cpu
);
153 bool (*virtio_is_big_endian
)(CPUState
*cpu
);
154 int (*memory_rw_debug
)(CPUState
*cpu
, vaddr addr
,
155 uint8_t *buf
, int len
, bool is_write
);
156 void (*dump_state
)(CPUState
*cpu
, FILE *, int flags
);
157 GuestPanicInformation
* (*get_crash_info
)(CPUState
*cpu
);
158 void (*dump_statistics
)(CPUState
*cpu
, int flags
);
159 int64_t (*get_arch_id
)(CPUState
*cpu
);
160 bool (*get_paging_enabled
)(const CPUState
*cpu
);
161 void (*get_memory_mapping
)(CPUState
*cpu
, MemoryMappingList
*list
,
163 void (*set_pc
)(CPUState
*cpu
, vaddr value
);
164 hwaddr (*get_phys_page_debug
)(CPUState
*cpu
, vaddr addr
);
165 hwaddr (*get_phys_page_attrs_debug
)(CPUState
*cpu
, vaddr addr
,
167 int (*asidx_from_attrs
)(CPUState
*cpu
, MemTxAttrs attrs
);
168 int (*gdb_read_register
)(CPUState
*cpu
, GByteArray
*buf
, int reg
);
169 int (*gdb_write_register
)(CPUState
*cpu
, uint8_t *buf
, int reg
);
171 int (*write_elf64_note
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
172 int cpuid
, void *opaque
);
173 int (*write_elf64_qemunote
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
175 int (*write_elf32_note
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
176 int cpuid
, void *opaque
);
177 int (*write_elf32_qemunote
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
180 const VMStateDescription
*vmsd
;
181 const char *gdb_core_xml_file
;
182 gchar
* (*gdb_arch_name
)(CPUState
*cpu
);
183 const char * (*gdb_get_dynamic_xml
)(CPUState
*cpu
, const char *xmlname
);
185 void (*disas_set_info
)(CPUState
*cpu
, disassemble_info
*info
);
187 const char *deprecation_note
;
188 /* Keep non-pointer data at the end to minimize holes. */
189 int gdb_num_core_regs
;
190 bool gdb_stop_before_watchpoint
;
191 struct AccelCPUClass
*accel_cpu
;
193 /* when TCG is not available, this pointer is NULL */
194 struct TCGCPUOps
*tcg_ops
;
198 * Low 16 bits: number of cycles left, used only in icount mode.
199 * High 16 bits: Set to -1 to force TCG to stop executing linked TBs
200 * for this CPU and return to its top level loop (even in non-icount mode).
201 * This allows a single read-compare-cbranch-write sequence to test
202 * for both decrementer underflow and exceptions.
204 typedef union IcountDecr
{
207 #ifdef HOST_WORDS_BIGENDIAN
217 typedef struct CPUBreakpoint
{
219 int flags
; /* BP_* */
220 QTAILQ_ENTRY(CPUBreakpoint
) entry
;
223 struct CPUWatchpoint
{
228 int flags
; /* BP_* */
229 QTAILQ_ENTRY(CPUWatchpoint
) entry
;
234 * For plugins we sometime need to save the resolved iotlb data before
235 * the memory regions get moved around by io_writex.
237 typedef struct SavedIOTLB
{
239 MemoryRegionSection
*section
;
247 struct hax_vcpu_state
;
249 #define TB_JMP_CACHE_BITS 12
250 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
254 /* The union type allows passing of 64 bit target pointers on 32 bit
255 * hosts in a single parameter
259 unsigned long host_ulong
;
264 #define RUN_ON_CPU_HOST_PTR(p) ((run_on_cpu_data){.host_ptr = (p)})
265 #define RUN_ON_CPU_HOST_INT(i) ((run_on_cpu_data){.host_int = (i)})
266 #define RUN_ON_CPU_HOST_ULONG(ul) ((run_on_cpu_data){.host_ulong = (ul)})
267 #define RUN_ON_CPU_TARGET_PTR(v) ((run_on_cpu_data){.target_ptr = (v)})
268 #define RUN_ON_CPU_NULL RUN_ON_CPU_HOST_PTR(NULL)
270 typedef void (*run_on_cpu_func
)(CPUState
*cpu
, run_on_cpu_data data
);
272 struct qemu_work_item
;
274 #define CPU_UNSET_NUMA_NODE_ID -1
275 #define CPU_TRACE_DSTATE_MAX_EVENTS 32
279 * @cpu_index: CPU index (informative).
280 * @cluster_index: Identifies which cluster this CPU is in.
281 * For boards which don't define clusters or for "loose" CPUs not assigned
282 * to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
283 * be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
285 * @nr_cores: Number of cores within this CPU package.
286 * @nr_threads: Number of threads within this CPU.
287 * @running: #true if CPU is currently running (lockless).
288 * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
289 * valid under cpu_list_lock.
290 * @created: Indicates whether the CPU thread has been successfully created.
291 * @interrupt_request: Indicates a pending interrupt request.
292 * @halted: Nonzero if the CPU is in suspended state.
293 * @stop: Indicates a pending stop request.
294 * @stopped: Indicates the CPU has been artificially stopped.
295 * @unplug: Indicates a pending CPU unplug request.
296 * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
297 * @singlestep_enabled: Flags for single-stepping.
298 * @icount_extra: Instructions until next timer event.
299 * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
300 * requires that IO only be performed on the last instruction of a TB
301 * so that interrupts take effect immediately.
302 * @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
303 * AddressSpaces this CPU has)
304 * @num_ases: number of CPUAddressSpaces in @cpu_ases
305 * @as: Pointer to the first AddressSpace, for the convenience of targets which
306 * only have a single AddressSpace
307 * @env_ptr: Pointer to subclass-specific CPUArchState field.
308 * @icount_decr_ptr: Pointer to IcountDecr field within subclass.
309 * @gdb_regs: Additional GDB registers.
310 * @gdb_num_regs: Number of total registers accessible to GDB.
311 * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
312 * @next_cpu: Next CPU sharing TB cache.
313 * @opaque: User data.
314 * @mem_io_pc: Host Program Counter at which the memory was accessed.
315 * @kvm_fd: vCPU file descriptor for KVM.
316 * @work_mutex: Lock to prevent multiple access to @work_list.
317 * @work_list: List of pending asynchronous work.
318 * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all changes
320 * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask).
321 * @plugin_mask: Plugin event bitmap. Modified only via async work.
322 * @ignore_memory_transaction_failures: Cached copy of the MachineState
323 * flag of the same name: allows the board to suppress calling of the
324 * CPU do_transaction_failed hook function.
326 * State of one CPU core or thread.
330 DeviceState parent_obj
;
336 struct QemuThread
*thread
;
341 bool running
, has_waiter
;
342 struct QemuCond
*halt_cond
;
348 /* Should CPU start in powered-off state? */
349 bool start_powered_off
;
354 bool in_exclusive_context
;
355 uint32_t cflags_next_tb
;
356 /* updates protected by BQL */
357 uint32_t interrupt_request
;
358 int singlestep_enabled
;
359 int64_t icount_budget
;
360 int64_t icount_extra
;
361 uint64_t random_seed
;
364 QemuMutex work_mutex
;
365 QSIMPLEQ_HEAD(, qemu_work_item
) work_list
;
367 CPUAddressSpace
*cpu_ases
;
370 MemoryRegion
*memory
;
372 void *env_ptr
; /* CPUArchState */
373 IcountDecr
*icount_decr_ptr
;
375 /* Accessed in parallel; all accesses must be atomic */
376 TranslationBlock
*tb_jmp_cache
[TB_JMP_CACHE_SIZE
];
378 struct GDBRegisterState
*gdb_regs
;
381 QTAILQ_ENTRY(CPUState
) node
;
383 /* ice debug support */
384 QTAILQ_HEAD(, CPUBreakpoint
) breakpoints
;
386 QTAILQ_HEAD(, CPUWatchpoint
) watchpoints
;
387 CPUWatchpoint
*watchpoint_hit
;
391 /* In order to avoid passing too many arguments to the MMIO helpers,
392 * we store some rarely used information in the CPU context.
397 struct KVMState
*kvm_state
;
398 struct kvm_run
*kvm_run
;
400 /* Used for events with 'vcpu' and *without* the 'disabled' properties */
401 DECLARE_BITMAP(trace_dstate_delayed
, CPU_TRACE_DSTATE_MAX_EVENTS
);
402 DECLARE_BITMAP(trace_dstate
, CPU_TRACE_DSTATE_MAX_EVENTS
);
404 DECLARE_BITMAP(plugin_mask
, QEMU_PLUGIN_EV_MAX
);
407 GArray
*plugin_mem_cbs
;
408 /* saved iotlb data from io_writex */
409 SavedIOTLB saved_iotlb
;
412 /* TODO Move common fields from CPUArchState here. */
417 int32_t exception_index
;
419 /* shared by kvm, hax and hvf */
422 /* Used to keep track of an outstanding cpu throttle thread for migration
425 bool throttle_thread_scheduled
;
427 bool ignore_memory_transaction_failures
;
429 struct hax_vcpu_state
*hax_vcpu
;
433 /* track IOMMUs whose translations we've cached in the TCG TLB */
434 GArray
*iommu_notifiers
;
437 typedef QTAILQ_HEAD(CPUTailQ
, CPUState
) CPUTailQ
;
438 extern CPUTailQ cpus
;
440 #define first_cpu QTAILQ_FIRST_RCU(&cpus)
441 #define CPU_NEXT(cpu) QTAILQ_NEXT_RCU(cpu, node)
442 #define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus, node)
443 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
444 QTAILQ_FOREACH_SAFE_RCU(cpu, &cpus, node, next_cpu)
446 extern __thread CPUState
*current_cpu
;
448 static inline void cpu_tb_jmp_cache_clear(CPUState
*cpu
)
452 for (i
= 0; i
< TB_JMP_CACHE_SIZE
; i
++) {
453 qatomic_set(&cpu
->tb_jmp_cache
[i
], NULL
);
458 * qemu_tcg_mttcg_enabled:
459 * Check whether we are running MultiThread TCG or not.
461 * Returns: %true if we are in MTTCG mode %false otherwise.
463 extern bool mttcg_enabled
;
464 #define qemu_tcg_mttcg_enabled() (mttcg_enabled)
467 * cpu_paging_enabled:
468 * @cpu: The CPU whose state is to be inspected.
470 * Returns: %true if paging is enabled, %false otherwise.
472 bool cpu_paging_enabled(const CPUState
*cpu
);
475 * cpu_get_memory_mapping:
476 * @cpu: The CPU whose memory mappings are to be obtained.
477 * @list: Where to write the memory mappings to.
478 * @errp: Pointer for reporting an #Error.
480 void cpu_get_memory_mapping(CPUState
*cpu
, MemoryMappingList
*list
,
483 #if !defined(CONFIG_USER_ONLY)
486 * cpu_write_elf64_note:
487 * @f: pointer to a function that writes memory to a file
488 * @cpu: The CPU whose memory is to be dumped
489 * @cpuid: ID number of the CPU
490 * @opaque: pointer to the CPUState struct
492 int cpu_write_elf64_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
493 int cpuid
, void *opaque
);
496 * cpu_write_elf64_qemunote:
497 * @f: pointer to a function that writes memory to a file
498 * @cpu: The CPU whose memory is to be dumped
499 * @cpuid: ID number of the CPU
500 * @opaque: pointer to the CPUState struct
502 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
506 * cpu_write_elf32_note:
507 * @f: pointer to a function that writes memory to a file
508 * @cpu: The CPU whose memory is to be dumped
509 * @cpuid: ID number of the CPU
510 * @opaque: pointer to the CPUState struct
512 int cpu_write_elf32_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
513 int cpuid
, void *opaque
);
516 * cpu_write_elf32_qemunote:
517 * @f: pointer to a function that writes memory to a file
518 * @cpu: The CPU whose memory is to be dumped
519 * @cpuid: ID number of the CPU
520 * @opaque: pointer to the CPUState struct
522 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
526 * cpu_get_crash_info:
527 * @cpu: The CPU to get crash information for
529 * Gets the previously saved crash information.
530 * Caller is responsible for freeing the data.
532 GuestPanicInformation
*cpu_get_crash_info(CPUState
*cpu
);
534 #endif /* !CONFIG_USER_ONLY */
539 * @CPU_DUMP_FPU: dump FPU register state, not just integer
540 * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
543 CPU_DUMP_CODE
= 0x00010000,
544 CPU_DUMP_FPU
= 0x00020000,
545 CPU_DUMP_CCOP
= 0x00040000,
550 * @cpu: The CPU whose state is to be dumped.
551 * @f: If non-null, dump to this stream, else to current print sink.
555 void cpu_dump_state(CPUState
*cpu
, FILE *f
, int flags
);
558 * cpu_dump_statistics:
559 * @cpu: The CPU whose state is to be dumped.
560 * @flags: Flags what to dump.
562 * Dump CPU statistics to the current monitor if we have one, else to
565 void cpu_dump_statistics(CPUState
*cpu
, int flags
);
567 #ifndef CONFIG_USER_ONLY
569 * cpu_get_phys_page_attrs_debug:
570 * @cpu: The CPU to obtain the physical page address for.
571 * @addr: The virtual address.
572 * @attrs: Updated on return with the memory transaction attributes to use
575 * Obtains the physical page corresponding to a virtual one, together
576 * with the corresponding memory transaction attributes to use for the access.
577 * Use it only for debugging because no protection checks are done.
579 * Returns: Corresponding physical page address or -1 if no page found.
581 static inline hwaddr
cpu_get_phys_page_attrs_debug(CPUState
*cpu
, vaddr addr
,
584 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
586 if (cc
->get_phys_page_attrs_debug
) {
587 return cc
->get_phys_page_attrs_debug(cpu
, addr
, attrs
);
589 /* Fallback for CPUs which don't implement the _attrs_ hook */
590 *attrs
= MEMTXATTRS_UNSPECIFIED
;
591 return cc
->get_phys_page_debug(cpu
, addr
);
595 * cpu_get_phys_page_debug:
596 * @cpu: The CPU to obtain the physical page address for.
597 * @addr: The virtual address.
599 * Obtains the physical page corresponding to a virtual one.
600 * Use it only for debugging because no protection checks are done.
602 * Returns: Corresponding physical page address or -1 if no page found.
604 static inline hwaddr
cpu_get_phys_page_debug(CPUState
*cpu
, vaddr addr
)
606 MemTxAttrs attrs
= {};
608 return cpu_get_phys_page_attrs_debug(cpu
, addr
, &attrs
);
611 /** cpu_asidx_from_attrs:
613 * @attrs: memory transaction attributes
615 * Returns the address space index specifying the CPU AddressSpace
616 * to use for a memory access with the given transaction attributes.
618 static inline int cpu_asidx_from_attrs(CPUState
*cpu
, MemTxAttrs attrs
)
620 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
623 if (cc
->asidx_from_attrs
) {
624 ret
= cc
->asidx_from_attrs(cpu
, attrs
);
625 assert(ret
< cpu
->num_ases
&& ret
>= 0);
630 #endif /* CONFIG_USER_ONLY */
634 * @cpu: The CPU to be added to the list of CPUs.
636 void cpu_list_add(CPUState
*cpu
);
640 * @cpu: The CPU to be removed from the list of CPUs.
642 void cpu_list_remove(CPUState
*cpu
);
646 * @cpu: The CPU whose state is to be reset.
648 void cpu_reset(CPUState
*cpu
);
652 * @typename: The CPU base type.
653 * @cpu_model: The model string without any parameters.
655 * Looks up a CPU #ObjectClass matching name @cpu_model.
657 * Returns: A #CPUClass or %NULL if not matching class is found.
659 ObjectClass
*cpu_class_by_name(const char *typename
, const char *cpu_model
);
663 * @typename: The CPU type.
665 * Instantiates a CPU and realizes the CPU.
667 * Returns: A #CPUState or %NULL if an error occurred.
669 CPUState
*cpu_create(const char *typename
);
673 * @cpu_option: The -cpu option including optional parameters.
675 * processes optional parameters and registers them as global properties
677 * Returns: type of CPU to create or prints error and terminates process
678 * if an error occurred.
680 const char *parse_cpu_option(const char *cpu_option
);
684 * @cpu: The vCPU to check.
686 * Checks whether the CPU has work to do.
688 * Returns: %true if the CPU has work, %false otherwise.
690 static inline bool cpu_has_work(CPUState
*cpu
)
692 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
694 g_assert(cc
->has_work
);
695 return cc
->has_work(cpu
);
700 * @cpu: The vCPU to check against.
702 * Checks whether the caller is executing on the vCPU thread.
704 * Returns: %true if called from @cpu's thread, %false otherwise.
706 bool qemu_cpu_is_self(CPUState
*cpu
);
710 * @cpu: The vCPU to kick.
712 * Kicks @cpu's thread.
714 void qemu_cpu_kick(CPUState
*cpu
);
718 * @cpu: The CPU to check.
720 * Checks whether the CPU is stopped.
722 * Returns: %true if run state is not running or if artificially stopped;
725 bool cpu_is_stopped(CPUState
*cpu
);
729 * @cpu: The vCPU to run on.
730 * @func: The function to be executed.
731 * @data: Data to pass to the function.
732 * @mutex: Mutex to release while waiting for @func to run.
734 * Used internally in the implementation of run_on_cpu.
736 void do_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
,
741 * @cpu: The vCPU to run on.
742 * @func: The function to be executed.
743 * @data: Data to pass to the function.
745 * Schedules the function @func for execution on the vCPU @cpu.
747 void run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
751 * @cpu: The vCPU to run on.
752 * @func: The function to be executed.
753 * @data: Data to pass to the function.
755 * Schedules the function @func for execution on the vCPU @cpu asynchronously.
757 void async_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
760 * async_safe_run_on_cpu:
761 * @cpu: The vCPU to run on.
762 * @func: The function to be executed.
763 * @data: Data to pass to the function.
765 * Schedules the function @func for execution on the vCPU @cpu asynchronously,
766 * while all other vCPUs are sleeping.
768 * Unlike run_on_cpu and async_run_on_cpu, the function is run outside the
771 void async_safe_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
774 * cpu_in_exclusive_context()
775 * @cpu: The vCPU to check
777 * Returns true if @cpu is an exclusive context, for example running
778 * something which has previously been queued via async_safe_run_on_cpu().
780 static inline bool cpu_in_exclusive_context(const CPUState
*cpu
)
782 return cpu
->in_exclusive_context
;
787 * @index: The CPUState@cpu_index value of the CPU to obtain.
789 * Gets a CPU matching @index.
791 * Returns: The CPU or %NULL if there is no matching CPU.
793 CPUState
*qemu_get_cpu(int index
);
797 * @id: Guest-exposed CPU ID to lookup.
799 * Search for CPU with specified ID.
801 * Returns: %true - CPU is found, %false - CPU isn't found.
803 bool cpu_exists(int64_t id
);
807 * @id: Guest-exposed CPU ID of the CPU to obtain.
809 * Get a CPU with matching @id.
811 * Returns: The CPU or %NULL if there is no matching CPU.
813 CPUState
*cpu_by_arch_id(int64_t id
);
817 * @cpu: The CPU to set an interrupt on.
818 * @mask: The interrupts to set.
820 * Invokes the interrupt handler.
823 void cpu_interrupt(CPUState
*cpu
, int mask
);
827 * @cpu: The CPU to set the program counter for.
828 * @addr: Program counter value.
830 * Sets the program counter for a CPU.
832 static inline void cpu_set_pc(CPUState
*cpu
, vaddr addr
)
834 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
836 cc
->set_pc(cpu
, addr
);
840 * cpu_reset_interrupt:
841 * @cpu: The CPU to clear the interrupt on.
842 * @mask: The interrupt mask to clear.
844 * Resets interrupts on the vCPU @cpu.
846 void cpu_reset_interrupt(CPUState
*cpu
, int mask
);
850 * @cpu: The CPU to exit.
852 * Requests the CPU @cpu to exit execution.
854 void cpu_exit(CPUState
*cpu
);
858 * @cpu: The CPU to resume.
860 * Resumes CPU, i.e. puts CPU into runnable state.
862 void cpu_resume(CPUState
*cpu
);
866 * @cpu: The CPU to remove.
868 * Requests the CPU to be removed and waits till it is removed.
870 void cpu_remove_sync(CPUState
*cpu
);
873 * process_queued_cpu_work() - process all items on CPU work queue
874 * @cpu: The CPU which work queue to process.
876 void process_queued_cpu_work(CPUState
*cpu
);
880 * @cpu: The CPU for the current thread.
882 * Record that a CPU has started execution and can be interrupted with
885 void cpu_exec_start(CPUState
*cpu
);
889 * @cpu: The CPU for the current thread.
891 * Record that a CPU has stopped execution and exclusive sections
892 * can be executed without interrupting it.
894 void cpu_exec_end(CPUState
*cpu
);
899 * Wait for a concurrent exclusive section to end, and then start
900 * a section of work that is run while other CPUs are not running
901 * between cpu_exec_start and cpu_exec_end. CPUs that are running
902 * cpu_exec are exited immediately. CPUs that call cpu_exec_start
903 * during the exclusive section go to sleep until this CPU calls
906 void start_exclusive(void);
911 * Concludes an exclusive execution section started by start_exclusive.
913 void end_exclusive(void);
917 * @cpu: The vCPU to initialize.
919 * Initializes a vCPU.
921 void qemu_init_vcpu(CPUState
*cpu
);
923 #define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */
924 #define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */
925 #define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
929 * @cpu: CPU to the flags for.
930 * @enabled: Flags to enable.
932 * Enables or disables single-stepping for @cpu.
934 void cpu_single_step(CPUState
*cpu
, int enabled
);
936 /* Breakpoint/watchpoint flags */
937 #define BP_MEM_READ 0x01
938 #define BP_MEM_WRITE 0x02
939 #define BP_MEM_ACCESS (BP_MEM_READ | BP_MEM_WRITE)
940 #define BP_STOP_BEFORE_ACCESS 0x04
941 /* 0x08 currently unused */
944 #define BP_ANY (BP_GDB | BP_CPU)
945 #define BP_WATCHPOINT_HIT_READ 0x40
946 #define BP_WATCHPOINT_HIT_WRITE 0x80
947 #define BP_WATCHPOINT_HIT (BP_WATCHPOINT_HIT_READ | BP_WATCHPOINT_HIT_WRITE)
949 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
950 CPUBreakpoint
**breakpoint
);
951 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
);
952 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
);
953 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
);
955 /* Return true if PC matches an installed breakpoint. */
956 static inline bool cpu_breakpoint_test(CPUState
*cpu
, vaddr pc
, int mask
)
960 if (unlikely(!QTAILQ_EMPTY(&cpu
->breakpoints
))) {
961 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
962 if (bp
->pc
== pc
&& (bp
->flags
& mask
)) {
970 #ifdef CONFIG_USER_ONLY
971 static inline int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
972 int flags
, CPUWatchpoint
**watchpoint
)
977 static inline int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
,
978 vaddr len
, int flags
)
983 static inline void cpu_watchpoint_remove_by_ref(CPUState
*cpu
,
988 static inline void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
992 static inline void cpu_check_watchpoint(CPUState
*cpu
, vaddr addr
, vaddr len
,
993 MemTxAttrs atr
, int fl
, uintptr_t ra
)
997 static inline int cpu_watchpoint_address_matches(CPUState
*cpu
,
998 vaddr addr
, vaddr len
)
1003 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
1004 int flags
, CPUWatchpoint
**watchpoint
);
1005 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
,
1006 vaddr len
, int flags
);
1007 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
);
1008 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
);
1011 * cpu_check_watchpoint:
1013 * @addr: guest virtual address
1014 * @len: access length
1015 * @attrs: memory access attributes
1016 * @flags: watchpoint access type
1017 * @ra: unwind return address
1019 * Check for a watchpoint hit in [addr, addr+len) of the type
1020 * specified by @flags. Exit via exception with a hit.
1022 void cpu_check_watchpoint(CPUState
*cpu
, vaddr addr
, vaddr len
,
1023 MemTxAttrs attrs
, int flags
, uintptr_t ra
);
1026 * cpu_watchpoint_address_matches:
1028 * @addr: guest virtual address
1029 * @len: access length
1031 * Return the watchpoint flags that apply to [addr, addr+len).
1032 * If no watchpoint is registered for the range, the result is 0.
1034 int cpu_watchpoint_address_matches(CPUState
*cpu
, vaddr addr
, vaddr len
);
1038 * cpu_get_address_space:
1039 * @cpu: CPU to get address space from
1040 * @asidx: index identifying which address space to get
1042 * Return the requested address space of this CPU. @asidx
1043 * specifies which address space to read.
1045 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
);
1047 void QEMU_NORETURN
cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
1050 /* $(top_srcdir)/cpu.c */
1051 void cpu_exec_initfn(CPUState
*cpu
);
1052 void cpu_exec_realizefn(CPUState
*cpu
, Error
**errp
);
1053 void cpu_exec_unrealizefn(CPUState
*cpu
);
1056 * target_words_bigendian:
1057 * Returns true if the (default) endianness of the target is big endian,
1058 * false otherwise. Note that in target-specific code, you can use
1059 * TARGET_WORDS_BIGENDIAN directly instead. On the other hand, common
1060 * code should normally never need to know about the endianness of the
1061 * target, so please do *not* use this function unless you know very well
1062 * what you are doing!
1064 bool target_words_bigendian(void);
1068 #ifdef CONFIG_SOFTMMU
1069 extern const VMStateDescription vmstate_cpu_common
;
1071 #define vmstate_cpu_common vmstate_dummy
1074 #define VMSTATE_CPU() { \
1075 .name = "parent_obj", \
1076 .size = sizeof(CPUState), \
1077 .vmsd = &vmstate_cpu_common, \
1078 .flags = VMS_STRUCT, \
1082 #endif /* NEED_CPU_H */
1084 #define UNASSIGNED_CPU_INDEX -1
1085 #define UNASSIGNED_CLUSTER_INDEX -1