2 * Arm PrimeCell PL050 Keyboard / Mouse Interface
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GPL.
10 #include "qemu/osdep.h"
11 #include "hw/sysbus.h"
12 #include "hw/input/ps2.h"
14 #include "qemu/module.h"
16 #define TYPE_PL050 "pl050"
17 #define PL050(obj) OBJECT_CHECK(PL050State, (obj), TYPE_PL050)
19 typedef struct PL050State
{
20 SysBusDevice parent_obj
;
32 static const VMStateDescription vmstate_pl050
= {
35 .minimum_version_id
= 2,
36 .fields
= (VMStateField
[]) {
37 VMSTATE_UINT32(cr
, PL050State
),
38 VMSTATE_UINT32(clk
, PL050State
),
39 VMSTATE_UINT32(last
, PL050State
),
40 VMSTATE_INT32(pending
, PL050State
),
45 #define PL050_TXEMPTY (1 << 6)
46 #define PL050_TXBUSY (1 << 5)
47 #define PL050_RXFULL (1 << 4)
48 #define PL050_RXBUSY (1 << 3)
49 #define PL050_RXPARITY (1 << 2)
50 #define PL050_KMIC (1 << 1)
51 #define PL050_KMID (1 << 0)
53 static const unsigned char pl050_id
[] =
54 { 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
56 static void pl050_update(void *opaque
, int level
)
58 PL050State
*s
= (PL050State
*)opaque
;
62 raise
= (s
->pending
&& (s
->cr
& 0x10) != 0)
63 || (s
->cr
& 0x08) != 0;
64 qemu_set_irq(s
->irq
, raise
);
67 static uint64_t pl050_read(void *opaque
, hwaddr offset
,
70 PL050State
*s
= (PL050State
*)opaque
;
71 if (offset
>= 0xfe0 && offset
< 0x1000)
72 return pl050_id
[(offset
- 0xfe0) >> 2];
74 switch (offset
>> 2) {
83 val
= val
^ (val
>> 4);
84 val
= val
^ (val
>> 2);
85 val
= (val
^ (val
>> 1)) & 1;
89 stat
|= PL050_RXPARITY
;
97 s
->last
= ps2_read_data(s
->dev
);
99 case 3: /* KMICLKDIV */
102 return s
->pending
| 2;
104 qemu_log_mask(LOG_GUEST_ERROR
,
105 "pl050_read: Bad offset %x\n", (int)offset
);
110 static void pl050_write(void *opaque
, hwaddr offset
,
111 uint64_t value
, unsigned size
)
113 PL050State
*s
= (PL050State
*)opaque
;
114 switch (offset
>> 2) {
117 pl050_update(s
, s
->pending
);
118 /* ??? Need to implement the enable/disable bit. */
120 case 2: /* KMIDATA */
121 /* ??? This should toggle the TX interrupt line. */
122 /* ??? This means kbd/mouse can block each other. */
124 ps2_write_mouse(s
->dev
, value
);
126 ps2_write_keyboard(s
->dev
, value
);
129 case 3: /* KMICLKDIV */
133 qemu_log_mask(LOG_GUEST_ERROR
,
134 "pl050_write: Bad offset %x\n", (int)offset
);
137 static const MemoryRegionOps pl050_ops
= {
139 .write
= pl050_write
,
140 .endianness
= DEVICE_NATIVE_ENDIAN
,
143 static void pl050_realize(DeviceState
*dev
, Error
**errp
)
145 PL050State
*s
= PL050(dev
);
146 SysBusDevice
*sbd
= SYS_BUS_DEVICE(dev
);
148 memory_region_init_io(&s
->iomem
, OBJECT(s
), &pl050_ops
, s
, "pl050", 0x1000);
149 sysbus_init_mmio(sbd
, &s
->iomem
);
150 sysbus_init_irq(sbd
, &s
->irq
);
152 s
->dev
= ps2_mouse_init(pl050_update
, s
);
154 s
->dev
= ps2_kbd_init(pl050_update
, s
);
158 static void pl050_keyboard_init(Object
*obj
)
160 PL050State
*s
= PL050(obj
);
165 static void pl050_mouse_init(Object
*obj
)
167 PL050State
*s
= PL050(obj
);
172 static const TypeInfo pl050_kbd_info
= {
173 .name
= "pl050_keyboard",
174 .parent
= TYPE_PL050
,
175 .instance_init
= pl050_keyboard_init
,
178 static const TypeInfo pl050_mouse_info
= {
179 .name
= "pl050_mouse",
180 .parent
= TYPE_PL050
,
181 .instance_init
= pl050_mouse_init
,
184 static void pl050_class_init(ObjectClass
*oc
, void *data
)
186 DeviceClass
*dc
= DEVICE_CLASS(oc
);
188 dc
->realize
= pl050_realize
;
189 dc
->vmsd
= &vmstate_pl050
;
192 static const TypeInfo pl050_type_info
= {
194 .parent
= TYPE_SYS_BUS_DEVICE
,
195 .instance_size
= sizeof(PL050State
),
197 .class_init
= pl050_class_init
,
200 static void pl050_register_types(void)
202 type_register_static(&pl050_type_info
);
203 type_register_static(&pl050_kbd_info
);
204 type_register_static(&pl050_mouse_info
);
207 type_init(pl050_register_types
)