hw/ppc/spapr_nvdimm.c

   1 /*
   2  * QEMU PAPR Storage Class Memory Interfaces
   3  *
   4  * Copyright (c) 2019-2020, IBM Corporation.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "qemu/osdep.h"
  25 #include "qapi/error.h"
  26 #include "hw/ppc/spapr_drc.h"
  27 #include "hw/ppc/spapr_nvdimm.h"
  28 #include "hw/mem/nvdimm.h"
  29 #include "qemu/nvdimm-utils.h"
  30 #include "hw/ppc/fdt.h"
  31 #include "qemu/range.h"
  32
  33 void spapr_nvdimm_validate_opts(NVDIMMDevice *nvdimm, uint64_t size,
  34                                 Error **errp)
  35 {
  36     char *uuidstr = NULL;
  37     QemuUUID uuid;
  38
  39     if (size % SPAPR_MINIMUM_SCM_BLOCK_SIZE) {
  40         error_setg(errp, "NVDIMM memory size excluding the label area"
  41                    " must be a multiple of %" PRIu64 "MB",
  42                    SPAPR_MINIMUM_SCM_BLOCK_SIZE / MiB);
  43         return;
  44     }
  45
  46     uuidstr = object_property_get_str(OBJECT(nvdimm), NVDIMM_UUID_PROP, NULL);
  47     qemu_uuid_parse(uuidstr, &uuid);
  48     g_free(uuidstr);
  49
  50     if (qemu_uuid_is_null(&uuid)) {
  51         error_setg(errp, "NVDIMM device requires the uuid to be set");
  52         return;
  53     }
  54 }
  55
  56
  57 void spapr_add_nvdimm(DeviceState *dev, uint64_t slot, Error **errp)
  58 {
  59     SpaprDrc *drc;
  60     bool hotplugged = spapr_drc_hotplugged(dev);
  61     Error *local_err = NULL;
  62
  63     drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot);
  64     g_assert(drc);
  65
  66     spapr_drc_attach(drc, dev, &local_err);
  67     if (local_err) {
  68         error_propagate(errp, local_err);
  69         return;
  70     }
  71
  72     if (hotplugged) {
  73         spapr_hotplug_req_add_by_index(drc);
  74     }
  75 }
  76
  77 int spapr_pmem_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr,
  78                            void *fdt, int *fdt_start_offset, Error **errp)
  79 {
  80     NVDIMMDevice *nvdimm = NVDIMM(drc->dev);
  81
  82     *fdt_start_offset = spapr_dt_nvdimm(fdt, 0, nvdimm);
  83
  84     return 0;
  85 }
  86
  87 void spapr_create_nvdimm_dr_connectors(SpaprMachineState *spapr)
  88 {
  89     MachineState *machine = MACHINE(spapr);
  90     int i;
  91
  92     for (i = 0; i < machine->ram_slots; i++) {
  93         spapr_dr_connector_new(OBJECT(spapr), TYPE_SPAPR_DRC_PMEM, i);
  94     }
  95 }
  96
  97
  98 int spapr_dt_nvdimm(void *fdt, int parent_offset,
  99                            NVDIMMDevice *nvdimm)
 100 {
 101     int child_offset;
 102     char *buf;
 103     SpaprDrc *drc;
 104     uint32_t drc_idx;
 105     uint32_t node = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_NODE_PROP,
 106                                              &error_abort);
 107     uint64_t slot = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_SLOT_PROP,
 108                                              &error_abort);
 109     uint32_t associativity[] = {
 110         cpu_to_be32(0x4), /* length */
 111         cpu_to_be32(0x0), cpu_to_be32(0x0),
 112         cpu_to_be32(0x0), cpu_to_be32(node)
 113     };
 114     uint64_t lsize = nvdimm->label_size;
 115     uint64_t size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP,
 116                                             NULL);
 117
 118     drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot);
 119     g_assert(drc);
 120
 121     drc_idx = spapr_drc_index(drc);
 122
 123     buf = g_strdup_printf("ibm,pmemory@%x", drc_idx);
 124     child_offset = fdt_add_subnode(fdt, parent_offset, buf);
 125     g_free(buf);
 126
 127     _FDT(child_offset);
 128
 129     _FDT((fdt_setprop_cell(fdt, child_offset, "reg", drc_idx)));
 130     _FDT((fdt_setprop_string(fdt, child_offset, "compatible", "ibm,pmemory")));
 131     _FDT((fdt_setprop_string(fdt, child_offset, "device_type", "ibm,pmemory")));
 132
 133     _FDT((fdt_setprop(fdt, child_offset, "ibm,associativity", associativity,
 134                       sizeof(associativity))));
 135
 136     buf = qemu_uuid_unparse_strdup(&nvdimm->uuid);
 137     _FDT((fdt_setprop_string(fdt, child_offset, "ibm,unit-guid", buf)));
 138     g_free(buf);
 139
 140     _FDT((fdt_setprop_cell(fdt, child_offset, "ibm,my-drc-index", drc_idx)));
 141
 142     _FDT((fdt_setprop_u64(fdt, child_offset, "ibm,block-size",
 143                           SPAPR_MINIMUM_SCM_BLOCK_SIZE)));
 144     _FDT((fdt_setprop_u64(fdt, child_offset, "ibm,number-of-blocks",
 145                           size / SPAPR_MINIMUM_SCM_BLOCK_SIZE)));
 146     _FDT((fdt_setprop_cell(fdt, child_offset, "ibm,metadata-size", lsize)));
 147
 148     _FDT((fdt_setprop_string(fdt, child_offset, "ibm,pmem-application",
 149                              "operating-system")));
 150     _FDT(fdt_setprop(fdt, child_offset, "ibm,cache-flush-required", NULL, 0));
 151
 152     return child_offset;
 153 }
 154
 155 void spapr_dt_persistent_memory(void *fdt)
 156 {
 157     int offset = fdt_subnode_offset(fdt, 0, "persistent-memory");
 158     GSList *iter, *nvdimms = nvdimm_get_device_list();
 159
 160     if (offset < 0) {
 161         offset = fdt_add_subnode(fdt, 0, "persistent-memory");
 162         _FDT(offset);
 163         _FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 0x1)));
 164         _FDT((fdt_setprop_cell(fdt, offset, "#size-cells", 0x0)));
 165         _FDT((fdt_setprop_string(fdt, offset, "device_type",
 166                                  "ibm,persistent-memory")));
 167     }
 168
 169     /* Create DT entries for cold plugged NVDIMM devices */
 170     for (iter = nvdimms; iter; iter = iter->next) {
 171         NVDIMMDevice *nvdimm = iter->data;
 172
 173         spapr_dt_nvdimm(fdt, offset, nvdimm);
 174     }
 175     g_slist_free(nvdimms);
 176
 177     return;
 178 }
 179
 180 static target_ulong h_scm_read_metadata(PowerPCCPU *cpu,
 181                                         SpaprMachineState *spapr,
 182                                         target_ulong opcode,
 183                                         target_ulong *args)
 184 {
 185     uint32_t drc_index = args[0];
 186     uint64_t offset = args[1];
 187     uint64_t len = args[2];
 188     SpaprDrc *drc = spapr_drc_by_index(drc_index);
 189     NVDIMMDevice *nvdimm;
 190     NVDIMMClass *ddc;
 191     uint64_t data = 0;
 192     uint8_t buf[8] = { 0 };
 193
 194     if (!drc || !drc->dev ||
 195         spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) {
 196         return H_PARAMETER;
 197     }
 198
 199     if (len != 1 && len != 2 &&
 200         len != 4 && len != 8) {
 201         return H_P3;
 202     }
 203
 204     nvdimm = NVDIMM(drc->dev);
 205     if ((offset + len < offset) ||
 206         (nvdimm->label_size < len + offset)) {
 207         return H_P2;
 208     }
 209
 210     ddc = NVDIMM_GET_CLASS(nvdimm);
 211     ddc->read_label_data(nvdimm, buf, len, offset);
 212
 213     switch (len) {
 214     case 1:
 215         data = ldub_p(buf);
 216         break;
 217     case 2:
 218         data = lduw_be_p(buf);
 219         break;
 220     case 4:
 221         data = ldl_be_p(buf);
 222         break;
 223     case 8:
 224         data = ldq_be_p(buf);
 225         break;
 226     default:
 227         g_assert_not_reached();
 228     }
 229
 230     args[0] = data;
 231
 232     return H_SUCCESS;
 233 }
 234
 235 static target_ulong h_scm_write_metadata(PowerPCCPU *cpu,
 236                                          SpaprMachineState *spapr,
 237                                          target_ulong opcode,
 238                                          target_ulong *args)
 239 {
 240     uint32_t drc_index = args[0];
 241     uint64_t offset = args[1];
 242     uint64_t data = args[2];
 243     uint64_t len = args[3];
 244     SpaprDrc *drc = spapr_drc_by_index(drc_index);
 245     NVDIMMDevice *nvdimm;
 246     NVDIMMClass *ddc;
 247     uint8_t buf[8] = { 0 };
 248
 249     if (!drc || !drc->dev ||
 250         spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) {
 251         return H_PARAMETER;
 252     }
 253
 254     if (len != 1 && len != 2 &&
 255         len != 4 && len != 8) {
 256         return H_P4;
 257     }
 258
 259     nvdimm = NVDIMM(drc->dev);
 260     if ((offset + len < offset) ||
 261         (nvdimm->label_size < len + offset)) {
 262         return H_P2;
 263     }
 264
 265     switch (len) {
 266     case 1:
 267         if (data & 0xffffffffffffff00) {
 268             return H_P2;
 269         }
 270         stb_p(buf, data);
 271         break;
 272     case 2:
 273         if (data & 0xffffffffffff0000) {
 274             return H_P2;
 275         }
 276         stw_be_p(buf, data);
 277         break;
 278     case 4:
 279         if (data & 0xffffffff00000000) {
 280             return H_P2;
 281         }
 282         stl_be_p(buf, data);
 283         break;
 284     case 8:
 285         stq_be_p(buf, data);
 286         break;
 287     default:
 288             g_assert_not_reached();
 289     }
 290
 291     ddc = NVDIMM_GET_CLASS(nvdimm);
 292     ddc->write_label_data(nvdimm, buf, len, offset);
 293
 294     return H_SUCCESS;
 295 }
 296
 297 static target_ulong h_scm_bind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr,
 298                                    target_ulong opcode, target_ulong *args)
 299 {
 300     uint32_t drc_index = args[0];
 301     uint64_t starting_idx = args[1];
 302     uint64_t no_of_scm_blocks_to_bind = args[2];
 303     uint64_t target_logical_mem_addr = args[3];
 304     uint64_t continue_token = args[4];
 305     uint64_t size;
 306     uint64_t total_no_of_scm_blocks;
 307     SpaprDrc *drc = spapr_drc_by_index(drc_index);
 308     hwaddr addr;
 309     NVDIMMDevice *nvdimm;
 310
 311     if (!drc || !drc->dev ||
 312         spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) {
 313         return H_PARAMETER;
 314     }
 315
 316     /*
 317      * Currently continue token should be zero qemu has already bound
 318      * everything and this hcall doesnt return H_BUSY.
 319      */
 320     if (continue_token > 0) {
 321         return H_P5;
 322     }
 323
 324     /* Currently qemu assigns the address. */
 325     if (target_logical_mem_addr != 0xffffffffffffffff) {
 326         return H_OVERLAP;
 327     }
 328
 329     nvdimm = NVDIMM(drc->dev);
 330
 331     size = object_property_get_uint(OBJECT(nvdimm),
 332                                     PC_DIMM_SIZE_PROP, &error_abort);
 333
 334     total_no_of_scm_blocks = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE;
 335
 336     if (starting_idx > total_no_of_scm_blocks) {
 337         return H_P2;
 338     }
 339
 340     if (((starting_idx + no_of_scm_blocks_to_bind) < starting_idx) ||
 341         ((starting_idx + no_of_scm_blocks_to_bind) > total_no_of_scm_blocks)) {
 342         return H_P3;
 343     }
 344
 345     addr = object_property_get_uint(OBJECT(nvdimm),
 346                                     PC_DIMM_ADDR_PROP, &error_abort);
 347
 348     addr += starting_idx * SPAPR_MINIMUM_SCM_BLOCK_SIZE;
 349
 350     /* Already bound, Return target logical address in R5 */
 351     args[1] = addr;
 352     args[2] = no_of_scm_blocks_to_bind;
 353
 354     return H_SUCCESS;
 355 }
 356
 357 static target_ulong h_scm_unbind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr,
 358                                      target_ulong opcode, target_ulong *args)
 359 {
 360     uint32_t drc_index = args[0];
 361     uint64_t starting_scm_logical_addr = args[1];
 362     uint64_t no_of_scm_blocks_to_unbind = args[2];
 363     uint64_t continue_token = args[3];
 364     uint64_t size_to_unbind;
 365     Range blockrange = range_empty;
 366     Range nvdimmrange = range_empty;
 367     SpaprDrc *drc = spapr_drc_by_index(drc_index);
 368     NVDIMMDevice *nvdimm;
 369     uint64_t size, addr;
 370
 371     if (!drc || !drc->dev ||
 372         spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) {
 373         return H_PARAMETER;
 374     }
 375
 376     /* continue_token should be zero as this hcall doesn't return H_BUSY. */
 377     if (continue_token > 0) {
 378         return H_P4;
 379     }
 380
 381     /* Check if starting_scm_logical_addr is block aligned */
 382     if (!QEMU_IS_ALIGNED(starting_scm_logical_addr,
 383                          SPAPR_MINIMUM_SCM_BLOCK_SIZE)) {
 384         return H_P2;
 385     }
 386
 387     size_to_unbind = no_of_scm_blocks_to_unbind * SPAPR_MINIMUM_SCM_BLOCK_SIZE;
 388     if (no_of_scm_blocks_to_unbind == 0 || no_of_scm_blocks_to_unbind !=
 389                                size_to_unbind / SPAPR_MINIMUM_SCM_BLOCK_SIZE) {
 390         return H_P3;
 391     }
 392
 393     nvdimm = NVDIMM(drc->dev);
 394     size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP,
 395                                    &error_abort);
 396     addr = object_property_get_int(OBJECT(nvdimm), PC_DIMM_ADDR_PROP,
 397                                    &error_abort);
 398
 399     range_init_nofail(&nvdimmrange, addr, size);
 400     range_init_nofail(&blockrange, starting_scm_logical_addr, size_to_unbind);
 401
 402     if (!range_contains_range(&nvdimmrange, &blockrange)) {
 403         return H_P3;
 404     }
 405
 406     args[1] = no_of_scm_blocks_to_unbind;
 407
 408     /* let unplug take care of actual unbind */
 409     return H_SUCCESS;
 410 }
 411
 412 #define H_UNBIND_SCOPE_ALL 0x1
 413 #define H_UNBIND_SCOPE_DRC 0x2
 414
 415 static target_ulong h_scm_unbind_all(PowerPCCPU *cpu, SpaprMachineState *spapr,
 416                                      target_ulong opcode, target_ulong *args)
 417 {
 418     uint64_t target_scope = args[0];
 419     uint32_t drc_index = args[1];
 420     uint64_t continue_token = args[2];
 421     NVDIMMDevice *nvdimm;
 422     uint64_t size;
 423     uint64_t no_of_scm_blocks_unbound = 0;
 424
 425     /* continue_token should be zero as this hcall doesn't return H_BUSY. */
 426     if (continue_token > 0) {
 427         return H_P4;
 428     }
 429
 430     if (target_scope == H_UNBIND_SCOPE_DRC) {
 431         SpaprDrc *drc = spapr_drc_by_index(drc_index);
 432
 433         if (!drc || !drc->dev ||
 434             spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) {
 435             return H_P2;
 436         }
 437
 438         nvdimm = NVDIMM(drc->dev);
 439         size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP,
 440                                        &error_abort);
 441
 442         no_of_scm_blocks_unbound = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE;
 443     } else if (target_scope ==  H_UNBIND_SCOPE_ALL) {
 444         GSList *list, *nvdimms;
 445
 446         nvdimms = nvdimm_get_device_list();
 447         for (list = nvdimms; list; list = list->next) {
 448             nvdimm = list->data;
 449             size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP,
 450                                            &error_abort);
 451
 452             no_of_scm_blocks_unbound += size / SPAPR_MINIMUM_SCM_BLOCK_SIZE;
 453         }
 454         g_slist_free(nvdimms);
 455     } else {
 456         return H_PARAMETER;
 457     }
 458
 459     args[1] = no_of_scm_blocks_unbound;
 460
 461     /* let unplug take care of actual unbind */
 462     return H_SUCCESS;
 463 }
 464
 465 static void spapr_scm_register_types(void)
 466 {
 467     /* qemu/scm specific hcalls */
 468     spapr_register_hypercall(H_SCM_READ_METADATA, h_scm_read_metadata);
 469     spapr_register_hypercall(H_SCM_WRITE_METADATA, h_scm_write_metadata);
 470     spapr_register_hypercall(H_SCM_BIND_MEM, h_scm_bind_mem);
 471     spapr_register_hypercall(H_SCM_UNBIND_MEM, h_scm_unbind_mem);
 472     spapr_register_hypercall(H_SCM_UNBIND_ALL, h_scm_unbind_all);
 473 }
 474
 475 type_init(spapr_scm_register_types)