4 #include "hw/xen/xen_common.h"
5 #include "hw/pci/pci.h"
6 #include "xen-host-pci-device.h"
8 void xen_pt_log(const PCIDevice
*d
, const char *f
, ...) GCC_FMT_ATTR(2, 3);
10 #define XEN_PT_ERR(d, _f, _a...) xen_pt_log(d, "%s: Error: "_f, __func__, ##_a)
12 #ifdef XEN_PT_LOGGING_ENABLED
13 # define XEN_PT_LOG(d, _f, _a...) xen_pt_log(d, "%s: " _f, __func__, ##_a)
14 # define XEN_PT_WARN(d, _f, _a...) \
15 xen_pt_log(d, "%s: Warning: "_f, __func__, ##_a)
17 # define XEN_PT_LOG(d, _f, _a...)
18 # define XEN_PT_WARN(d, _f, _a...)
21 #ifdef XEN_PT_DEBUG_PCI_CONFIG_ACCESS
22 # define XEN_PT_LOG_CONFIG(d, addr, val, len) \
23 xen_pt_log(d, "%s: address=0x%04x val=0x%08x len=%d\n", \
24 __func__, addr, val, len)
26 # define XEN_PT_LOG_CONFIG(d, addr, val, len)
31 #define XEN_PFN(x) ((x) >> XC_PAGE_SHIFT)
33 typedef const struct XenPTRegInfo XenPTRegInfo
;
34 typedef struct XenPTReg XenPTReg
;
36 typedef struct XenPCIPassthroughState XenPCIPassthroughState
;
38 #define TYPE_XEN_PT_DEVICE "xen-pci-passthrough"
39 #define XEN_PT_DEVICE(obj) \
40 OBJECT_CHECK(XenPCIPassthroughState, (obj), TYPE_XEN_PT_DEVICE)
42 uint32_t igd_read_opregion(XenPCIPassthroughState
*s
);
43 void igd_write_opregion(XenPCIPassthroughState
*s
, uint32_t val
);
45 /* function type for config reg */
46 typedef int (*xen_pt_conf_reg_init
)
47 (XenPCIPassthroughState
*, XenPTRegInfo
*, uint32_t real_offset
,
49 typedef int (*xen_pt_conf_dword_write
)
50 (XenPCIPassthroughState
*, XenPTReg
*cfg_entry
,
51 uint32_t *val
, uint32_t dev_value
, uint32_t valid_mask
);
52 typedef int (*xen_pt_conf_word_write
)
53 (XenPCIPassthroughState
*, XenPTReg
*cfg_entry
,
54 uint16_t *val
, uint16_t dev_value
, uint16_t valid_mask
);
55 typedef int (*xen_pt_conf_byte_write
)
56 (XenPCIPassthroughState
*, XenPTReg
*cfg_entry
,
57 uint8_t *val
, uint8_t dev_value
, uint8_t valid_mask
);
58 typedef int (*xen_pt_conf_dword_read
)
59 (XenPCIPassthroughState
*, XenPTReg
*cfg_entry
,
60 uint32_t *val
, uint32_t valid_mask
);
61 typedef int (*xen_pt_conf_word_read
)
62 (XenPCIPassthroughState
*, XenPTReg
*cfg_entry
,
63 uint16_t *val
, uint16_t valid_mask
);
64 typedef int (*xen_pt_conf_byte_read
)
65 (XenPCIPassthroughState
*, XenPTReg
*cfg_entry
,
66 uint8_t *val
, uint8_t valid_mask
);
68 #define XEN_PT_BAR_ALLF 0xFFFFFFFF
69 #define XEN_PT_BAR_UNMAPPED (-1)
71 #define XEN_PCI_CAP_MAX 48
73 #define XEN_PCI_INTEL_OPREGION 0xfc
76 XEN_PT_GRP_TYPE_HARDWIRED
= 0, /* 0 Hardwired reg group */
77 XEN_PT_GRP_TYPE_EMU
, /* emul reg group */
78 } XenPTRegisterGroupType
;
81 XEN_PT_BAR_FLAG_MEM
= 0, /* Memory type BAR */
82 XEN_PT_BAR_FLAG_IO
, /* I/O type BAR */
83 XEN_PT_BAR_FLAG_UPPER
, /* upper 64bit BAR */
84 XEN_PT_BAR_FLAG_UNUSED
, /* unused BAR */
88 typedef struct XenPTRegion
{
90 XenPTBarFlag bar_flag
;
91 /* Translation of the emulated address */
99 /* XenPTRegInfo declaration
100 * - only for emulated register (either a part or whole bit).
101 * - for passthrough register that need special behavior (like interacting with
102 * other component), set emu_mask to all 0 and specify r/w func properly.
103 * - do NOT use ALL F for init_val, otherwise the tbl will not be registered.
106 /* emulated register information */
107 struct XenPTRegInfo
{
111 /* reg reserved field mask (ON:reserved, OFF:defined) */
113 /* reg read only field mask (ON:RO/ROS, OFF:other) */
115 /* reg read/write-1-clear field mask (ON:RW1C/RW1CS, OFF:other) */
117 /* reg emulate field mask (ON:emu, OFF:passthrough) */
119 xen_pt_conf_reg_init init
;
120 /* read/write function pointer
121 * for double_word/word/byte size */
124 xen_pt_conf_dword_write write
;
125 xen_pt_conf_dword_read read
;
128 xen_pt_conf_word_write write
;
129 xen_pt_conf_word_read read
;
132 xen_pt_conf_byte_write write
;
133 xen_pt_conf_byte_read read
;
138 /* emulated register management */
140 QLIST_ENTRY(XenPTReg
) entries
;
146 } ptr
; /* pointer to dev.config. */
149 typedef const struct XenPTRegGroupInfo XenPTRegGroupInfo
;
151 /* emul reg group size initialize method */
152 typedef int (*xen_pt_reg_size_init_fn
)
153 (XenPCIPassthroughState
*, XenPTRegGroupInfo
*,
154 uint32_t base_offset
, uint8_t *size
);
156 /* emulated register group information */
157 struct XenPTRegGroupInfo
{
159 XenPTRegisterGroupType grp_type
;
161 xen_pt_reg_size_init_fn size_init
;
162 XenPTRegInfo
*emu_regs
;
165 /* emul register group management table */
166 typedef struct XenPTRegGroup
{
167 QLIST_ENTRY(XenPTRegGroup
) entries
;
168 XenPTRegGroupInfo
*reg_grp
;
169 uint32_t base_offset
;
171 QLIST_HEAD(, XenPTReg
) reg_tbl_list
;
175 #define XEN_PT_UNASSIGNED_PIRQ (-1)
176 typedef struct XenPTMSI
{
178 uint32_t addr_lo
; /* guest message address */
179 uint32_t addr_hi
; /* guest message upper address */
180 uint16_t data
; /* guest message data */
181 uint32_t ctrl_offset
; /* saved control offset */
182 uint32_t mask
; /* guest mask bits */
183 int pirq
; /* guest pirq corresponding */
184 bool initialized
; /* when guest MSI is initialized */
185 bool mapped
; /* when pirq is mapped */
188 typedef struct XenPTMSIXEntry
{
193 bool updated
; /* indicate whether MSI ADDR or DATA is updated */
195 typedef struct XenPTMSIX
{
196 uint32_t ctrl_offset
;
202 uint32_t table_offset_adjust
; /* page align mmap */
203 uint64_t mmio_base_addr
;
205 void *phys_iomem_base
;
206 XenPTMSIXEntry msix_entry
[];
209 struct XenPCIPassthroughState
{
212 PCIHostDeviceAddress hostaddr
;
215 bool permissive_warned
;
216 XenHostPCIDevice real_device
;
217 XenPTRegion bases
[PCI_NUM_REGIONS
]; /* Access regions */
218 QLIST_HEAD(, XenPTRegGroup
) reg_grps
;
220 uint32_t machine_irq
;
225 MemoryRegion bar
[PCI_NUM_REGIONS
- 1];
228 MemoryListener memory_listener
;
229 MemoryListener io_listener
;
233 void xen_pt_config_init(XenPCIPassthroughState
*s
, Error
**errp
);
234 void xen_pt_config_delete(XenPCIPassthroughState
*s
);
235 XenPTRegGroup
*xen_pt_find_reg_grp(XenPCIPassthroughState
*s
, uint32_t address
);
236 XenPTReg
*xen_pt_find_reg(XenPTRegGroup
*reg_grp
, uint32_t address
);
237 int xen_pt_bar_offset_to_index(uint32_t offset
);
239 static inline pcibus_t
xen_pt_get_emul_size(XenPTBarFlag flag
, pcibus_t r_size
)
241 /* align resource size (memory type only) */
242 if (flag
== XEN_PT_BAR_FLAG_MEM
) {
243 return (r_size
+ XC_PAGE_SIZE
- 1) & XC_PAGE_MASK
;
250 /* The PCI Local Bus Specification, Rev. 3.0,
251 * Section 6.2.4 Miscellaneous Registers, pp 223
252 * outlines 5 valid values for the interrupt pin (intx).
253 * 0: For devices (or device functions) that don't use an interrupt in
259 * Xen uses the following 4 values for intx
265 * Observing that these list of values are not the same, xen_pt_pci_read_intx()
266 * uses the following mapping from hw to xen values.
267 * This seems to reflect the current usage within Xen.
269 * PCI hardware | Xen | Notes
270 * ----------------+-----+----------------------------------------------------
271 * 0 | 0 | No interrupt
276 * any other value | 0 | This should never happen, log error message
279 static inline uint8_t xen_pt_pci_read_intx(XenPCIPassthroughState
*s
)
282 xen_host_pci_get_byte(&s
->real_device
, PCI_INTERRUPT_PIN
, &v
);
286 static inline uint8_t xen_pt_pci_intx(XenPCIPassthroughState
*s
)
288 uint8_t r_val
= xen_pt_pci_read_intx(s
);
290 XEN_PT_LOG(&s
->dev
, "intx=%i\n", r_val
);
291 if (r_val
< 1 || r_val
> 4) {
292 XEN_PT_LOG(&s
->dev
, "Interrupt pin read from hardware is out of range:"
293 " value=%i, acceptable range is 1 - 4\n", r_val
);
296 /* Note that if s.real_device.config_fd is closed we make 0xff. */
304 int xen_pt_msi_setup(XenPCIPassthroughState
*s
);
305 int xen_pt_msi_update(XenPCIPassthroughState
*d
);
306 void xen_pt_msi_disable(XenPCIPassthroughState
*s
);
308 int xen_pt_msix_init(XenPCIPassthroughState
*s
, uint32_t base
);
309 void xen_pt_msix_delete(XenPCIPassthroughState
*s
);
310 void xen_pt_msix_unmap(XenPCIPassthroughState
*s
);
311 int xen_pt_msix_update(XenPCIPassthroughState
*s
);
312 int xen_pt_msix_update_remap(XenPCIPassthroughState
*s
, int bar_index
);
313 void xen_pt_msix_disable(XenPCIPassthroughState
*s
);
315 static inline bool xen_pt_has_msix_mapping(XenPCIPassthroughState
*s
, int bar
)
317 return s
->msix
&& s
->msix
->bar_index
== bar
;
320 extern void *pci_assign_dev_load_option_rom(PCIDevice
*dev
,
323 unsigned int bus
, unsigned int slot
,
324 unsigned int function
);
325 extern bool has_igd_gfx_passthru
;
326 static inline bool is_igd_vga_passthrough(XenHostPCIDevice
*dev
)
328 return (has_igd_gfx_passthru
329 && ((dev
->class_code
>> 0x8) == PCI_CLASS_DISPLAY_VGA
));
331 int xen_pt_register_vga_regions(XenHostPCIDevice
*dev
);
332 int xen_pt_unregister_vga_regions(XenHostPCIDevice
*dev
);
333 void xen_pt_setup_vga(XenPCIPassthroughState
*s
, XenHostPCIDevice
*dev
,
335 #endif /* XEN_PT_H */