2 * sPAPR CPU core device, acts as container of CPU thread devices.
4 * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com>
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
9 #include "qemu/osdep.h"
10 #include "hw/cpu/core.h"
11 #include "hw/ppc/spapr_cpu_core.h"
12 #include "target/ppc/cpu.h"
13 #include "hw/ppc/spapr.h"
14 #include "hw/boards.h"
15 #include "qapi/error.h"
16 #include "sysemu/cpus.h"
17 #include "sysemu/kvm.h"
18 #include "target/ppc/kvm_ppc.h"
19 #include "hw/ppc/ppc.h"
20 #include "target/ppc/mmu-hash64.h"
21 #include "sysemu/numa.h"
22 #include "sysemu/hw_accel.h"
23 #include "qemu/error-report.h"
25 static void spapr_cpu_reset(void *opaque
)
27 PowerPCCPU
*cpu
= opaque
;
28 CPUState
*cs
= CPU(cpu
);
29 CPUPPCState
*env
= &cpu
->env
;
30 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cpu
);
31 SpaprCpuState
*spapr_cpu
= spapr_cpu_state(cpu
);
36 /* All CPUs start halted. CPU0 is unhalted from the machine level
37 * reset code and the rest are explicitly started up by the guest
38 * using an RTAS call */
41 /* Set compatibility mode to match the boot CPU, which was either set
42 * by the machine reset code or by CAS. This should never fail.
44 ppc_set_compat(cpu
, POWERPC_CPU(first_cpu
)->compat_pvr
, &error_abort
);
46 env
->spr
[SPR_HIOR
] = 0;
48 lpcr
= env
->spr
[SPR_LPCR
];
50 /* Set emulated LPCR to not send interrupts to hypervisor. Note that
51 * under KVM, the actual HW LPCR will be set differently by KVM itself,
52 * the settings below ensure proper operations with TCG in absence of
55 * Clearing VPM0 will also cause us to use RMOR in mmu-hash64.c for
56 * real mode accesses, which thankfully defaults to 0 and isn't
57 * accessible in guest mode.
59 * Disable Power-saving mode Exit Cause exceptions for the CPU, so
60 * we don't get spurious wakups before an RTAS start-cpu call.
61 * For the same reason, set PSSCR_EC.
63 lpcr
&= ~(LPCR_VPM0
| LPCR_VPM1
| LPCR_ISL
| LPCR_KBV
| pcc
->lpcr_pm
);
64 lpcr
|= LPCR_LPES0
| LPCR_LPES1
;
65 env
->spr
[SPR_PSSCR
] |= PSSCR_EC
;
67 /* Set RMLS to the max (ie, 16G) */
69 lpcr
|= 1ull << LPCR_RMLS_SHIFT
;
71 ppc_store_lpcr(cpu
, lpcr
);
73 /* Set a full AMOR so guest can use the AMR as it sees fit */
74 env
->spr
[SPR_AMOR
] = 0xffffffffffffffffull
;
76 spapr_cpu
->vpa_addr
= 0;
77 spapr_cpu
->slb_shadow_addr
= 0;
78 spapr_cpu
->slb_shadow_size
= 0;
79 spapr_cpu
->dtl_addr
= 0;
80 spapr_cpu
->dtl_size
= 0;
82 spapr_caps_cpu_apply(SPAPR_MACHINE(qdev_get_machine()), cpu
);
84 kvm_check_mmu(cpu
, &error_fatal
);
87 void spapr_cpu_set_entry_state(PowerPCCPU
*cpu
, target_ulong nip
, target_ulong r3
)
89 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cpu
);
90 CPUPPCState
*env
= &cpu
->env
;
94 kvmppc_set_reg_ppc_online(cpu
, 1);
96 /* Enable Power-saving mode Exit Cause exceptions */
97 ppc_store_lpcr(cpu
, env
->spr
[SPR_LPCR
] | pcc
->lpcr_pm
);
101 * Return the sPAPR CPU core type for @model which essentially is the CPU
102 * model specified with -cpu cmdline option.
104 const char *spapr_get_cpu_core_type(const char *cpu_type
)
106 int len
= strlen(cpu_type
) - strlen(POWERPC_CPU_TYPE_SUFFIX
);
107 char *core_type
= g_strdup_printf(SPAPR_CPU_CORE_TYPE_NAME("%.*s"),
109 ObjectClass
*oc
= object_class_by_name(core_type
);
116 return object_class_get_name(oc
);
119 static bool slb_shadow_needed(void *opaque
)
121 SpaprCpuState
*spapr_cpu
= opaque
;
123 return spapr_cpu
->slb_shadow_addr
!= 0;
126 static const VMStateDescription vmstate_spapr_cpu_slb_shadow
= {
127 .name
= "spapr_cpu/vpa/slb_shadow",
129 .minimum_version_id
= 1,
130 .needed
= slb_shadow_needed
,
131 .fields
= (VMStateField
[]) {
132 VMSTATE_UINT64(slb_shadow_addr
, SpaprCpuState
),
133 VMSTATE_UINT64(slb_shadow_size
, SpaprCpuState
),
134 VMSTATE_END_OF_LIST()
138 static bool dtl_needed(void *opaque
)
140 SpaprCpuState
*spapr_cpu
= opaque
;
142 return spapr_cpu
->dtl_addr
!= 0;
145 static const VMStateDescription vmstate_spapr_cpu_dtl
= {
146 .name
= "spapr_cpu/vpa/dtl",
148 .minimum_version_id
= 1,
149 .needed
= dtl_needed
,
150 .fields
= (VMStateField
[]) {
151 VMSTATE_UINT64(dtl_addr
, SpaprCpuState
),
152 VMSTATE_UINT64(dtl_size
, SpaprCpuState
),
153 VMSTATE_END_OF_LIST()
157 static bool vpa_needed(void *opaque
)
159 SpaprCpuState
*spapr_cpu
= opaque
;
161 return spapr_cpu
->vpa_addr
!= 0;
164 static const VMStateDescription vmstate_spapr_cpu_vpa
= {
165 .name
= "spapr_cpu/vpa",
167 .minimum_version_id
= 1,
168 .needed
= vpa_needed
,
169 .fields
= (VMStateField
[]) {
170 VMSTATE_UINT64(vpa_addr
, SpaprCpuState
),
171 VMSTATE_END_OF_LIST()
173 .subsections
= (const VMStateDescription
* []) {
174 &vmstate_spapr_cpu_slb_shadow
,
175 &vmstate_spapr_cpu_dtl
,
180 static const VMStateDescription vmstate_spapr_cpu_state
= {
183 .minimum_version_id
= 1,
184 .fields
= (VMStateField
[]) {
185 VMSTATE_END_OF_LIST()
187 .subsections
= (const VMStateDescription
* []) {
188 &vmstate_spapr_cpu_vpa
,
193 static void spapr_unrealize_vcpu(PowerPCCPU
*cpu
, SpaprCpuCore
*sc
)
195 if (!sc
->pre_3_0_migration
) {
196 vmstate_unregister(NULL
, &vmstate_spapr_cpu_state
, cpu
->machine_data
);
198 qemu_unregister_reset(spapr_cpu_reset
, cpu
);
199 if (spapr_cpu_state(cpu
)->icp
) {
200 object_unparent(OBJECT(spapr_cpu_state(cpu
)->icp
));
202 if (spapr_cpu_state(cpu
)->tctx
) {
203 object_unparent(OBJECT(spapr_cpu_state(cpu
)->tctx
));
205 cpu_remove_sync(CPU(cpu
));
206 object_unparent(OBJECT(cpu
));
209 static void spapr_cpu_core_unrealize(DeviceState
*dev
, Error
**errp
)
211 SpaprCpuCore
*sc
= SPAPR_CPU_CORE(OBJECT(dev
));
212 CPUCore
*cc
= CPU_CORE(dev
);
215 for (i
= 0; i
< cc
->nr_threads
; i
++) {
216 spapr_unrealize_vcpu(sc
->threads
[i
], sc
);
221 static void spapr_realize_vcpu(PowerPCCPU
*cpu
, SpaprMachineState
*spapr
,
222 SpaprCpuCore
*sc
, Error
**errp
)
224 CPUPPCState
*env
= &cpu
->env
;
225 CPUState
*cs
= CPU(cpu
);
226 Error
*local_err
= NULL
;
228 object_property_set_bool(OBJECT(cpu
), true, "realized", &local_err
);
233 /* Set time-base frequency to 512 MHz */
234 cpu_ppc_tb_init(env
, SPAPR_TIMEBASE_FREQ
);
236 cpu_ppc_set_vhyp(cpu
, PPC_VIRTUAL_HYPERVISOR(spapr
));
237 kvmppc_set_papr(cpu
);
239 qemu_register_reset(spapr_cpu_reset
, cpu
);
240 spapr_cpu_reset(cpu
);
242 spapr
->irq
->cpu_intc_create(spapr
, cpu
, &local_err
);
244 goto error_unregister
;
247 if (!sc
->pre_3_0_migration
) {
248 vmstate_register(NULL
, cs
->cpu_index
, &vmstate_spapr_cpu_state
,
255 qemu_unregister_reset(spapr_cpu_reset
, cpu
);
256 cpu_remove_sync(CPU(cpu
));
258 error_propagate(errp
, local_err
);
261 static PowerPCCPU
*spapr_create_vcpu(SpaprCpuCore
*sc
, int i
, Error
**errp
)
263 SpaprCpuCoreClass
*scc
= SPAPR_CPU_CORE_GET_CLASS(sc
);
264 CPUCore
*cc
= CPU_CORE(sc
);
269 Error
*local_err
= NULL
;
271 obj
= object_new(scc
->cpu_type
);
274 cpu
= POWERPC_CPU(obj
);
275 cs
->cpu_index
= cc
->core_id
+ i
;
276 spapr_set_vcpu_id(cpu
, cs
->cpu_index
, &local_err
);
281 cpu
->node_id
= sc
->node_id
;
283 id
= g_strdup_printf("thread[%d]", i
);
284 object_property_add_child(OBJECT(sc
), id
, obj
, &local_err
);
290 cpu
->machine_data
= g_new0(SpaprCpuState
, 1);
297 error_propagate(errp
, local_err
);
301 static void spapr_delete_vcpu(PowerPCCPU
*cpu
, SpaprCpuCore
*sc
)
303 SpaprCpuState
*spapr_cpu
= spapr_cpu_state(cpu
);
305 cpu
->machine_data
= NULL
;
307 object_unparent(OBJECT(cpu
));
310 static void spapr_cpu_core_realize(DeviceState
*dev
, Error
**errp
)
312 /* We don't use SPAPR_MACHINE() in order to exit gracefully if the user
313 * tries to add a sPAPR CPU core to a non-pseries machine.
315 SpaprMachineState
*spapr
=
316 (SpaprMachineState
*) object_dynamic_cast(qdev_get_machine(),
318 SpaprCpuCore
*sc
= SPAPR_CPU_CORE(OBJECT(dev
));
319 CPUCore
*cc
= CPU_CORE(OBJECT(dev
));
320 Error
*local_err
= NULL
;
324 error_setg(errp
, TYPE_SPAPR_CPU_CORE
" needs a pseries machine");
328 sc
->threads
= g_new(PowerPCCPU
*, cc
->nr_threads
);
329 for (i
= 0; i
< cc
->nr_threads
; i
++) {
330 sc
->threads
[i
] = spapr_create_vcpu(sc
, i
, &local_err
);
336 for (j
= 0; j
< cc
->nr_threads
; j
++) {
337 spapr_realize_vcpu(sc
->threads
[j
], spapr
, sc
, &local_err
);
346 spapr_unrealize_vcpu(sc
->threads
[j
], sc
);
350 spapr_delete_vcpu(sc
->threads
[i
], sc
);
353 error_propagate(errp
, local_err
);
356 static Property spapr_cpu_core_properties
[] = {
357 DEFINE_PROP_INT32("node-id", SpaprCpuCore
, node_id
, CPU_UNSET_NUMA_NODE_ID
),
358 DEFINE_PROP_BOOL("pre-3.0-migration", SpaprCpuCore
, pre_3_0_migration
,
360 DEFINE_PROP_END_OF_LIST()
363 static void spapr_cpu_core_class_init(ObjectClass
*oc
, void *data
)
365 DeviceClass
*dc
= DEVICE_CLASS(oc
);
366 SpaprCpuCoreClass
*scc
= SPAPR_CPU_CORE_CLASS(oc
);
368 dc
->realize
= spapr_cpu_core_realize
;
369 dc
->unrealize
= spapr_cpu_core_unrealize
;
370 dc
->props
= spapr_cpu_core_properties
;
371 scc
->cpu_type
= data
;
374 #define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \
376 .parent = TYPE_SPAPR_CPU_CORE, \
377 .class_data = (void *) POWERPC_CPU_TYPE_NAME(cpu_model), \
378 .class_init = spapr_cpu_core_class_init, \
379 .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \
382 static const TypeInfo spapr_cpu_core_type_infos
[] = {
384 .name
= TYPE_SPAPR_CPU_CORE
,
385 .parent
= TYPE_CPU_CORE
,
387 .instance_size
= sizeof(SpaprCpuCore
),
388 .class_size
= sizeof(SpaprCpuCoreClass
),
390 DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"),
391 DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"),
392 DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"),
393 DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"),
394 DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"),
395 DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"),
396 DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"),
397 DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"),
398 DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"),
399 DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"),
400 DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
402 DEFINE_SPAPR_CPU_CORE_TYPE("host"),
406 DEFINE_TYPES(spapr_cpu_core_type_infos
)