?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
wxx: Update NSIS configuration
[qemu/ar7.git] / memory.c
blob21a26f54dabfcef293a8bf1771d13f709b00c24d
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "qemu-common.h"
19 #include "cpu.h"
20 #include "exec/exec-all.h" /* qemu_sprint_backtrace */
21 #include "exec/memory.h"
22 #include "exec/address-spaces.h"
23 #include "exec/ioport.h"
24 #include "qapi/visitor.h"
25 #include "qemu/bitops.h"
26 #include "qemu/error-report.h"
27 #include "qom/object.h"
28 #include "trace.h"
29
30 #include "exec/memory-internal.h"
31 #include "exec/ram_addr.h"
32 #include "sysemu/kvm.h"
33 #include "sysemu/sysemu.h"
34
35 //#define DEBUG_UNASSIGNED
36
37 static unsigned memory_region_transaction_depth;
38 static bool memory_region_update_pending;
39 static bool ioeventfd_update_pending;
40 static bool global_dirty_log = false;
41
42 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
43 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
44
45 static QTAILQ_HEAD(, AddressSpace) address_spaces
46 = QTAILQ_HEAD_INITIALIZER(address_spaces);
47
48 typedef struct AddrRange AddrRange;
49
50 /*
51 * Note that signed integers are needed for negative offsetting in aliases
52 * (large MemoryRegion::alias_offset).
53 */
54 struct AddrRange {
55 Int128 start;
56 Int128 size;
57 };
58
59 static AddrRange addrrange_make(Int128 start, Int128 size)
60 {
61 return (AddrRange) { start, size };
62 }
63
64 static bool addrrange_equal(AddrRange r1, AddrRange r2)
65 {
66 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
67 }
68
69 static Int128 addrrange_end(AddrRange r)
70 {
71 return int128_add(r.start, r.size);
72 }
73
74 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
75 {
76 int128_addto(&range.start, delta);
77 return range;
78 }
79
80 static bool addrrange_contains(AddrRange range, Int128 addr)
81 {
82 return int128_ge(addr, range.start)
83 && int128_lt(addr, addrrange_end(range));
84 }
85
86 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
87 {
88 return addrrange_contains(r1, r2.start)
89 || addrrange_contains(r2, r1.start);
90 }
91
92 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
93 {
94 Int128 start = int128_max(r1.start, r2.start);
95 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
96 return addrrange_make(start, int128_sub(end, start));
97 }
98
99 enum ListenerDirection { Forward, Reverse };
100
101 static bool memory_listener_match(MemoryListener *listener,
102 MemoryRegionSection *section)
103 {
104 return !listener->address_space_filter
105 || listener->address_space_filter == section->address_space;
106 }
107
108 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
109 do { \
110 MemoryListener *_listener; \
111 \
112 switch (_direction) { \
113 case Forward: \
114 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
115 if (_listener->_callback) { \
116 _listener->_callback(_listener, ##_args); \
117 } \
118 } \
119 break; \
120 case Reverse: \
121 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
122 memory_listeners, link) { \
123 if (_listener->_callback) { \
124 _listener->_callback(_listener, ##_args); \
125 } \
126 } \
127 break; \
128 default: \
129 abort(); \
130 } \
131 } while (0)
132
133 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
134 do { \
135 MemoryListener *_listener; \
136 \
137 switch (_direction) { \
138 case Forward: \
139 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
140 if (_listener->_callback \
141 && memory_listener_match(_listener, _section)) { \
142 _listener->_callback(_listener, _section, ##_args); \
143 } \
144 } \
145 break; \
146 case Reverse: \
147 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
148 memory_listeners, link) { \
149 if (_listener->_callback \
150 && memory_listener_match(_listener, _section)) { \
151 _listener->_callback(_listener, _section, ##_args); \
152 } \
153 } \
154 break; \
155 default: \
156 abort(); \
157 } \
158 } while (0)
159
160 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
161 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
162 do { \
163 MemoryRegionSection mrs = section_from_flat_range(fr, as); \
164 MEMORY_LISTENER_CALL(callback, dir, &mrs, ##_args); \
165 } while(0)
166
167 struct CoalescedMemoryRange {
168 AddrRange addr;
169 QTAILQ_ENTRY(CoalescedMemoryRange) link;
170 };
171
172 struct MemoryRegionIoeventfd {
173 AddrRange addr;
174 bool match_data;
175 uint64_t data;
176 EventNotifier *e;
177 };
178
179 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
180 MemoryRegionIoeventfd b)
181 {
182 if (int128_lt(a.addr.start, b.addr.start)) {
183 return true;
184 } else if (int128_gt(a.addr.start, b.addr.start)) {
185 return false;
186 } else if (int128_lt(a.addr.size, b.addr.size)) {
187 return true;
188 } else if (int128_gt(a.addr.size, b.addr.size)) {
189 return false;
190 } else if (a.match_data < b.match_data) {
191 return true;
192 } else if (a.match_data > b.match_data) {
193 return false;
194 } else if (a.match_data) {
195 if (a.data < b.data) {
196 return true;
197 } else if (a.data > b.data) {
198 return false;
199 }
200 }
201 if (a.e < b.e) {
202 return true;
203 } else if (a.e > b.e) {
204 return false;
205 }
206 return false;
207 }
208
209 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
210 MemoryRegionIoeventfd b)
211 {
212 return !memory_region_ioeventfd_before(a, b)
213 && !memory_region_ioeventfd_before(b, a);
214 }
215
216 typedef struct FlatRange FlatRange;
217 typedef struct FlatView FlatView;
218
219 /* Range of memory in the global map. Addresses are absolute. */
220 struct FlatRange {
221 MemoryRegion *mr;
222 hwaddr offset_in_region;
223 AddrRange addr;
224 uint8_t dirty_log_mask;
225 bool romd_mode;
226 bool readonly;
227 };
228
229 /* Flattened global view of current active memory hierarchy. Kept in sorted
230 * order.
231 */
232 struct FlatView {
233 struct rcu_head rcu;
234 unsigned ref;
235 FlatRange *ranges;
236 unsigned nr;
237 unsigned nr_allocated;
238 };
239
240 typedef struct AddressSpaceOps AddressSpaceOps;
241
242 #define FOR_EACH_FLAT_RANGE(var, view) \
243 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
244
245 static inline MemoryRegionSection
246 section_from_flat_range(FlatRange *fr, AddressSpace *as)
247 {
248 return (MemoryRegionSection) {
249 .mr = fr->mr,
250 .address_space = as,
251 .offset_within_region = fr->offset_in_region,
252 .size = fr->addr.size,
253 .offset_within_address_space = int128_get64(fr->addr.start),
254 .readonly = fr->readonly,
255 };
256 }
257
258 static bool flatrange_equal(FlatRange *a, FlatRange *b)
259 {
260 return a->mr == b->mr
261 && addrrange_equal(a->addr, b->addr)
262 && a->offset_in_region == b->offset_in_region
263 && a->romd_mode == b->romd_mode
264 && a->readonly == b->readonly;
265 }
266
267 static void flatview_init(FlatView *view)
268 {
269 view->ref = 1;
270 view->ranges = NULL;
271 view->nr = 0;
272 view->nr_allocated = 0;
273 }
274
275 /* Insert a range into a given position. Caller is responsible for maintaining
276 * sorting order.
277 */
278 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
279 {
280 if (view->nr == view->nr_allocated) {
281 view->nr_allocated = MAX(2 * view->nr, 10);
282 view->ranges = g_realloc(view->ranges,
283 view->nr_allocated * sizeof(*view->ranges));
284 }
285 memmove(view->ranges + pos + 1, view->ranges + pos,
286 (view->nr - pos) * sizeof(FlatRange));
287 view->ranges[pos] = *range;
288 memory_region_ref(range->mr);
289 ++view->nr;
290 }
291
292 static void flatview_destroy(FlatView *view)
293 {
294 int i;
295
296 for (i = 0; i < view->nr; i++) {
297 memory_region_unref(view->ranges[i].mr);
298 }
299 g_free(view->ranges);
300 g_free(view);
301 }
302
303 static void flatview_ref(FlatView *view)
304 {
305 atomic_inc(&view->ref);
306 }
307
308 static void flatview_unref(FlatView *view)
309 {
310 if (atomic_fetch_dec(&view->ref) == 1) {
311 flatview_destroy(view);
312 }
313 }
314
315 static bool can_merge(FlatRange *r1, FlatRange *r2)
316 {
317 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
318 && r1->mr == r2->mr
319 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
320 r1->addr.size),
321 int128_make64(r2->offset_in_region))
322 && r1->dirty_log_mask == r2->dirty_log_mask
323 && r1->romd_mode == r2->romd_mode
324 && r1->readonly == r2->readonly;
325 }
326
327 /* Attempt to simplify a view by merging adjacent ranges */
328 static void flatview_simplify(FlatView *view)
329 {
330 unsigned i, j;
331
332 i = 0;
333 while (i < view->nr) {
334 j = i + 1;
335 while (j < view->nr
336 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
337 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
338 ++j;
339 }
340 ++i;
341 memmove(&view->ranges[i], &view->ranges[j],
342 (view->nr - j) * sizeof(view->ranges[j]));
343 view->nr -= j - i;
344 }
345 }
346
347 static bool memory_region_big_endian(MemoryRegion *mr)
348 {
349 #ifdef TARGET_WORDS_BIGENDIAN
350 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
351 #else
352 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
353 #endif
354 }
355
356 static bool memory_region_wrong_endianness(MemoryRegion *mr)
357 {
358 #ifdef TARGET_WORDS_BIGENDIAN
359 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
360 #else
361 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
362 #endif
363 }
364
365 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
366 {
367 if (memory_region_wrong_endianness(mr)) {
368 switch (size) {
369 case 1:
370 break;
371 case 2:
372 *data = bswap16(*data);
373 break;
374 case 4:
375 *data = bswap32(*data);
376 break;
377 case 8:
378 *data = bswap64(*data);
379 break;
380 default:
381 abort();
382 }
383 }
384 }
385
386 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
387 {
388 MemoryRegion *root;
389 hwaddr abs_addr = offset;
390
391 abs_addr += mr->addr;
392 for (root = mr; root->container; ) {
393 root = root->container;
394 abs_addr += root->addr;
395 }
396
397 return abs_addr;
398 }
399
400 static int get_cpu_index(void)
401 {
402 if (current_cpu) {
403 return current_cpu->cpu_index;
404 }
405 return -1;
406 }
407
408 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
409 hwaddr addr,
410 uint64_t *value,
411 unsigned size,
412 unsigned shift,
413 uint64_t mask,
414 MemTxAttrs attrs)
415 {
416 uint64_t tmp;
417
418 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
419 if (mr->subpage) {
420 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
421 } else if (mr == &io_mem_notdirty) {
422 /* Accesses to code which has previously been translated into a TB show
423 * up in the MMIO path, as accesses to the io_mem_notdirty
424 * MemoryRegion. */
425 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
426 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
427 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
428 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
429 }
430 *value |= (tmp & mask) << shift;
431 return MEMTX_OK;
432 }
433
434 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
435 hwaddr addr,
436 uint64_t *value,
437 unsigned size,
438 unsigned shift,
439 uint64_t mask,
440 MemTxAttrs attrs)
441 {
442 uint64_t tmp;
443
444 tmp = mr->ops->read(mr->opaque, addr, size);
445 if (mr->subpage) {
446 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
447 } else if (mr == &io_mem_notdirty) {
448 /* Accesses to code which has previously been translated into a TB show
449 * up in the MMIO path, as accesses to the io_mem_notdirty
450 * MemoryRegion. */
451 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
452 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
453 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
454 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
455 }
456 *value |= (tmp & mask) << shift;
457 return MEMTX_OK;
458 }
459
460 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
461 hwaddr addr,
462 uint64_t *value,
463 unsigned size,
464 unsigned shift,
465 uint64_t mask,
466 MemTxAttrs attrs)
467 {
468 uint64_t tmp = 0;
469 MemTxResult r;
470
471 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
472 if (mr->subpage) {
473 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
474 } else if (mr == &io_mem_notdirty) {
475 /* Accesses to code which has previously been translated into a TB show
476 * up in the MMIO path, as accesses to the io_mem_notdirty
477 * MemoryRegion. */
478 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
479 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
480 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
481 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
482 }
483 *value |= (tmp & mask) << shift;
484 return r;
485 }
486
487 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
488 hwaddr addr,
489 uint64_t *value,
490 unsigned size,
491 unsigned shift,
492 uint64_t mask,
493 MemTxAttrs attrs)
494 {
495 uint64_t tmp;
496
497 tmp = (*value >> shift) & mask;
498 if (mr->subpage) {
499 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
500 } else if (mr == &io_mem_notdirty) {
501 /* Accesses to code which has previously been translated into a TB show
502 * up in the MMIO path, as accesses to the io_mem_notdirty
503 * MemoryRegion. */
504 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
505 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
506 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
507 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
508 }
509 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
510 return MEMTX_OK;
511 }
512
513 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
514 hwaddr addr,
515 uint64_t *value,
516 unsigned size,
517 unsigned shift,
518 uint64_t mask,
519 MemTxAttrs attrs)
520 {
521 uint64_t tmp;
522
523 tmp = (*value >> shift) & mask;
524 if (mr->subpage) {
525 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
526 } else if (mr == &io_mem_notdirty) {
527 /* Accesses to code which has previously been translated into a TB show
528 * up in the MMIO path, as accesses to the io_mem_notdirty
529 * MemoryRegion. */
530 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
531 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
532 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
533 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
534 }
535 mr->ops->write(mr->opaque, addr, tmp, size);
536 return MEMTX_OK;
537 }
538
539 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
540 hwaddr addr,
541 uint64_t *value,
542 unsigned size,
543 unsigned shift,
544 uint64_t mask,
545 MemTxAttrs attrs)
546 {
547 uint64_t tmp;
548
549 tmp = (*value >> shift) & mask;
550 if (mr->subpage) {
551 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
552 } else if (mr == &io_mem_notdirty) {
553 /* Accesses to code which has previously been translated into a TB show
554 * up in the MMIO path, as accesses to the io_mem_notdirty
555 * MemoryRegion. */
556 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
557 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
558 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
559 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
560 }
561 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
562 }
563
564 static MemTxResult access_with_adjusted_size(hwaddr addr,
565 uint64_t *value,
566 unsigned size,
567 unsigned access_size_min,
568 unsigned access_size_max,
569 MemTxResult (*access)(MemoryRegion *mr,
570 hwaddr addr,
571 uint64_t *value,
572 unsigned size,
573 unsigned shift,
574 uint64_t mask,
575 MemTxAttrs attrs),
576 MemoryRegion *mr,
577 MemTxAttrs attrs)
578 {
579 uint64_t access_mask;
580 unsigned access_size;
581 unsigned i;
582 MemTxResult r = MEMTX_OK;
583
584 if (!access_size_min) {
585 access_size_min = 1;
586 }
587 if (!access_size_max) {
588 access_size_max = 4;
589 }
590
591 /* FIXME: support unaligned access? */
592 access_size = MAX(MIN(size, access_size_max), access_size_min);
593 access_mask = -1ULL >> (64 - access_size * 8);
594 if (memory_region_big_endian(mr)) {
595 for (i = 0; i < size; i += access_size) {
596 r |= access(mr, addr + i, value, access_size,
597 (size - access_size - i) * 8, access_mask, attrs);
598 }
599 } else {
600 for (i = 0; i < size; i += access_size) {
601 r |= access(mr, addr + i, value, access_size, i * 8,
602 access_mask, attrs);
603 }
604 }
605 return r;
606 }
607
608 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
609 {
610 AddressSpace *as;
611
612 while (mr->container) {
613 mr = mr->container;
614 }
615 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
616 if (mr == as->root) {
617 return as;
618 }
619 }
620 return NULL;
621 }
622
623 /* Render a memory region into the global view. Ranges in @view obscure
624 * ranges in @mr.
625 */
626 static void render_memory_region(FlatView *view,
627 MemoryRegion *mr,
628 Int128 base,
629 AddrRange clip,
630 bool readonly)
631 {
632 MemoryRegion *subregion;
633 unsigned i;
634 hwaddr offset_in_region;
635 Int128 remain;
636 Int128 now;
637 FlatRange fr;
638 AddrRange tmp;
639
640 if (!mr->enabled) {
641 return;
642 }
643
644 int128_addto(&base, int128_make64(mr->addr));
645 readonly |= mr->readonly;
646
647 tmp = addrrange_make(base, mr->size);
648
649 if (!addrrange_intersects(tmp, clip)) {
650 return;
651 }
652
653 clip = addrrange_intersection(tmp, clip);
654
655 if (mr->alias) {
656 int128_subfrom(&base, int128_make64(mr->alias->addr));
657 int128_subfrom(&base, int128_make64(mr->alias_offset));
658 render_memory_region(view, mr->alias, base, clip, readonly);
659 return;
660 }
661
662 /* Render subregions in priority order. */
663 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
664 render_memory_region(view, subregion, base, clip, readonly);
665 }
666
667 if (!mr->terminates) {
668 return;
669 }
670
671 offset_in_region = int128_get64(int128_sub(clip.start, base));
672 base = clip.start;
673 remain = clip.size;
674
675 fr.mr = mr;
676 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
677 fr.romd_mode = mr->romd_mode;
678 fr.readonly = readonly;
679
680 /* Render the region itself into any gaps left by the current view. */
681 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
682 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
683 continue;
684 }
685 if (int128_lt(base, view->ranges[i].addr.start)) {
686 now = int128_min(remain,
687 int128_sub(view->ranges[i].addr.start, base));
688 fr.offset_in_region = offset_in_region;
689 fr.addr = addrrange_make(base, now);
690 flatview_insert(view, i, &fr);
691 ++i;
692 int128_addto(&base, now);
693 offset_in_region += int128_get64(now);
694 int128_subfrom(&remain, now);
695 }
696 now = int128_sub(int128_min(int128_add(base, remain),
697 addrrange_end(view->ranges[i].addr)),
698 base);
699 int128_addto(&base, now);
700 offset_in_region += int128_get64(now);
701 int128_subfrom(&remain, now);
702 }
703 if (int128_nz(remain)) {
704 fr.offset_in_region = offset_in_region;
705 fr.addr = addrrange_make(base, remain);
706 flatview_insert(view, i, &fr);
707 }
708 }
709
710 /* Render a memory topology into a list of disjoint absolute ranges. */
711 static FlatView *generate_memory_topology(MemoryRegion *mr)
712 {
713 FlatView *view;
714
715 view = g_new(FlatView, 1);
716 flatview_init(view);
717
718 if (mr) {
719 render_memory_region(view, mr, int128_zero(),
720 addrrange_make(int128_zero(), int128_2_64()), false);
721 }
722 flatview_simplify(view);
723
724 return view;
725 }
726
727 static void address_space_add_del_ioeventfds(AddressSpace *as,
728 MemoryRegionIoeventfd *fds_new,
729 unsigned fds_new_nb,
730 MemoryRegionIoeventfd *fds_old,
731 unsigned fds_old_nb)
732 {
733 unsigned iold, inew;
734 MemoryRegionIoeventfd *fd;
735 MemoryRegionSection section;
736
737 /* Generate a symmetric difference of the old and new fd sets, adding
738 * and deleting as necessary.
739 */
740
741 iold = inew = 0;
742 while (iold < fds_old_nb || inew < fds_new_nb) {
743 if (iold < fds_old_nb
744 && (inew == fds_new_nb
745 || memory_region_ioeventfd_before(fds_old[iold],
746 fds_new[inew]))) {
747 fd = &fds_old[iold];
748 section = (MemoryRegionSection) {
749 .address_space = as,
750 .offset_within_address_space = int128_get64(fd->addr.start),
751 .size = fd->addr.size,
752 };
753 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
754 fd->match_data, fd->data, fd->e);
755 ++iold;
756 } else if (inew < fds_new_nb
757 && (iold == fds_old_nb
758 || memory_region_ioeventfd_before(fds_new[inew],
759 fds_old[iold]))) {
760 fd = &fds_new[inew];
761 section = (MemoryRegionSection) {
762 .address_space = as,
763 .offset_within_address_space = int128_get64(fd->addr.start),
764 .size = fd->addr.size,
765 };
766 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
767 fd->match_data, fd->data, fd->e);
768 ++inew;
769 } else {
770 ++iold;
771 ++inew;
772 }
773 }
774 }
775
776 static FlatView *address_space_get_flatview(AddressSpace *as)
777 {
778 FlatView *view;
779
780 rcu_read_lock();
781 view = atomic_rcu_read(&as->current_map);
782 flatview_ref(view);
783 rcu_read_unlock();
784 return view;
785 }
786
787 static void address_space_update_ioeventfds(AddressSpace *as)
788 {
789 FlatView *view;
790 FlatRange *fr;
791 unsigned ioeventfd_nb = 0;
792 MemoryRegionIoeventfd *ioeventfds = NULL;
793 AddrRange tmp;
794 unsigned i;
795
796 view = address_space_get_flatview(as);
797 FOR_EACH_FLAT_RANGE(fr, view) {
798 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
799 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
800 int128_sub(fr->addr.start,
801 int128_make64(fr->offset_in_region)));
802 if (addrrange_intersects(fr->addr, tmp)) {
803 ++ioeventfd_nb;
804 ioeventfds = g_realloc(ioeventfds,
805 ioeventfd_nb * sizeof(*ioeventfds));
806 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
807 ioeventfds[ioeventfd_nb-1].addr = tmp;
808 }
809 }
810 }
811
812 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
813 as->ioeventfds, as->ioeventfd_nb);
814
815 g_free(as->ioeventfds);
816 as->ioeventfds = ioeventfds;
817 as->ioeventfd_nb = ioeventfd_nb;
818 flatview_unref(view);
819 }
820
821 static void address_space_update_topology_pass(AddressSpace *as,
822 const FlatView *old_view,
823 const FlatView *new_view,
824 bool adding)
825 {
826 unsigned iold, inew;
827 FlatRange *frold, *frnew;
828
829 /* Generate a symmetric difference of the old and new memory maps.
830 * Kill ranges in the old map, and instantiate ranges in the new map.
831 */
832 iold = inew = 0;
833 while (iold < old_view->nr || inew < new_view->nr) {
834 if (iold < old_view->nr) {
835 frold = &old_view->ranges[iold];
836 } else {
837 frold = NULL;
838 }
839 if (inew < new_view->nr) {
840 frnew = &new_view->ranges[inew];
841 } else {
842 frnew = NULL;
843 }
844
845 if (frold
846 && (!frnew
847 || int128_lt(frold->addr.start, frnew->addr.start)
848 || (int128_eq(frold->addr.start, frnew->addr.start)
849 && !flatrange_equal(frold, frnew)))) {
850 /* In old but not in new, or in both but attributes changed. */
851
852 if (!adding) {
853 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
854 }
855
856 ++iold;
857 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
858 /* In both and unchanged (except logging may have changed) */
859
860 if (adding) {
861 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
862 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
863 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
864 frold->dirty_log_mask,
865 frnew->dirty_log_mask);
866 }
867 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
868 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
869 frold->dirty_log_mask,
870 frnew->dirty_log_mask);
871 }
872 }
873
874 ++iold;
875 ++inew;
876 } else {
877 /* In new */
878
879 if (adding) {
880 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
881 }
882
883 ++inew;
884 }
885 }
886 }
887
888
889 static void address_space_update_topology(AddressSpace *as)
890 {
891 FlatView *old_view = address_space_get_flatview(as);
892 FlatView *new_view = generate_memory_topology(as->root);
893
894 address_space_update_topology_pass(as, old_view, new_view, false);
895 address_space_update_topology_pass(as, old_view, new_view, true);
896
897 /* Writes are protected by the BQL. */
898 atomic_rcu_set(&as->current_map, new_view);
899 call_rcu(old_view, flatview_unref, rcu);
900
901 /* Note that all the old MemoryRegions are still alive up to this
902 * point. This relieves most MemoryListeners from the need to
903 * ref/unref the MemoryRegions they get---unless they use them
904 * outside the iothread mutex, in which case precise reference
905 * counting is necessary.
906 */
907 flatview_unref(old_view);
908
909 address_space_update_ioeventfds(as);
910 }
911
912 void memory_region_transaction_begin(void)
913 {
914 qemu_flush_coalesced_mmio_buffer();
915 ++memory_region_transaction_depth;
916 }
917
918 static void memory_region_clear_pending(void)
919 {
920 memory_region_update_pending = false;
921 ioeventfd_update_pending = false;
922 }
923
924 void memory_region_transaction_commit(void)
925 {
926 AddressSpace *as;
927
928 assert(memory_region_transaction_depth);
929 --memory_region_transaction_depth;
930 if (!memory_region_transaction_depth) {
931 if (memory_region_update_pending) {
932 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
933
934 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
935 address_space_update_topology(as);
936 }
937
938 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
939 } else if (ioeventfd_update_pending) {
940 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
941 address_space_update_ioeventfds(as);
942 }
943 }
944 memory_region_clear_pending();
945 }
946 }
947
948 static void memory_region_destructor_none(MemoryRegion *mr)
949 {
950 }
951
952 static void memory_region_destructor_ram(MemoryRegion *mr)
953 {
954 qemu_ram_free(mr->ram_block);
955 }
956
957 static bool memory_region_need_escape(char c)
958 {
959 return c == '/' || c == '[' || c == '\\' || c == ']';
960 }
961
962 static char *memory_region_escape_name(const char *name)
963 {
964 const char *p;
965 char *escaped, *q;
966 uint8_t c;
967 size_t bytes = 0;
968
969 for (p = name; *p; p++) {
970 bytes += memory_region_need_escape(*p) ? 4 : 1;
971 }
972 if (bytes == p - name) {
973 return g_memdup(name, bytes + 1);
974 }
975
976 escaped = g_malloc(bytes + 1);
977 for (p = name, q = escaped; *p; p++) {
978 c = *p;
979 if (unlikely(memory_region_need_escape(c))) {
980 *q++ = '\\';
981 *q++ = 'x';
982 *q++ = "0123456789abcdef"[c >> 4];
983 c = "0123456789abcdef"[c & 15];
984 }
985 *q++ = c;
986 }
987 *q = 0;
988 return escaped;
989 }
990
991 void memory_region_init(MemoryRegion *mr,
992 Object *owner,
993 const char *name,
994 uint64_t size)
995 {
996 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
997 mr->size = int128_make64(size);
998 if (size == UINT64_MAX) {
999 mr->size = int128_2_64();
1000 }
1001 mr->name = g_strdup(name);
1002 mr->owner = owner;
1003 mr->ram_block = NULL;
1004
1005 if (name) {
1006 char *escaped_name = memory_region_escape_name(name);
1007 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1008
1009 if (!owner) {
1010 owner = container_get(qdev_get_machine(), "/unattached");
1011 }
1012
1013 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1014 object_unref(OBJECT(mr));
1015 g_free(name_array);
1016 g_free(escaped_name);
1017 }
1018 }
1019
1020 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1021 void *opaque, Error **errp)
1022 {
1023 MemoryRegion *mr = MEMORY_REGION(obj);
1024 uint64_t value = mr->addr;
1025
1026 visit_type_uint64(v, name, &value, errp);
1027 }
1028
1029 static void memory_region_get_container(Object *obj, Visitor *v,
1030 const char *name, void *opaque,
1031 Error **errp)
1032 {
1033 MemoryRegion *mr = MEMORY_REGION(obj);
1034 gchar *path = (gchar *)"";
1035
1036 if (mr->container) {
1037 path = object_get_canonical_path(OBJECT(mr->container));
1038 }
1039 visit_type_str(v, name, &path, errp);
1040 if (mr->container) {
1041 g_free(path);
1042 }
1043 }
1044
1045 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1046 const char *part)
1047 {
1048 MemoryRegion *mr = MEMORY_REGION(obj);
1049
1050 return OBJECT(mr->container);
1051 }
1052
1053 static void memory_region_get_priority(Object *obj, Visitor *v,
1054 const char *name, void *opaque,
1055 Error **errp)
1056 {
1057 MemoryRegion *mr = MEMORY_REGION(obj);
1058 int32_t value = mr->priority;
1059
1060 visit_type_int32(v, name, &value, errp);
1061 }
1062
1063 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1064 void *opaque, Error **errp)
1065 {
1066 MemoryRegion *mr = MEMORY_REGION(obj);
1067 uint64_t value = memory_region_size(mr);
1068
1069 visit_type_uint64(v, name, &value, errp);
1070 }
1071
1072 static void memory_region_initfn(Object *obj)
1073 {
1074 MemoryRegion *mr = MEMORY_REGION(obj);
1075 ObjectProperty *op;
1076
1077 mr->ops = &unassigned_mem_ops;
1078 mr->enabled = true;
1079 mr->romd_mode = true;
1080 mr->global_locking = true;
1081 mr->destructor = memory_region_destructor_none;
1082 QTAILQ_INIT(&mr->subregions);
1083 QTAILQ_INIT(&mr->coalesced);
1084
1085 op = object_property_add(OBJECT(mr), "container",
1086 "link<" TYPE_MEMORY_REGION ">",
1087 memory_region_get_container,
1088 NULL, /* memory_region_set_container */
1089 NULL, NULL, &error_abort);
1090 op->resolve = memory_region_resolve_container;
1091
1092 object_property_add(OBJECT(mr), "addr", "uint64",
1093 memory_region_get_addr,
1094 NULL, /* memory_region_set_addr */
1095 NULL, NULL, &error_abort);
1096 object_property_add(OBJECT(mr), "priority", "uint32",
1097 memory_region_get_priority,
1098 NULL, /* memory_region_set_priority */
1099 NULL, NULL, &error_abort);
1100 object_property_add(OBJECT(mr), "size", "uint64",
1101 memory_region_get_size,
1102 NULL, /* memory_region_set_size, */
1103 NULL, NULL, &error_abort);
1104 }
1105
1106 static int qemu_target_backtrace(target_ulong *array, size_t size)
1107 {
1108 int n = 0;
1109 if (size >= 2) {
1110 #if defined(TARGET_ARM)
1111 CPUArchState *env = current_cpu->env_ptr;
1112 array[0] = env->regs[15];
1113 array[1] = env->regs[14];
1114 #elif defined(TARGET_MIPS)
1115 CPUArchState *env = current_cpu->env_ptr;
1116 array[0] = env->active_tc.PC;
1117 array[1] = env->active_tc.gpr[31];
1118 #else
1119 array[0] = 0;
1120 array[1] = 0;
1121 #endif
1122 n = 2;
1123 }
1124 return n;
1125 }
1126
1127 #include "disas/disas.h"
1128 const char *qemu_sprint_backtrace(char *buffer, size_t length)
1129 {
1130 char *p = buffer;
1131 if (current_cpu) {
1132 target_ulong caller[2];
1133 const char *symbol;
1134 qemu_target_backtrace(caller, 2);
1135 symbol = lookup_symbol(caller[0]);
1136 p += sprintf(p, "[%s]", symbol);
1137 symbol = lookup_symbol(caller[1]);
1138 p += sprintf(p, "[%s]", symbol);
1139 } else {
1140 p += sprintf(p, "[cpu not running]");
1141 }
1142 assert((p - buffer) < length);
1143 return buffer;
1144 }
1145
1146 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1147 unsigned size)
1148 {
1149 if (trace_unassigned) {
1150 char buffer[256];
1151 fprintf(stderr, "Unassigned mem read " TARGET_FMT_plx " %s\n",
1152 addr, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1153 }
1154 //~ vm_stop(0);
1155 if (current_cpu != NULL) {
1156 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1157 }
1158 return 0;
1159 }
1160
1161 static void unassigned_mem_write(void *opaque, hwaddr addr,
1162 uint64_t val, unsigned size)
1163 {
1164 if (trace_unassigned) {
1165 char buffer[256];
1166 fprintf(stderr, "Unassigned mem write " TARGET_FMT_plx
1167 " = 0x%" PRIx64 " %s\n",
1168 addr, val, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1169 }
1170 if (current_cpu != NULL) {
1171 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1172 }
1173 }
1174
1175 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1176 unsigned size, bool is_write)
1177 {
1178 return false;
1179 }
1180
1181 const MemoryRegionOps unassigned_mem_ops = {
1182 .valid.accepts = unassigned_mem_accepts,
1183 .endianness = DEVICE_NATIVE_ENDIAN,
1184 };
1185
1186 bool memory_region_access_valid(MemoryRegion *mr,
1187 hwaddr addr,
1188 unsigned size,
1189 bool is_write)
1190 {
1191 int access_size_min, access_size_max;
1192 int access_size, i;
1193
1194 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1195 fprintf(stderr, "Misaligned i/o to address %08" HWADDR_PRIx
1196 " with size %u for memory region %s\n",
1197 addr, size, mr->name);
1198 return false;
1199 }
1200
1201 if (!mr->ops->valid.accepts) {
1202 return true;
1203 }
1204
1205 access_size_min = mr->ops->valid.min_access_size;
1206 if (!mr->ops->valid.min_access_size) {
1207 access_size_min = 1;
1208 }
1209
1210 access_size_max = mr->ops->valid.max_access_size;
1211 if (!mr->ops->valid.max_access_size) {
1212 access_size_max = 4;
1213 }
1214
1215 access_size = MAX(MIN(size, access_size_max), access_size_min);
1216 for (i = 0; i < size; i += access_size) {
1217 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1218 is_write)) {
1219 return false;
1220 }
1221 }
1222
1223 return true;
1224 }
1225
1226 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1227 hwaddr addr,
1228 uint64_t *pval,
1229 unsigned size,
1230 MemTxAttrs attrs)
1231 {
1232 *pval = 0;
1233
1234 if (mr->ops->read) {
1235 return access_with_adjusted_size(addr, pval, size,
1236 mr->ops->impl.min_access_size,
1237 mr->ops->impl.max_access_size,
1238 memory_region_read_accessor,
1239 mr, attrs);
1240 } else if (mr->ops->read_with_attrs) {
1241 return access_with_adjusted_size(addr, pval, size,
1242 mr->ops->impl.min_access_size,
1243 mr->ops->impl.max_access_size,
1244 memory_region_read_with_attrs_accessor,
1245 mr, attrs);
1246 } else {
1247 return access_with_adjusted_size(addr, pval, size, 1, 4,
1248 memory_region_oldmmio_read_accessor,
1249 mr, attrs);
1250 }
1251 }
1252
1253 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1254 hwaddr addr,
1255 uint64_t *pval,
1256 unsigned size,
1257 MemTxAttrs attrs)
1258 {
1259 MemTxResult r;
1260
1261 if (!memory_region_access_valid(mr, addr, size, false)) {
1262 *pval = unassigned_mem_read(mr, addr, size);
1263 return MEMTX_DECODE_ERROR;
1264 }
1265
1266 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1267 adjust_endianness(mr, pval, size);
1268 return r;
1269 }
1270
1271 /* Return true if an eventfd was signalled */
1272 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1273 hwaddr addr,
1274 uint64_t data,
1275 unsigned size,
1276 MemTxAttrs attrs)
1277 {
1278 MemoryRegionIoeventfd ioeventfd = {
1279 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1280 .data = data,
1281 };
1282 unsigned i;
1283
1284 for (i = 0; i < mr->ioeventfd_nb; i++) {
1285 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1286 ioeventfd.e = mr->ioeventfds[i].e;
1287
1288 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1289 event_notifier_set(ioeventfd.e);
1290 return true;
1291 }
1292 }
1293
1294 return false;
1295 }
1296
1297 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1298 hwaddr addr,
1299 uint64_t data,
1300 unsigned size,
1301 MemTxAttrs attrs)
1302 {
1303 if (!memory_region_access_valid(mr, addr, size, true)) {
1304 unassigned_mem_write(mr, addr, data, size);
1305 return MEMTX_DECODE_ERROR;
1306 }
1307
1308 adjust_endianness(mr, &data, size);
1309
1310 if ((!kvm_eventfds_enabled()) &&
1311 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1312 return MEMTX_OK;
1313 }
1314
1315 if (mr->ops->write) {
1316 return access_with_adjusted_size(addr, &data, size,
1317 mr->ops->impl.min_access_size,
1318 mr->ops->impl.max_access_size,
1319 memory_region_write_accessor, mr,
1320 attrs);
1321 } else if (mr->ops->write_with_attrs) {
1322 return
1323 access_with_adjusted_size(addr, &data, size,
1324 mr->ops->impl.min_access_size,
1325 mr->ops->impl.max_access_size,
1326 memory_region_write_with_attrs_accessor,
1327 mr, attrs);
1328 } else {
1329 return access_with_adjusted_size(addr, &data, size, 1, 4,
1330 memory_region_oldmmio_write_accessor,
1331 mr, attrs);
1332 }
1333 }
1334
1335 void memory_region_init_io(MemoryRegion *mr,
1336 Object *owner,
1337 const MemoryRegionOps *ops,
1338 void *opaque,
1339 const char *name,
1340 uint64_t size)
1341 {
1342 memory_region_init(mr, owner, name, size);
1343 mr->ops = ops ? ops : &unassigned_mem_ops;
1344 mr->opaque = opaque;
1345 mr->terminates = true;
1346 }
1347
1348 void memory_region_init_ram(MemoryRegion *mr,
1349 Object *owner,
1350 const char *name,
1351 uint64_t size,
1352 Error **errp)
1353 {
1354 memory_region_init(mr, owner, name, size);
1355 mr->ram = true;
1356 mr->terminates = true;
1357 mr->destructor = memory_region_destructor_ram;
1358 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1359 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1360 }
1361
1362 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1363 Object *owner,
1364 const char *name,
1365 uint64_t size,
1366 uint64_t max_size,
1367 void (*resized)(const char*,
1368 uint64_t length,
1369 void *host),
1370 Error **errp)
1371 {
1372 memory_region_init(mr, owner, name, size);
1373 mr->ram = true;
1374 mr->terminates = true;
1375 mr->destructor = memory_region_destructor_ram;
1376 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1377 mr, errp);
1378 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1379 }
1380
1381 #ifdef __linux__
1382 void memory_region_init_ram_from_file(MemoryRegion *mr,
1383 struct Object *owner,
1384 const char *name,
1385 uint64_t size,
1386 bool share,
1387 const char *path,
1388 Error **errp)
1389 {
1390 memory_region_init(mr, owner, name, size);
1391 mr->ram = true;
1392 mr->terminates = true;
1393 mr->destructor = memory_region_destructor_ram;
1394 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1395 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1396 }
1397 #endif
1398
1399 void memory_region_init_ram_ptr(MemoryRegion *mr,
1400 Object *owner,
1401 const char *name,
1402 uint64_t size,
1403 void *ptr)
1404 {
1405 memory_region_init(mr, owner, name, size);
1406 mr->ram = true;
1407 mr->terminates = true;
1408 mr->destructor = memory_region_destructor_ram;
1409 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1410
1411 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1412 assert(ptr != NULL);
1413 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1414 }
1415
1416 void memory_region_set_skip_dump(MemoryRegion *mr)
1417 {
1418 mr->skip_dump = true;
1419 }
1420
1421 void memory_region_init_alias(MemoryRegion *mr,
1422 Object *owner,
1423 const char *name,
1424 MemoryRegion *orig,
1425 hwaddr offset,
1426 uint64_t size)
1427 {
1428 memory_region_init(mr, owner, name, size);
1429 mr->alias = orig;
1430 mr->alias_offset = offset;
1431 }
1432
1433 void memory_region_init_rom(MemoryRegion *mr,
1434 struct Object *owner,
1435 const char *name,
1436 uint64_t size,
1437 Error **errp)
1438 {
1439 memory_region_init(mr, owner, name, size);
1440 mr->ram = true;
1441 mr->readonly = true;
1442 mr->terminates = true;
1443 mr->destructor = memory_region_destructor_ram;
1444 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1445 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1446 }
1447
1448 void memory_region_init_rom_device(MemoryRegion *mr,
1449 Object *owner,
1450 const MemoryRegionOps *ops,
1451 void *opaque,
1452 const char *name,
1453 uint64_t size,
1454 Error **errp)
1455 {
1456 assert(ops);
1457 memory_region_init(mr, owner, name, size);
1458 mr->ops = ops;
1459 mr->opaque = opaque;
1460 mr->terminates = true;
1461 mr->rom_device = true;
1462 mr->destructor = memory_region_destructor_ram;
1463 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1464 }
1465
1466 void memory_region_init_iommu(MemoryRegion *mr,
1467 Object *owner,
1468 const MemoryRegionIOMMUOps *ops,
1469 const char *name,
1470 uint64_t size)
1471 {
1472 memory_region_init(mr, owner, name, size);
1473 mr->iommu_ops = ops,
1474 mr->terminates = true; /* then re-forwards */
1475 QLIST_INIT(&mr->iommu_notify);
1476 mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1477 }
1478
1479 static void memory_region_finalize(Object *obj)
1480 {
1481 MemoryRegion *mr = MEMORY_REGION(obj);
1482
1483 assert(!mr->container);
1484
1485 /* We know the region is not visible in any address space (it
1486 * does not have a container and cannot be a root either because
1487 * it has no references, so we can blindly clear mr->enabled.
1488 * memory_region_set_enabled instead could trigger a transaction
1489 * and cause an infinite loop.
1490 */
1491 mr->enabled = false;
1492 memory_region_transaction_begin();
1493 while (!QTAILQ_EMPTY(&mr->subregions)) {
1494 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1495 memory_region_del_subregion(mr, subregion);
1496 }
1497 memory_region_transaction_commit();
1498
1499 mr->destructor(mr);
1500 memory_region_clear_coalescing(mr);
1501 g_free((char *)mr->name);
1502 g_free(mr->ioeventfds);
1503 }
1504
1505 Object *memory_region_owner(MemoryRegion *mr)
1506 {
1507 Object *obj = OBJECT(mr);
1508 return obj->parent;
1509 }
1510
1511 void memory_region_ref(MemoryRegion *mr)
1512 {
1513 /* MMIO callbacks most likely will access data that belongs
1514 * to the owner, hence the need to ref/unref the owner whenever
1515 * the memory region is in use.
1516 *
1517 * The memory region is a child of its owner. As long as the
1518 * owner doesn't call unparent itself on the memory region,
1519 * ref-ing the owner will also keep the memory region alive.
1520 * Memory regions without an owner are supposed to never go away;
1521 * we do not ref/unref them because it slows down DMA sensibly.
1522 */
1523 if (mr && mr->owner) {
1524 object_ref(mr->owner);
1525 }
1526 }
1527
1528 void memory_region_unref(MemoryRegion *mr)
1529 {
1530 if (mr && mr->owner) {
1531 object_unref(mr->owner);
1532 }
1533 }
1534
1535 uint64_t memory_region_size(MemoryRegion *mr)
1536 {
1537 if (int128_eq(mr->size, int128_2_64())) {
1538 return UINT64_MAX;
1539 }
1540 return int128_get64(mr->size);
1541 }
1542
1543 const char *memory_region_name(const MemoryRegion *mr)
1544 {
1545 if (!mr->name) {
1546 ((MemoryRegion *)mr)->name =
1547 object_get_canonical_path_component(OBJECT(mr));
1548 }
1549 return mr->name;
1550 }
1551
1552 bool memory_region_is_skip_dump(MemoryRegion *mr)
1553 {
1554 return mr->skip_dump;
1555 }
1556
1557 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1558 {
1559 uint8_t mask = mr->dirty_log_mask;
1560 if (global_dirty_log) {
1561 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1562 }
1563 return mask;
1564 }
1565
1566 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1567 {
1568 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1569 }
1570
1571 static void memory_region_update_iommu_notify_flags(MemoryRegion *mr)
1572 {
1573 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1574 IOMMUNotifier *iommu_notifier;
1575
1576 QLIST_FOREACH(iommu_notifier, &mr->iommu_notify, node) {
1577 flags |= iommu_notifier->notifier_flags;
1578 }
1579
1580 if (flags != mr->iommu_notify_flags &&
1581 mr->iommu_ops->notify_flag_changed) {
1582 mr->iommu_ops->notify_flag_changed(mr, mr->iommu_notify_flags,
1583 flags);
1584 }
1585
1586 mr->iommu_notify_flags = flags;
1587 }
1588
1589 void memory_region_register_iommu_notifier(MemoryRegion *mr,
1590 IOMMUNotifier *n)
1591 {
1592 /* We need to register for at least one bitfield */
1593 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1594 QLIST_INSERT_HEAD(&mr->iommu_notify, n, node);
1595 memory_region_update_iommu_notify_flags(mr);
1596 }
1597
1598 uint64_t memory_region_iommu_get_min_page_size(MemoryRegion *mr)
1599 {
1600 assert(memory_region_is_iommu(mr));
1601 if (mr->iommu_ops && mr->iommu_ops->get_min_page_size) {
1602 return mr->iommu_ops->get_min_page_size(mr);
1603 }
1604 return TARGET_PAGE_SIZE;
1605 }
1606
1607 void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n,
1608 bool is_write)
1609 {
1610 hwaddr addr, granularity;
1611 IOMMUTLBEntry iotlb;
1612
1613 granularity = memory_region_iommu_get_min_page_size(mr);
1614
1615 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1616 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1617 if (iotlb.perm != IOMMU_NONE) {
1618 n->notify(n, &iotlb);
1619 }
1620
1621 /* if (2^64 - MR size) < granularity, it's possible to get an
1622 * infinite loop here. This should catch such a wraparound */
1623 if ((addr + granularity) < addr) {
1624 break;
1625 }
1626 }
1627 }
1628
1629 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1630 IOMMUNotifier *n)
1631 {
1632 QLIST_REMOVE(n, node);
1633 memory_region_update_iommu_notify_flags(mr);
1634 }
1635
1636 void memory_region_notify_iommu(MemoryRegion *mr,
1637 IOMMUTLBEntry entry)
1638 {
1639 IOMMUNotifier *iommu_notifier;
1640 IOMMUNotifierFlag request_flags;
1641
1642 assert(memory_region_is_iommu(mr));
1643
1644 if (entry.perm & IOMMU_RW) {
1645 request_flags = IOMMU_NOTIFIER_MAP;
1646 } else {
1647 request_flags = IOMMU_NOTIFIER_UNMAP;
1648 }
1649
1650 QLIST_FOREACH(iommu_notifier, &mr->iommu_notify, node) {
1651 if (iommu_notifier->notifier_flags & request_flags) {
1652 iommu_notifier->notify(iommu_notifier, &entry);
1653 }
1654 }
1655 }
1656
1657 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1658 {
1659 uint8_t mask = 1 << client;
1660 uint8_t old_logging;
1661
1662 assert(client == DIRTY_MEMORY_VGA);
1663 old_logging = mr->vga_logging_count;
1664 mr->vga_logging_count += log ? 1 : -1;
1665 if (!!old_logging == !!mr->vga_logging_count) {
1666 return;
1667 }
1668
1669 memory_region_transaction_begin();
1670 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1671 memory_region_update_pending |= mr->enabled;
1672 memory_region_transaction_commit();
1673 }
1674
1675 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1676 hwaddr size, unsigned client)
1677 {
1678 assert(mr->ram_block);
1679 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1680 size, client);
1681 }
1682
1683 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1684 hwaddr size)
1685 {
1686 assert(mr->ram_block);
1687 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1688 size,
1689 memory_region_get_dirty_log_mask(mr));
1690 }
1691
1692 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1693 hwaddr size, unsigned client)
1694 {
1695 assert(mr->ram_block);
1696 return cpu_physical_memory_test_and_clear_dirty(
1697 memory_region_get_ram_addr(mr) + addr, size, client);
1698 }
1699
1700
1701 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1702 {
1703 AddressSpace *as;
1704 FlatRange *fr;
1705
1706 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1707 FlatView *view = address_space_get_flatview(as);
1708 FOR_EACH_FLAT_RANGE(fr, view) {
1709 if (fr->mr == mr) {
1710 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1711 }
1712 }
1713 flatview_unref(view);
1714 }
1715 }
1716
1717 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1718 {
1719 if (mr->readonly != readonly) {
1720 memory_region_transaction_begin();
1721 mr->readonly = readonly;
1722 memory_region_update_pending |= mr->enabled;
1723 memory_region_transaction_commit();
1724 }
1725 }
1726
1727 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1728 {
1729 if (mr->romd_mode != romd_mode) {
1730 memory_region_transaction_begin();
1731 mr->romd_mode = romd_mode;
1732 memory_region_update_pending |= mr->enabled;
1733 memory_region_transaction_commit();
1734 }
1735 }
1736
1737 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1738 hwaddr size, unsigned client)
1739 {
1740 assert(mr->ram_block);
1741 cpu_physical_memory_test_and_clear_dirty(
1742 memory_region_get_ram_addr(mr) + addr, size, client);
1743 }
1744
1745 int memory_region_get_fd(MemoryRegion *mr)
1746 {
1747 int fd;
1748
1749 rcu_read_lock();
1750 while (mr->alias) {
1751 mr = mr->alias;
1752 }
1753 fd = mr->ram_block->fd;
1754 rcu_read_unlock();
1755
1756 return fd;
1757 }
1758
1759 void memory_region_set_fd(MemoryRegion *mr, int fd)
1760 {
1761 rcu_read_lock();
1762 while (mr->alias) {
1763 mr = mr->alias;
1764 }
1765 mr->ram_block->fd = fd;
1766 rcu_read_unlock();
1767 }
1768
1769 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1770 {
1771 void *ptr;
1772 uint64_t offset = 0;
1773
1774 rcu_read_lock();
1775 while (mr->alias) {
1776 offset += mr->alias_offset;
1777 mr = mr->alias;
1778 }
1779 assert(mr->ram_block);
1780 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
1781 rcu_read_unlock();
1782
1783 return ptr;
1784 }
1785
1786 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
1787 {
1788 RAMBlock *block;
1789
1790 block = qemu_ram_block_from_host(ptr, false, offset);
1791 if (!block) {
1792 return NULL;
1793 }
1794
1795 return block->mr;
1796 }
1797
1798 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1799 {
1800 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1801 }
1802
1803 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1804 {
1805 assert(mr->ram_block);
1806
1807 qemu_ram_resize(mr->ram_block, newsize, errp);
1808 }
1809
1810 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1811 {
1812 FlatView *view;
1813 FlatRange *fr;
1814 CoalescedMemoryRange *cmr;
1815 AddrRange tmp;
1816 MemoryRegionSection section;
1817
1818 view = address_space_get_flatview(as);
1819 FOR_EACH_FLAT_RANGE(fr, view) {
1820 if (fr->mr == mr) {
1821 section = (MemoryRegionSection) {
1822 .address_space = as,
1823 .offset_within_address_space = int128_get64(fr->addr.start),
1824 .size = fr->addr.size,
1825 };
1826
1827 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1828 int128_get64(fr->addr.start),
1829 int128_get64(fr->addr.size));
1830 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1831 tmp = addrrange_shift(cmr->addr,
1832 int128_sub(fr->addr.start,
1833 int128_make64(fr->offset_in_region)));
1834 if (!addrrange_intersects(tmp, fr->addr)) {
1835 continue;
1836 }
1837 tmp = addrrange_intersection(tmp, fr->addr);
1838 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1839 int128_get64(tmp.start),
1840 int128_get64(tmp.size));
1841 }
1842 }
1843 }
1844 flatview_unref(view);
1845 }
1846
1847 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1848 {
1849 AddressSpace *as;
1850
1851 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1852 memory_region_update_coalesced_range_as(mr, as);
1853 }
1854 }
1855
1856 void memory_region_set_coalescing(MemoryRegion *mr)
1857 {
1858 memory_region_clear_coalescing(mr);
1859 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1860 }
1861
1862 void memory_region_add_coalescing(MemoryRegion *mr,
1863 hwaddr offset,
1864 uint64_t size)
1865 {
1866 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1867
1868 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1869 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1870 memory_region_update_coalesced_range(mr);
1871 memory_region_set_flush_coalesced(mr);
1872 }
1873
1874 void memory_region_clear_coalescing(MemoryRegion *mr)
1875 {
1876 CoalescedMemoryRange *cmr;
1877 bool updated = false;
1878
1879 qemu_flush_coalesced_mmio_buffer();
1880 mr->flush_coalesced_mmio = false;
1881
1882 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1883 cmr = QTAILQ_FIRST(&mr->coalesced);
1884 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1885 g_free(cmr);
1886 updated = true;
1887 }
1888
1889 if (updated) {
1890 memory_region_update_coalesced_range(mr);
1891 }
1892 }
1893
1894 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1895 {
1896 mr->flush_coalesced_mmio = true;
1897 }
1898
1899 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1900 {
1901 qemu_flush_coalesced_mmio_buffer();
1902 if (QTAILQ_EMPTY(&mr->coalesced)) {
1903 mr->flush_coalesced_mmio = false;
1904 }
1905 }
1906
1907 void memory_region_set_global_locking(MemoryRegion *mr)
1908 {
1909 mr->global_locking = true;
1910 }
1911
1912 void memory_region_clear_global_locking(MemoryRegion *mr)
1913 {
1914 mr->global_locking = false;
1915 }
1916
1917 static bool userspace_eventfd_warning;
1918
1919 void memory_region_add_eventfd(MemoryRegion *mr,
1920 hwaddr addr,
1921 unsigned size,
1922 bool match_data,
1923 uint64_t data,
1924 EventNotifier *e)
1925 {
1926 MemoryRegionIoeventfd mrfd = {
1927 .addr.start = int128_make64(addr),
1928 .addr.size = int128_make64(size),
1929 .match_data = match_data,
1930 .data = data,
1931 .e = e,
1932 };
1933 unsigned i;
1934
1935 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1936 userspace_eventfd_warning))) {
1937 userspace_eventfd_warning = true;
1938 error_report("Using eventfd without MMIO binding in KVM. "
1939 "Suboptimal performance expected");
1940 }
1941
1942 if (size) {
1943 adjust_endianness(mr, &mrfd.data, size);
1944 }
1945 memory_region_transaction_begin();
1946 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1947 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1948 break;
1949 }
1950 }
1951 ++mr->ioeventfd_nb;
1952 mr->ioeventfds = g_realloc(mr->ioeventfds,
1953 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1954 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1955 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1956 mr->ioeventfds[i] = mrfd;
1957 ioeventfd_update_pending |= mr->enabled;
1958 memory_region_transaction_commit();
1959 }
1960
1961 void memory_region_del_eventfd(MemoryRegion *mr,
1962 hwaddr addr,
1963 unsigned size,
1964 bool match_data,
1965 uint64_t data,
1966 EventNotifier *e)
1967 {
1968 MemoryRegionIoeventfd mrfd = {
1969 .addr.start = int128_make64(addr),
1970 .addr.size = int128_make64(size),
1971 .match_data = match_data,
1972 .data = data,
1973 .e = e,
1974 };
1975 unsigned i;
1976
1977 if (size) {
1978 adjust_endianness(mr, &mrfd.data, size);
1979 }
1980 memory_region_transaction_begin();
1981 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1982 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1983 break;
1984 }
1985 }
1986 assert(i != mr->ioeventfd_nb);
1987 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1988 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1989 --mr->ioeventfd_nb;
1990 mr->ioeventfds = g_realloc(mr->ioeventfds,
1991 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1992 ioeventfd_update_pending |= mr->enabled;
1993 memory_region_transaction_commit();
1994 }
1995
1996 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1997 {
1998 MemoryRegion *mr = subregion->container;
1999 MemoryRegion *other;
2000
2001 memory_region_transaction_begin();
2002
2003 memory_region_ref(subregion);
2004 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2005 if (subregion->priority >= other->priority) {
2006 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2007 goto done;
2008 }
2009 }
2010 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2011 done:
2012 memory_region_update_pending |= mr->enabled && subregion->enabled;
2013 memory_region_transaction_commit();
2014 }
2015
2016 static void memory_region_add_subregion_common(MemoryRegion *mr,
2017 hwaddr offset,
2018 MemoryRegion *subregion)
2019 {
2020 assert(!subregion->container);
2021 subregion->container = mr;
2022 subregion->addr = offset;
2023 memory_region_update_container_subregions(subregion);
2024 }
2025
2026 void memory_region_add_subregion(MemoryRegion *mr,
2027 hwaddr offset,
2028 MemoryRegion *subregion)
2029 {
2030 subregion->priority = 0;
2031 memory_region_add_subregion_common(mr, offset, subregion);
2032 }
2033
2034 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2035 hwaddr offset,
2036 MemoryRegion *subregion,
2037 int priority)
2038 {
2039 subregion->priority = priority;
2040 memory_region_add_subregion_common(mr, offset, subregion);
2041 }
2042
2043 void memory_region_del_subregion(MemoryRegion *mr,
2044 MemoryRegion *subregion)
2045 {
2046 memory_region_transaction_begin();
2047 assert(subregion->container == mr);
2048 subregion->container = NULL;
2049 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2050 memory_region_unref(subregion);
2051 memory_region_update_pending |= mr->enabled && subregion->enabled;
2052 memory_region_transaction_commit();
2053 }
2054
2055 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2056 {
2057 if (enabled == mr->enabled) {
2058 return;
2059 }
2060 memory_region_transaction_begin();
2061 mr->enabled = enabled;
2062 memory_region_update_pending = true;
2063 memory_region_transaction_commit();
2064 }
2065
2066 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2067 {
2068 Int128 s = int128_make64(size);
2069
2070 if (size == UINT64_MAX) {
2071 s = int128_2_64();
2072 }
2073 if (int128_eq(s, mr->size)) {
2074 return;
2075 }
2076 memory_region_transaction_begin();
2077 mr->size = s;
2078 memory_region_update_pending = true;
2079 memory_region_transaction_commit();
2080 }
2081
2082 static void memory_region_readd_subregion(MemoryRegion *mr)
2083 {
2084 MemoryRegion *container = mr->container;
2085
2086 if (container) {
2087 memory_region_transaction_begin();
2088 memory_region_ref(mr);
2089 memory_region_del_subregion(container, mr);
2090 mr->container = container;
2091 memory_region_update_container_subregions(mr);
2092 memory_region_unref(mr);
2093 memory_region_transaction_commit();
2094 }
2095 }
2096
2097 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2098 {
2099 if (addr != mr->addr) {
2100 mr->addr = addr;
2101 memory_region_readd_subregion(mr);
2102 }
2103 }
2104
2105 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2106 {
2107 assert(mr->alias);
2108
2109 if (offset == mr->alias_offset) {
2110 return;
2111 }
2112
2113 memory_region_transaction_begin();
2114 mr->alias_offset = offset;
2115 memory_region_update_pending |= mr->enabled;
2116 memory_region_transaction_commit();
2117 }
2118
2119 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2120 {
2121 return mr->align;
2122 }
2123
2124 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2125 {
2126 const AddrRange *addr = addr_;
2127 const FlatRange *fr = fr_;
2128
2129 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2130 return -1;
2131 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2132 return 1;
2133 }
2134 return 0;
2135 }
2136
2137 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2138 {
2139 return bsearch(&addr, view->ranges, view->nr,
2140 sizeof(FlatRange), cmp_flatrange_addr);
2141 }
2142
2143 bool memory_region_is_mapped(MemoryRegion *mr)
2144 {
2145 return mr->container ? true : false;
2146 }
2147
2148 /* Same as memory_region_find, but it does not add a reference to the
2149 * returned region. It must be called from an RCU critical section.
2150 */
2151 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2152 hwaddr addr, uint64_t size)
2153 {
2154 MemoryRegionSection ret = { .mr = NULL };
2155 MemoryRegion *root;
2156 AddressSpace *as;
2157 AddrRange range;
2158 FlatView *view;
2159 FlatRange *fr;
2160
2161 addr += mr->addr;
2162 for (root = mr; root->container; ) {
2163 root = root->container;
2164 addr += root->addr;
2165 }
2166
2167 as = memory_region_to_address_space(root);
2168 if (!as) {
2169 return ret;
2170 }
2171 range = addrrange_make(int128_make64(addr), int128_make64(size));
2172
2173 view = atomic_rcu_read(&as->current_map);
2174 fr = flatview_lookup(view, range);
2175 if (!fr) {
2176 return ret;
2177 }
2178
2179 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2180 --fr;
2181 }
2182
2183 ret.mr = fr->mr;
2184 ret.address_space = as;
2185 range = addrrange_intersection(range, fr->addr);
2186 ret.offset_within_region = fr->offset_in_region;
2187 ret.offset_within_region += int128_get64(int128_sub(range.start,
2188 fr->addr.start));
2189 ret.size = range.size;
2190 ret.offset_within_address_space = int128_get64(range.start);
2191 ret.readonly = fr->readonly;
2192 return ret;
2193 }
2194
2195 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2196 hwaddr addr, uint64_t size)
2197 {
2198 MemoryRegionSection ret;
2199 rcu_read_lock();
2200 ret = memory_region_find_rcu(mr, addr, size);
2201 if (ret.mr) {
2202 memory_region_ref(ret.mr);
2203 }
2204 rcu_read_unlock();
2205 return ret;
2206 }
2207
2208 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2209 {
2210 MemoryRegion *mr;
2211
2212 rcu_read_lock();
2213 mr = memory_region_find_rcu(container, addr, 1).mr;
2214 rcu_read_unlock();
2215 return mr && mr != container;
2216 }
2217
2218 void memory_global_dirty_log_sync(void)
2219 {
2220 MemoryListener *listener;
2221 AddressSpace *as;
2222 FlatView *view;
2223 FlatRange *fr;
2224
2225 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2226 if (!listener->log_sync) {
2227 continue;
2228 }
2229 /* Global listeners are being phased out. */
2230 assert(listener->address_space_filter);
2231 as = listener->address_space_filter;
2232 view = address_space_get_flatview(as);
2233 FOR_EACH_FLAT_RANGE(fr, view) {
2234 MemoryRegionSection mrs = section_from_flat_range(fr, as);
2235 listener->log_sync(listener, &mrs);
2236 }
2237 flatview_unref(view);
2238 }
2239 }
2240
2241 void memory_global_dirty_log_start(void)
2242 {
2243 global_dirty_log = true;
2244
2245 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2246
2247 /* Refresh DIRTY_LOG_MIGRATION bit. */
2248 memory_region_transaction_begin();
2249 memory_region_update_pending = true;
2250 memory_region_transaction_commit();
2251 }
2252
2253 void memory_global_dirty_log_stop(void)
2254 {
2255 global_dirty_log = false;
2256
2257 /* Refresh DIRTY_LOG_MIGRATION bit. */
2258 memory_region_transaction_begin();
2259 memory_region_update_pending = true;
2260 memory_region_transaction_commit();
2261
2262 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2263 }
2264
2265 static void listener_add_address_space(MemoryListener *listener,
2266 AddressSpace *as)
2267 {
2268 FlatView *view;
2269 FlatRange *fr;
2270
2271 if (listener->address_space_filter
2272 && listener->address_space_filter != as) {
2273 return;
2274 }
2275
2276 if (listener->begin) {
2277 listener->begin(listener);
2278 }
2279 if (global_dirty_log) {
2280 if (listener->log_global_start) {
2281 listener->log_global_start(listener);
2282 }
2283 }
2284
2285 view = address_space_get_flatview(as);
2286 FOR_EACH_FLAT_RANGE(fr, view) {
2287 MemoryRegionSection section = {
2288 .mr = fr->mr,
2289 .address_space = as,
2290 .offset_within_region = fr->offset_in_region,
2291 .size = fr->addr.size,
2292 .offset_within_address_space = int128_get64(fr->addr.start),
2293 .readonly = fr->readonly,
2294 };
2295 if (fr->dirty_log_mask && listener->log_start) {
2296 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2297 }
2298 if (listener->region_add) {
2299 listener->region_add(listener, &section);
2300 }
2301 }
2302 if (listener->commit) {
2303 listener->commit(listener);
2304 }
2305 flatview_unref(view);
2306 }
2307
2308 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
2309 {
2310 MemoryListener *other = NULL;
2311 AddressSpace *as;
2312
2313 listener->address_space_filter = filter;
2314 if (QTAILQ_EMPTY(&memory_listeners)
2315 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2316 memory_listeners)->priority) {
2317 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2318 } else {
2319 QTAILQ_FOREACH(other, &memory_listeners, link) {
2320 if (listener->priority < other->priority) {
2321 break;
2322 }
2323 }
2324 QTAILQ_INSERT_BEFORE(other, listener, link);
2325 }
2326
2327 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2328 listener_add_address_space(listener, as);
2329 }
2330 }
2331
2332 void memory_listener_unregister(MemoryListener *listener)
2333 {
2334 QTAILQ_REMOVE(&memory_listeners, listener, link);
2335 }
2336
2337 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2338 {
2339 memory_region_ref(root);
2340 memory_region_transaction_begin();
2341 as->ref_count = 1;
2342 as->root = root;
2343 as->malloced = false;
2344 as->current_map = g_new(FlatView, 1);
2345 flatview_init(as->current_map);
2346 as->ioeventfd_nb = 0;
2347 as->ioeventfds = NULL;
2348 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2349 as->name = g_strdup(name ? name : "anonymous");
2350 address_space_init_dispatch(as);
2351 memory_region_update_pending |= root->enabled;
2352 memory_region_transaction_commit();
2353 }
2354
2355 static void do_address_space_destroy(AddressSpace *as)
2356 {
2357 MemoryListener *listener;
2358 bool do_free = as->malloced;
2359
2360 address_space_destroy_dispatch(as);
2361
2362 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2363 assert(listener->address_space_filter != as);
2364 }
2365
2366 flatview_unref(as->current_map);
2367 g_free(as->name);
2368 g_free(as->ioeventfds);
2369 memory_region_unref(as->root);
2370 if (do_free) {
2371 g_free(as);
2372 }
2373 }
2374
2375 AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2376 {
2377 AddressSpace *as;
2378
2379 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2380 if (root == as->root && as->malloced) {
2381 as->ref_count++;
2382 return as;
2383 }
2384 }
2385
2386 as = g_malloc0(sizeof *as);
2387 address_space_init(as, root, name);
2388 as->malloced = true;
2389 return as;
2390 }
2391
2392 void address_space_destroy(AddressSpace *as)
2393 {
2394 MemoryRegion *root = as->root;
2395
2396 as->ref_count--;
2397 if (as->ref_count) {
2398 return;
2399 }
2400 /* Flush out anything from MemoryListeners listening in on this */
2401 memory_region_transaction_begin();
2402 as->root = NULL;
2403 memory_region_transaction_commit();
2404 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2405 address_space_unregister(as);
2406
2407 /* At this point, as->dispatch and as->current_map are dummy
2408 * entries that the guest should never use. Wait for the old
2409 * values to expire before freeing the data.
2410 */
2411 as->root = root;
2412 call_rcu(as, do_address_space_destroy, rcu);
2413 }
2414
2415 typedef struct MemoryRegionList MemoryRegionList;
2416
2417 struct MemoryRegionList {
2418 const MemoryRegion *mr;
2419 QTAILQ_ENTRY(MemoryRegionList) queue;
2420 };
2421
2422 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2423
2424 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2425 const MemoryRegion *mr, unsigned int level,
2426 hwaddr base,
2427 MemoryRegionListHead *alias_print_queue)
2428 {
2429 MemoryRegionList *new_ml, *ml, *next_ml;
2430 MemoryRegionListHead submr_print_queue;
2431 const MemoryRegion *submr;
2432 unsigned int i;
2433
2434 if (!mr) {
2435 return;
2436 }
2437
2438 for (i = 0; i < level; i++) {
2439 mon_printf(f, " ");
2440 }
2441
2442 if (mr->alias) {
2443 MemoryRegionList *ml;
2444 bool found = false;
2445
2446 /* check if the alias is already in the queue */
2447 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2448 if (ml->mr == mr->alias) {
2449 found = true;
2450 }
2451 }
2452
2453 if (!found) {
2454 ml = g_new(MemoryRegionList, 1);
2455 ml->mr = mr->alias;
2456 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2457 }
2458 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2459 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2460 "-" TARGET_FMT_plx "%s\n",
2461 base + mr->addr,
2462 base + mr->addr
2463 + (int128_nz(mr->size) ?
2464 (hwaddr)int128_get64(int128_sub(mr->size,
2465 int128_one())) : 0),
2466 mr->priority,
2467 mr->romd_mode ? 'R' : '-',
2468 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2469 : '-',
2470 memory_region_name(mr),
2471 memory_region_name(mr->alias),
2472 mr->alias_offset,
2473 mr->alias_offset
2474 + (int128_nz(mr->size) ?
2475 (hwaddr)int128_get64(int128_sub(mr->size,
2476 int128_one())) : 0),
2477 mr->enabled ? "" : " [disabled]");
2478 } else {
2479 mon_printf(f,
2480 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2481 base + mr->addr,
2482 base + mr->addr
2483 + (int128_nz(mr->size) ?
2484 (hwaddr)int128_get64(int128_sub(mr->size,
2485 int128_one())) : 0),
2486 mr->priority,
2487 mr->romd_mode ? 'R' : '-',
2488 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2489 : '-',
2490 memory_region_name(mr),
2491 mr->enabled ? "" : " [disabled]");
2492 }
2493
2494 QTAILQ_INIT(&submr_print_queue);
2495
2496 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2497 new_ml = g_new(MemoryRegionList, 1);
2498 new_ml->mr = submr;
2499 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2500 if (new_ml->mr->addr < ml->mr->addr ||
2501 (new_ml->mr->addr == ml->mr->addr &&
2502 new_ml->mr->priority > ml->mr->priority)) {
2503 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2504 new_ml = NULL;
2505 break;
2506 }
2507 }
2508 if (new_ml) {
2509 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2510 }
2511 }
2512
2513 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2514 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2515 alias_print_queue);
2516 }
2517
2518 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2519 g_free(ml);
2520 }
2521 }
2522
2523 void mtree_info(fprintf_function mon_printf, void *f)
2524 {
2525 MemoryRegionListHead ml_head;
2526 MemoryRegionList *ml, *ml2;
2527 AddressSpace *as;
2528
2529 QTAILQ_INIT(&ml_head);
2530
2531 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2532 mon_printf(f, "address-space: %s\n", as->name);
2533 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2534 mon_printf(f, "\n");
2535 }
2536
2537 /* print aliased regions */
2538 QTAILQ_FOREACH(ml, &ml_head, queue) {
2539 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2540 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2541 mon_printf(f, "\n");
2542 }
2543
2544 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2545 g_free(ml);
2546 }
2547 }
2548
2549 static const TypeInfo memory_region_info = {
2550 .parent = TYPE_OBJECT,
2551 .name = TYPE_MEMORY_REGION,
2552 .instance_size = sizeof(MemoryRegion),
2553 .instance_init = memory_region_initfn,
2554 .instance_finalize = memory_region_finalize,
2555 };
2556
2557 static void memory_register_types(void)
2558 {
2559 type_register_static(&memory_region_info);
2560 }
2561
2562 type_init(memory_register_types)
AR7 emulation for QEMU