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qxl: Add missing trace.h (fix broken build)
[qemu/ar7.git] / memory.c
blobf5e15a979f060b561243a57ca67a7ab7f84c9b15
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qemu/bitops.h"
20 #include "qom/object.h"
21 #include "trace.h"
22 #include <assert.h>
23
24 #include "exec/memory-internal.h"
25
26 static unsigned memory_region_transaction_depth;
27 static bool memory_region_update_pending;
28 static bool global_dirty_log = false;
29
30 /* flat_view_mutex is taken around reading as->current_map; the critical
31 * section is extremely short, so I'm using a single mutex for every AS.
32 * We could also RCU for the read-side.
33 *
34 * The BQL is taken around transaction commits, hence both locks are taken
35 * while writing to as->current_map (with the BQL taken outside).
36 */
37 static QemuMutex flat_view_mutex;
38
39 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
40 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
41
42 static QTAILQ_HEAD(, AddressSpace) address_spaces
43 = QTAILQ_HEAD_INITIALIZER(address_spaces);
44
45 static void memory_init(void)
46 {
47 qemu_mutex_init(&flat_view_mutex);
48 }
49
50 typedef struct AddrRange AddrRange;
51
52 /*
53 * Note using signed integers limits us to physical addresses at most
54 * 63 bits wide. They are needed for negative offsetting in aliases
55 * (large MemoryRegion::alias_offset).
56 */
57 struct AddrRange {
58 Int128 start;
59 Int128 size;
60 };
61
62 static AddrRange addrrange_make(Int128 start, Int128 size)
63 {
64 return (AddrRange) { start, size };
65 }
66
67 static bool addrrange_equal(AddrRange r1, AddrRange r2)
68 {
69 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
70 }
71
72 static Int128 addrrange_end(AddrRange r)
73 {
74 return int128_add(r.start, r.size);
75 }
76
77 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
78 {
79 int128_addto(&range.start, delta);
80 return range;
81 }
82
83 static bool addrrange_contains(AddrRange range, Int128 addr)
84 {
85 return int128_ge(addr, range.start)
86 && int128_lt(addr, addrrange_end(range));
87 }
88
89 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
90 {
91 return addrrange_contains(r1, r2.start)
92 || addrrange_contains(r2, r1.start);
93 }
94
95 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
96 {
97 Int128 start = int128_max(r1.start, r2.start);
98 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
99 return addrrange_make(start, int128_sub(end, start));
100 }
101
102 enum ListenerDirection { Forward, Reverse };
103
104 static bool memory_listener_match(MemoryListener *listener,
105 MemoryRegionSection *section)
106 {
107 return !listener->address_space_filter
108 || listener->address_space_filter == section->address_space;
109 }
110
111 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
112 do { \
113 MemoryListener *_listener; \
114 \
115 switch (_direction) { \
116 case Forward: \
117 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
118 if (_listener->_callback) { \
119 _listener->_callback(_listener, ##_args); \
120 } \
121 } \
122 break; \
123 case Reverse: \
124 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
125 memory_listeners, link) { \
126 if (_listener->_callback) { \
127 _listener->_callback(_listener, ##_args); \
128 } \
129 } \
130 break; \
131 default: \
132 abort(); \
133 } \
134 } while (0)
135
136 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
137 do { \
138 MemoryListener *_listener; \
139 \
140 switch (_direction) { \
141 case Forward: \
142 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
143 if (_listener->_callback \
144 && memory_listener_match(_listener, _section)) { \
145 _listener->_callback(_listener, _section, ##_args); \
146 } \
147 } \
148 break; \
149 case Reverse: \
150 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
151 memory_listeners, link) { \
152 if (_listener->_callback \
153 && memory_listener_match(_listener, _section)) { \
154 _listener->_callback(_listener, _section, ##_args); \
155 } \
156 } \
157 break; \
158 default: \
159 abort(); \
160 } \
161 } while (0)
162
163 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
164 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
165 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
166 .mr = (fr)->mr, \
167 .address_space = (as), \
168 .offset_within_region = (fr)->offset_in_region, \
169 .size = (fr)->addr.size, \
170 .offset_within_address_space = int128_get64((fr)->addr.start), \
171 .readonly = (fr)->readonly, \
172 }))
173
174 struct CoalescedMemoryRange {
175 AddrRange addr;
176 QTAILQ_ENTRY(CoalescedMemoryRange) link;
177 };
178
179 struct MemoryRegionIoeventfd {
180 AddrRange addr;
181 bool match_data;
182 uint64_t data;
183 EventNotifier *e;
184 };
185
186 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
187 MemoryRegionIoeventfd b)
188 {
189 if (int128_lt(a.addr.start, b.addr.start)) {
190 return true;
191 } else if (int128_gt(a.addr.start, b.addr.start)) {
192 return false;
193 } else if (int128_lt(a.addr.size, b.addr.size)) {
194 return true;
195 } else if (int128_gt(a.addr.size, b.addr.size)) {
196 return false;
197 } else if (a.match_data < b.match_data) {
198 return true;
199 } else if (a.match_data > b.match_data) {
200 return false;
201 } else if (a.match_data) {
202 if (a.data < b.data) {
203 return true;
204 } else if (a.data > b.data) {
205 return false;
206 }
207 }
208 if (a.e < b.e) {
209 return true;
210 } else if (a.e > b.e) {
211 return false;
212 }
213 return false;
214 }
215
216 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
217 MemoryRegionIoeventfd b)
218 {
219 return !memory_region_ioeventfd_before(a, b)
220 && !memory_region_ioeventfd_before(b, a);
221 }
222
223 typedef struct FlatRange FlatRange;
224 typedef struct FlatView FlatView;
225
226 /* Range of memory in the global map. Addresses are absolute. */
227 struct FlatRange {
228 MemoryRegion *mr;
229 hwaddr offset_in_region;
230 AddrRange addr;
231 uint8_t dirty_log_mask;
232 bool romd_mode;
233 bool readonly;
234 };
235
236 /* Flattened global view of current active memory hierarchy. Kept in sorted
237 * order.
238 */
239 struct FlatView {
240 unsigned ref;
241 FlatRange *ranges;
242 unsigned nr;
243 unsigned nr_allocated;
244 };
245
246 typedef struct AddressSpaceOps AddressSpaceOps;
247
248 #define FOR_EACH_FLAT_RANGE(var, view) \
249 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
250
251 static bool flatrange_equal(FlatRange *a, FlatRange *b)
252 {
253 return a->mr == b->mr
254 && addrrange_equal(a->addr, b->addr)
255 && a->offset_in_region == b->offset_in_region
256 && a->romd_mode == b->romd_mode
257 && a->readonly == b->readonly;
258 }
259
260 static void flatview_init(FlatView *view)
261 {
262 view->ref = 1;
263 view->ranges = NULL;
264 view->nr = 0;
265 view->nr_allocated = 0;
266 }
267
268 /* Insert a range into a given position. Caller is responsible for maintaining
269 * sorting order.
270 */
271 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
272 {
273 if (view->nr == view->nr_allocated) {
274 view->nr_allocated = MAX(2 * view->nr, 10);
275 view->ranges = g_realloc(view->ranges,
276 view->nr_allocated * sizeof(*view->ranges));
277 }
278 memmove(view->ranges + pos + 1, view->ranges + pos,
279 (view->nr - pos) * sizeof(FlatRange));
280 view->ranges[pos] = *range;
281 memory_region_ref(range->mr);
282 ++view->nr;
283 }
284
285 static void flatview_destroy(FlatView *view)
286 {
287 int i;
288
289 for (i = 0; i < view->nr; i++) {
290 memory_region_unref(view->ranges[i].mr);
291 }
292 g_free(view->ranges);
293 g_free(view);
294 }
295
296 static void flatview_ref(FlatView *view)
297 {
298 atomic_inc(&view->ref);
299 }
300
301 static void flatview_unref(FlatView *view)
302 {
303 if (atomic_fetch_dec(&view->ref) == 1) {
304 flatview_destroy(view);
305 }
306 }
307
308 static bool can_merge(FlatRange *r1, FlatRange *r2)
309 {
310 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
311 && r1->mr == r2->mr
312 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
313 r1->addr.size),
314 int128_make64(r2->offset_in_region))
315 && r1->dirty_log_mask == r2->dirty_log_mask
316 && r1->romd_mode == r2->romd_mode
317 && r1->readonly == r2->readonly;
318 }
319
320 /* Attempt to simplify a view by merging adjacent ranges */
321 static void flatview_simplify(FlatView *view)
322 {
323 unsigned i, j;
324
325 i = 0;
326 while (i < view->nr) {
327 j = i + 1;
328 while (j < view->nr
329 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
330 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
331 ++j;
332 }
333 ++i;
334 memmove(&view->ranges[i], &view->ranges[j],
335 (view->nr - j) * sizeof(view->ranges[j]));
336 view->nr -= j - i;
337 }
338 }
339
340 static bool memory_region_big_endian(MemoryRegion *mr)
341 {
342 #ifdef TARGET_WORDS_BIGENDIAN
343 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
344 #else
345 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
346 #endif
347 }
348
349 static bool memory_region_wrong_endianness(MemoryRegion *mr)
350 {
351 #ifdef TARGET_WORDS_BIGENDIAN
352 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
353 #else
354 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
355 #endif
356 }
357
358 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
359 {
360 if (memory_region_wrong_endianness(mr)) {
361 switch (size) {
362 case 1:
363 break;
364 case 2:
365 *data = bswap16(*data);
366 break;
367 case 4:
368 *data = bswap32(*data);
369 break;
370 case 8:
371 *data = bswap64(*data);
372 break;
373 default:
374 abort();
375 }
376 }
377 }
378
379 static void memory_region_oldmmio_read_accessor(MemoryRegion *mr,
380 hwaddr addr,
381 uint64_t *value,
382 unsigned size,
383 unsigned shift,
384 uint64_t mask)
385 {
386 uint64_t tmp;
387
388 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
389 trace_memory_region_ops_read(mr, addr, tmp, size);
390 *value |= (tmp & mask) << shift;
391 }
392
393 static void memory_region_read_accessor(MemoryRegion *mr,
394 hwaddr addr,
395 uint64_t *value,
396 unsigned size,
397 unsigned shift,
398 uint64_t mask)
399 {
400 uint64_t tmp;
401
402 if (mr->flush_coalesced_mmio) {
403 qemu_flush_coalesced_mmio_buffer();
404 }
405 tmp = mr->ops->read(mr->opaque, addr, size);
406 trace_memory_region_ops_read(mr, addr, tmp, size);
407 *value |= (tmp & mask) << shift;
408 }
409
410 static void memory_region_oldmmio_write_accessor(MemoryRegion *mr,
411 hwaddr addr,
412 uint64_t *value,
413 unsigned size,
414 unsigned shift,
415 uint64_t mask)
416 {
417 uint64_t tmp;
418
419 tmp = (*value >> shift) & mask;
420 trace_memory_region_ops_write(mr, addr, tmp, size);
421 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
422 }
423
424 static void memory_region_write_accessor(MemoryRegion *mr,
425 hwaddr addr,
426 uint64_t *value,
427 unsigned size,
428 unsigned shift,
429 uint64_t mask)
430 {
431 uint64_t tmp;
432
433 if (mr->flush_coalesced_mmio) {
434 qemu_flush_coalesced_mmio_buffer();
435 }
436 tmp = (*value >> shift) & mask;
437 trace_memory_region_ops_write(mr, addr, tmp, size);
438 mr->ops->write(mr->opaque, addr, tmp, size);
439 }
440
441 static void access_with_adjusted_size(hwaddr addr,
442 uint64_t *value,
443 unsigned size,
444 unsigned access_size_min,
445 unsigned access_size_max,
446 void (*access)(MemoryRegion *mr,
447 hwaddr addr,
448 uint64_t *value,
449 unsigned size,
450 unsigned shift,
451 uint64_t mask),
452 MemoryRegion *mr)
453 {
454 uint64_t access_mask;
455 unsigned access_size;
456 unsigned i;
457
458 if (!access_size_min) {
459 access_size_min = 1;
460 }
461 if (!access_size_max) {
462 access_size_max = 4;
463 }
464
465 /* FIXME: support unaligned access? */
466 access_size = MAX(MIN(size, access_size_max), access_size_min);
467 access_mask = -1ULL >> (64 - access_size * 8);
468 if (memory_region_big_endian(mr)) {
469 for (i = 0; i < size; i += access_size) {
470 access(mr, addr + i, value, access_size,
471 (size - access_size - i) * 8, access_mask);
472 }
473 } else {
474 for (i = 0; i < size; i += access_size) {
475 access(mr, addr + i, value, access_size, i * 8, access_mask);
476 }
477 }
478 }
479
480 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
481 {
482 AddressSpace *as;
483
484 while (mr->parent) {
485 mr = mr->parent;
486 }
487 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
488 if (mr == as->root) {
489 return as;
490 }
491 }
492 abort();
493 }
494
495 /* Render a memory region into the global view. Ranges in @view obscure
496 * ranges in @mr.
497 */
498 static void render_memory_region(FlatView *view,
499 MemoryRegion *mr,
500 Int128 base,
501 AddrRange clip,
502 bool readonly)
503 {
504 MemoryRegion *subregion;
505 unsigned i;
506 hwaddr offset_in_region;
507 Int128 remain;
508 Int128 now;
509 FlatRange fr;
510 AddrRange tmp;
511
512 if (!mr->enabled) {
513 return;
514 }
515
516 int128_addto(&base, int128_make64(mr->addr));
517 readonly |= mr->readonly;
518
519 tmp = addrrange_make(base, mr->size);
520
521 if (!addrrange_intersects(tmp, clip)) {
522 return;
523 }
524
525 clip = addrrange_intersection(tmp, clip);
526
527 if (mr->alias) {
528 int128_subfrom(&base, int128_make64(mr->alias->addr));
529 int128_subfrom(&base, int128_make64(mr->alias_offset));
530 render_memory_region(view, mr->alias, base, clip, readonly);
531 return;
532 }
533
534 /* Render subregions in priority order. */
535 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
536 render_memory_region(view, subregion, base, clip, readonly);
537 }
538
539 if (!mr->terminates) {
540 return;
541 }
542
543 offset_in_region = int128_get64(int128_sub(clip.start, base));
544 base = clip.start;
545 remain = clip.size;
546
547 fr.mr = mr;
548 fr.dirty_log_mask = mr->dirty_log_mask;
549 fr.romd_mode = mr->romd_mode;
550 fr.readonly = readonly;
551
552 /* Render the region itself into any gaps left by the current view. */
553 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
554 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
555 continue;
556 }
557 if (int128_lt(base, view->ranges[i].addr.start)) {
558 now = int128_min(remain,
559 int128_sub(view->ranges[i].addr.start, base));
560 fr.offset_in_region = offset_in_region;
561 fr.addr = addrrange_make(base, now);
562 flatview_insert(view, i, &fr);
563 ++i;
564 int128_addto(&base, now);
565 offset_in_region += int128_get64(now);
566 int128_subfrom(&remain, now);
567 }
568 now = int128_sub(int128_min(int128_add(base, remain),
569 addrrange_end(view->ranges[i].addr)),
570 base);
571 int128_addto(&base, now);
572 offset_in_region += int128_get64(now);
573 int128_subfrom(&remain, now);
574 }
575 if (int128_nz(remain)) {
576 fr.offset_in_region = offset_in_region;
577 fr.addr = addrrange_make(base, remain);
578 flatview_insert(view, i, &fr);
579 }
580 }
581
582 /* Render a memory topology into a list of disjoint absolute ranges. */
583 static FlatView *generate_memory_topology(MemoryRegion *mr)
584 {
585 FlatView *view;
586
587 view = g_new(FlatView, 1);
588 flatview_init(view);
589
590 if (mr) {
591 render_memory_region(view, mr, int128_zero(),
592 addrrange_make(int128_zero(), int128_2_64()), false);
593 }
594 flatview_simplify(view);
595
596 return view;
597 }
598
599 static void address_space_add_del_ioeventfds(AddressSpace *as,
600 MemoryRegionIoeventfd *fds_new,
601 unsigned fds_new_nb,
602 MemoryRegionIoeventfd *fds_old,
603 unsigned fds_old_nb)
604 {
605 unsigned iold, inew;
606 MemoryRegionIoeventfd *fd;
607 MemoryRegionSection section;
608
609 /* Generate a symmetric difference of the old and new fd sets, adding
610 * and deleting as necessary.
611 */
612
613 iold = inew = 0;
614 while (iold < fds_old_nb || inew < fds_new_nb) {
615 if (iold < fds_old_nb
616 && (inew == fds_new_nb
617 || memory_region_ioeventfd_before(fds_old[iold],
618 fds_new[inew]))) {
619 fd = &fds_old[iold];
620 section = (MemoryRegionSection) {
621 .address_space = as,
622 .offset_within_address_space = int128_get64(fd->addr.start),
623 .size = fd->addr.size,
624 };
625 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
626 fd->match_data, fd->data, fd->e);
627 ++iold;
628 } else if (inew < fds_new_nb
629 && (iold == fds_old_nb
630 || memory_region_ioeventfd_before(fds_new[inew],
631 fds_old[iold]))) {
632 fd = &fds_new[inew];
633 section = (MemoryRegionSection) {
634 .address_space = as,
635 .offset_within_address_space = int128_get64(fd->addr.start),
636 .size = fd->addr.size,
637 };
638 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
639 fd->match_data, fd->data, fd->e);
640 ++inew;
641 } else {
642 ++iold;
643 ++inew;
644 }
645 }
646 }
647
648 static FlatView *address_space_get_flatview(AddressSpace *as)
649 {
650 FlatView *view;
651
652 qemu_mutex_lock(&flat_view_mutex);
653 view = as->current_map;
654 flatview_ref(view);
655 qemu_mutex_unlock(&flat_view_mutex);
656 return view;
657 }
658
659 static void address_space_update_ioeventfds(AddressSpace *as)
660 {
661 FlatView *view;
662 FlatRange *fr;
663 unsigned ioeventfd_nb = 0;
664 MemoryRegionIoeventfd *ioeventfds = NULL;
665 AddrRange tmp;
666 unsigned i;
667
668 view = address_space_get_flatview(as);
669 FOR_EACH_FLAT_RANGE(fr, view) {
670 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
671 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
672 int128_sub(fr->addr.start,
673 int128_make64(fr->offset_in_region)));
674 if (addrrange_intersects(fr->addr, tmp)) {
675 ++ioeventfd_nb;
676 ioeventfds = g_realloc(ioeventfds,
677 ioeventfd_nb * sizeof(*ioeventfds));
678 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
679 ioeventfds[ioeventfd_nb-1].addr = tmp;
680 }
681 }
682 }
683
684 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
685 as->ioeventfds, as->ioeventfd_nb);
686
687 g_free(as->ioeventfds);
688 as->ioeventfds = ioeventfds;
689 as->ioeventfd_nb = ioeventfd_nb;
690 flatview_unref(view);
691 }
692
693 static void address_space_update_topology_pass(AddressSpace *as,
694 const FlatView *old_view,
695 const FlatView *new_view,
696 bool adding)
697 {
698 unsigned iold, inew;
699 FlatRange *frold, *frnew;
700
701 /* Generate a symmetric difference of the old and new memory maps.
702 * Kill ranges in the old map, and instantiate ranges in the new map.
703 */
704 iold = inew = 0;
705 while (iold < old_view->nr || inew < new_view->nr) {
706 if (iold < old_view->nr) {
707 frold = &old_view->ranges[iold];
708 } else {
709 frold = NULL;
710 }
711 if (inew < new_view->nr) {
712 frnew = &new_view->ranges[inew];
713 } else {
714 frnew = NULL;
715 }
716
717 if (frold
718 && (!frnew
719 || int128_lt(frold->addr.start, frnew->addr.start)
720 || (int128_eq(frold->addr.start, frnew->addr.start)
721 && !flatrange_equal(frold, frnew)))) {
722 /* In old but not in new, or in both but attributes changed. */
723
724 if (!adding) {
725 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
726 }
727
728 ++iold;
729 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
730 /* In both and unchanged (except logging may have changed) */
731
732 if (adding) {
733 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
734 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
735 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
736 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
737 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
738 }
739 }
740
741 ++iold;
742 ++inew;
743 } else {
744 /* In new */
745
746 if (adding) {
747 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
748 }
749
750 ++inew;
751 }
752 }
753 }
754
755
756 static void address_space_update_topology(AddressSpace *as)
757 {
758 FlatView *old_view = address_space_get_flatview(as);
759 FlatView *new_view = generate_memory_topology(as->root);
760
761 address_space_update_topology_pass(as, old_view, new_view, false);
762 address_space_update_topology_pass(as, old_view, new_view, true);
763
764 qemu_mutex_lock(&flat_view_mutex);
765 flatview_unref(as->current_map);
766 as->current_map = new_view;
767 qemu_mutex_unlock(&flat_view_mutex);
768
769 /* Note that all the old MemoryRegions are still alive up to this
770 * point. This relieves most MemoryListeners from the need to
771 * ref/unref the MemoryRegions they get---unless they use them
772 * outside the iothread mutex, in which case precise reference
773 * counting is necessary.
774 */
775 flatview_unref(old_view);
776
777 address_space_update_ioeventfds(as);
778 }
779
780 void memory_region_transaction_begin(void)
781 {
782 qemu_flush_coalesced_mmio_buffer();
783 ++memory_region_transaction_depth;
784 }
785
786 void memory_region_transaction_commit(void)
787 {
788 AddressSpace *as;
789
790 assert(memory_region_transaction_depth);
791 --memory_region_transaction_depth;
792 if (!memory_region_transaction_depth && memory_region_update_pending) {
793 memory_region_update_pending = false;
794 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
795
796 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
797 address_space_update_topology(as);
798 }
799
800 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
801 }
802 }
803
804 static void memory_region_destructor_none(MemoryRegion *mr)
805 {
806 }
807
808 static void memory_region_destructor_ram(MemoryRegion *mr)
809 {
810 qemu_ram_free(mr->ram_addr);
811 }
812
813 static void memory_region_destructor_alias(MemoryRegion *mr)
814 {
815 memory_region_unref(mr->alias);
816 }
817
818 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
819 {
820 qemu_ram_free_from_ptr(mr->ram_addr);
821 }
822
823 static void memory_region_destructor_rom_device(MemoryRegion *mr)
824 {
825 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
826 }
827
828 void memory_region_init(MemoryRegion *mr,
829 Object *owner,
830 const char *name,
831 uint64_t size)
832 {
833 mr->ops = &unassigned_mem_ops;
834 mr->opaque = NULL;
835 mr->owner = owner;
836 mr->iommu_ops = NULL;
837 mr->parent = NULL;
838 mr->size = int128_make64(size);
839 if (size == UINT64_MAX) {
840 mr->size = int128_2_64();
841 }
842 mr->addr = 0;
843 mr->subpage = false;
844 mr->enabled = true;
845 mr->terminates = false;
846 mr->ram = false;
847 mr->romd_mode = true;
848 mr->readonly = false;
849 mr->rom_device = false;
850 mr->destructor = memory_region_destructor_none;
851 mr->priority = 0;
852 mr->may_overlap = false;
853 mr->alias = NULL;
854 QTAILQ_INIT(&mr->subregions);
855 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
856 QTAILQ_INIT(&mr->coalesced);
857 mr->name = g_strdup(name);
858 mr->dirty_log_mask = 0;
859 mr->ioeventfd_nb = 0;
860 mr->ioeventfds = NULL;
861 mr->flush_coalesced_mmio = false;
862 }
863
864 static int qemu_target_backtrace(target_ulong *array, size_t size)
865 {
866 int n = 0;
867 if (size >= 2) {
868 #if defined(TARGET_ARM)
869 CPUArchState *env = current_cpu->env_ptr;
870 array[0] = env->regs[15];
871 array[1] = env->regs[14];
872 #elif defined(TARGET_MIPS)
873 CPUArchState *env = current_cpu->env_ptr;
874 array[0] = env->active_tc.PC;
875 array[1] = env->active_tc.gpr[31];
876 #else
877 array[0] = 0;
878 array[1] = 0;
879 #endif
880 n = 2;
881 }
882 return n;
883 }
884
885 #include "disas/disas.h"
886 const char *qemu_sprint_backtrace(char *buffer, size_t length)
887 {
888 char *p = buffer;
889 if (current_cpu) {
890 target_ulong caller[2];
891 const char *symbol;
892 qemu_target_backtrace(caller, 2);
893 symbol = lookup_symbol(caller[0]);
894 p += sprintf(p, "[%s]", symbol);
895 symbol = lookup_symbol(caller[1]);
896 p += sprintf(p, "[%s]", symbol);
897 } else {
898 p += sprintf(p, "[cpu not running]");
899 }
900 assert((p - buffer) < length);
901 return buffer;
902 }
903
904 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
905 unsigned size)
906 {
907 if (trace_unassigned) {
908 char buffer[256];
909 fprintf(stderr, "Unassigned mem read " TARGET_FMT_plx " %s\n",
910 addr, qemu_sprint_backtrace(buffer, sizeof(buffer)));
911 }
912 //~ vm_stop(0);
913 if (current_cpu != NULL) {
914 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
915 }
916 return 0;
917 }
918
919 static void unassigned_mem_write(void *opaque, hwaddr addr,
920 uint64_t val, unsigned size)
921 {
922 if (trace_unassigned) {
923 char buffer[256];
924 fprintf(stderr, "Unassigned mem write " TARGET_FMT_plx
925 " = 0x%" PRIx64 " %s\n",
926 addr, val, qemu_sprint_backtrace(buffer, sizeof(buffer)));
927 }
928 if (current_cpu != NULL) {
929 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
930 }
931 }
932
933 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
934 unsigned size, bool is_write)
935 {
936 return false;
937 }
938
939 const MemoryRegionOps unassigned_mem_ops = {
940 .valid.accepts = unassigned_mem_accepts,
941 .endianness = DEVICE_NATIVE_ENDIAN,
942 };
943
944 bool memory_region_access_valid(MemoryRegion *mr,
945 hwaddr addr,
946 unsigned size,
947 bool is_write)
948 {
949 int access_size_min, access_size_max;
950 int access_size, i;
951
952 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
953 fprintf(stderr, "Misaligned i/o with size %u for memory region %s\n",
954 size, mr->name);
955 return false;
956 }
957
958 if (!mr->ops->valid.accepts) {
959 return true;
960 }
961
962 access_size_min = mr->ops->valid.min_access_size;
963 if (!mr->ops->valid.min_access_size) {
964 access_size_min = 1;
965 }
966
967 access_size_max = mr->ops->valid.max_access_size;
968 if (!mr->ops->valid.max_access_size) {
969 access_size_max = 4;
970 }
971
972 access_size = MAX(MIN(size, access_size_max), access_size_min);
973 for (i = 0; i < size; i += access_size) {
974 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
975 is_write)) {
976 return false;
977 }
978 }
979
980 return true;
981 }
982
983 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
984 hwaddr addr,
985 unsigned size)
986 {
987 uint64_t data = 0;
988
989 if (mr->ops->read) {
990 access_with_adjusted_size(addr, &data, size,
991 mr->ops->impl.min_access_size,
992 mr->ops->impl.max_access_size,
993 memory_region_read_accessor, mr);
994 } else {
995 access_with_adjusted_size(addr, &data, size, 1, 4,
996 memory_region_oldmmio_read_accessor, mr);
997 }
998
999 return data;
1000 }
1001
1002 static bool memory_region_dispatch_read(MemoryRegion *mr,
1003 hwaddr addr,
1004 uint64_t *pval,
1005 unsigned size)
1006 {
1007 if (!memory_region_access_valid(mr, addr, size, false)) {
1008 *pval = unassigned_mem_read(mr, addr, size);
1009 return true;
1010 }
1011
1012 *pval = memory_region_dispatch_read1(mr, addr, size);
1013 adjust_endianness(mr, pval, size);
1014 return false;
1015 }
1016
1017 static bool memory_region_dispatch_write(MemoryRegion *mr,
1018 hwaddr addr,
1019 uint64_t data,
1020 unsigned size)
1021 {
1022 if (!memory_region_access_valid(mr, addr, size, true)) {
1023 unassigned_mem_write(mr, addr, data, size);
1024 return true;
1025 }
1026
1027 adjust_endianness(mr, &data, size);
1028
1029 if (mr->ops->write) {
1030 access_with_adjusted_size(addr, &data, size,
1031 mr->ops->impl.min_access_size,
1032 mr->ops->impl.max_access_size,
1033 memory_region_write_accessor, mr);
1034 } else {
1035 access_with_adjusted_size(addr, &data, size, 1, 4,
1036 memory_region_oldmmio_write_accessor, mr);
1037 }
1038 return false;
1039 }
1040
1041 void memory_region_init_io(MemoryRegion *mr,
1042 Object *owner,
1043 const MemoryRegionOps *ops,
1044 void *opaque,
1045 const char *name,
1046 uint64_t size)
1047 {
1048 memory_region_init(mr, owner, name, size);
1049 mr->ops = ops;
1050 mr->opaque = opaque;
1051 mr->terminates = true;
1052 mr->ram_addr = ~(ram_addr_t)0;
1053 }
1054
1055 void memory_region_init_ram(MemoryRegion *mr,
1056 Object *owner,
1057 const char *name,
1058 uint64_t size)
1059 {
1060 memory_region_init(mr, owner, name, size);
1061 mr->ram = true;
1062 mr->terminates = true;
1063 mr->destructor = memory_region_destructor_ram;
1064 mr->ram_addr = qemu_ram_alloc(size, mr);
1065 }
1066
1067 void memory_region_init_ram_ptr(MemoryRegion *mr,
1068 Object *owner,
1069 const char *name,
1070 uint64_t size,
1071 void *ptr)
1072 {
1073 memory_region_init(mr, owner, name, size);
1074 mr->ram = true;
1075 mr->terminates = true;
1076 mr->destructor = memory_region_destructor_ram_from_ptr;
1077 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
1078 }
1079
1080 void memory_region_init_alias(MemoryRegion *mr,
1081 Object *owner,
1082 const char *name,
1083 MemoryRegion *orig,
1084 hwaddr offset,
1085 uint64_t size)
1086 {
1087 memory_region_init(mr, owner, name, size);
1088 memory_region_ref(orig);
1089 mr->destructor = memory_region_destructor_alias;
1090 mr->alias = orig;
1091 mr->alias_offset = offset;
1092 }
1093
1094 void memory_region_init_rom_device(MemoryRegion *mr,
1095 Object *owner,
1096 const MemoryRegionOps *ops,
1097 void *opaque,
1098 const char *name,
1099 uint64_t size)
1100 {
1101 memory_region_init(mr, owner, name, size);
1102 mr->ops = ops;
1103 mr->opaque = opaque;
1104 mr->terminates = true;
1105 mr->rom_device = true;
1106 mr->destructor = memory_region_destructor_rom_device;
1107 mr->ram_addr = qemu_ram_alloc(size, mr);
1108 }
1109
1110 void memory_region_init_iommu(MemoryRegion *mr,
1111 Object *owner,
1112 const MemoryRegionIOMMUOps *ops,
1113 const char *name,
1114 uint64_t size)
1115 {
1116 memory_region_init(mr, owner, name, size);
1117 mr->iommu_ops = ops,
1118 mr->terminates = true; /* then re-forwards */
1119 notifier_list_init(&mr->iommu_notify);
1120 }
1121
1122 void memory_region_init_reservation(MemoryRegion *mr,
1123 Object *owner,
1124 const char *name,
1125 uint64_t size)
1126 {
1127 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1128 }
1129
1130 void memory_region_destroy(MemoryRegion *mr)
1131 {
1132 assert(QTAILQ_EMPTY(&mr->subregions));
1133 assert(memory_region_transaction_depth == 0);
1134 mr->destructor(mr);
1135 memory_region_clear_coalescing(mr);
1136 g_free((char *)mr->name);
1137 g_free(mr->ioeventfds);
1138 }
1139
1140 Object *memory_region_owner(MemoryRegion *mr)
1141 {
1142 return mr->owner;
1143 }
1144
1145 void memory_region_ref(MemoryRegion *mr)
1146 {
1147 if (mr && mr->owner) {
1148 object_ref(mr->owner);
1149 }
1150 }
1151
1152 void memory_region_unref(MemoryRegion *mr)
1153 {
1154 if (mr && mr->owner) {
1155 object_unref(mr->owner);
1156 }
1157 }
1158
1159 uint64_t memory_region_size(MemoryRegion *mr)
1160 {
1161 if (int128_eq(mr->size, int128_2_64())) {
1162 return UINT64_MAX;
1163 }
1164 return int128_get64(mr->size);
1165 }
1166
1167 const char *memory_region_name(MemoryRegion *mr)
1168 {
1169 return mr->name;
1170 }
1171
1172 bool memory_region_is_ram(MemoryRegion *mr)
1173 {
1174 return mr->ram;
1175 }
1176
1177 bool memory_region_is_logging(MemoryRegion *mr)
1178 {
1179 return mr->dirty_log_mask;
1180 }
1181
1182 bool memory_region_is_rom(MemoryRegion *mr)
1183 {
1184 return mr->ram && mr->readonly;
1185 }
1186
1187 bool memory_region_is_iommu(MemoryRegion *mr)
1188 {
1189 return mr->iommu_ops;
1190 }
1191
1192 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1193 {
1194 notifier_list_add(&mr->iommu_notify, n);
1195 }
1196
1197 void memory_region_unregister_iommu_notifier(Notifier *n)
1198 {
1199 notifier_remove(n);
1200 }
1201
1202 void memory_region_notify_iommu(MemoryRegion *mr,
1203 IOMMUTLBEntry entry)
1204 {
1205 assert(memory_region_is_iommu(mr));
1206 notifier_list_notify(&mr->iommu_notify, &entry);
1207 }
1208
1209 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1210 {
1211 uint8_t mask = 1 << client;
1212
1213 memory_region_transaction_begin();
1214 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1215 memory_region_update_pending |= mr->enabled;
1216 memory_region_transaction_commit();
1217 }
1218
1219 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1220 hwaddr size, unsigned client)
1221 {
1222 assert(mr->terminates);
1223 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1224 1 << client);
1225 }
1226
1227 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1228 hwaddr size)
1229 {
1230 assert(mr->terminates);
1231 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1232 }
1233
1234 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1235 hwaddr size, unsigned client)
1236 {
1237 bool ret;
1238 assert(mr->terminates);
1239 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1240 1 << client);
1241 if (ret) {
1242 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1243 mr->ram_addr + addr + size,
1244 1 << client);
1245 }
1246 return ret;
1247 }
1248
1249
1250 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1251 {
1252 AddressSpace *as;
1253 FlatRange *fr;
1254
1255 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1256 FlatView *view = address_space_get_flatview(as);
1257 FOR_EACH_FLAT_RANGE(fr, view) {
1258 if (fr->mr == mr) {
1259 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1260 }
1261 }
1262 flatview_unref(view);
1263 }
1264 }
1265
1266 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1267 {
1268 if (mr->readonly != readonly) {
1269 memory_region_transaction_begin();
1270 mr->readonly = readonly;
1271 memory_region_update_pending |= mr->enabled;
1272 memory_region_transaction_commit();
1273 }
1274 }
1275
1276 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1277 {
1278 if (mr->romd_mode != romd_mode) {
1279 memory_region_transaction_begin();
1280 mr->romd_mode = romd_mode;
1281 memory_region_update_pending |= mr->enabled;
1282 memory_region_transaction_commit();
1283 }
1284 }
1285
1286 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1287 hwaddr size, unsigned client)
1288 {
1289 assert(mr->terminates);
1290 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1291 mr->ram_addr + addr + size,
1292 1 << client);
1293 }
1294
1295 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1296 {
1297 if (mr->alias) {
1298 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1299 }
1300
1301 assert(mr->terminates);
1302
1303 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1304 }
1305
1306 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1307 {
1308 FlatView *view;
1309 FlatRange *fr;
1310 CoalescedMemoryRange *cmr;
1311 AddrRange tmp;
1312 MemoryRegionSection section;
1313
1314 view = address_space_get_flatview(as);
1315 FOR_EACH_FLAT_RANGE(fr, view) {
1316 if (fr->mr == mr) {
1317 section = (MemoryRegionSection) {
1318 .address_space = as,
1319 .offset_within_address_space = int128_get64(fr->addr.start),
1320 .size = fr->addr.size,
1321 };
1322
1323 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1324 int128_get64(fr->addr.start),
1325 int128_get64(fr->addr.size));
1326 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1327 tmp = addrrange_shift(cmr->addr,
1328 int128_sub(fr->addr.start,
1329 int128_make64(fr->offset_in_region)));
1330 if (!addrrange_intersects(tmp, fr->addr)) {
1331 continue;
1332 }
1333 tmp = addrrange_intersection(tmp, fr->addr);
1334 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1335 int128_get64(tmp.start),
1336 int128_get64(tmp.size));
1337 }
1338 }
1339 }
1340 flatview_unref(view);
1341 }
1342
1343 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1344 {
1345 AddressSpace *as;
1346
1347 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1348 memory_region_update_coalesced_range_as(mr, as);
1349 }
1350 }
1351
1352 void memory_region_set_coalescing(MemoryRegion *mr)
1353 {
1354 memory_region_clear_coalescing(mr);
1355 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1356 }
1357
1358 void memory_region_add_coalescing(MemoryRegion *mr,
1359 hwaddr offset,
1360 uint64_t size)
1361 {
1362 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1363
1364 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1365 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1366 memory_region_update_coalesced_range(mr);
1367 memory_region_set_flush_coalesced(mr);
1368 }
1369
1370 void memory_region_clear_coalescing(MemoryRegion *mr)
1371 {
1372 CoalescedMemoryRange *cmr;
1373
1374 qemu_flush_coalesced_mmio_buffer();
1375 mr->flush_coalesced_mmio = false;
1376
1377 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1378 cmr = QTAILQ_FIRST(&mr->coalesced);
1379 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1380 g_free(cmr);
1381 }
1382 memory_region_update_coalesced_range(mr);
1383 }
1384
1385 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1386 {
1387 mr->flush_coalesced_mmio = true;
1388 }
1389
1390 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1391 {
1392 qemu_flush_coalesced_mmio_buffer();
1393 if (QTAILQ_EMPTY(&mr->coalesced)) {
1394 mr->flush_coalesced_mmio = false;
1395 }
1396 }
1397
1398 void memory_region_add_eventfd(MemoryRegion *mr,
1399 hwaddr addr,
1400 unsigned size,
1401 bool match_data,
1402 uint64_t data,
1403 EventNotifier *e)
1404 {
1405 MemoryRegionIoeventfd mrfd = {
1406 .addr.start = int128_make64(addr),
1407 .addr.size = int128_make64(size),
1408 .match_data = match_data,
1409 .data = data,
1410 .e = e,
1411 };
1412 unsigned i;
1413
1414 adjust_endianness(mr, &mrfd.data, size);
1415 memory_region_transaction_begin();
1416 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1417 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1418 break;
1419 }
1420 }
1421 ++mr->ioeventfd_nb;
1422 mr->ioeventfds = g_realloc(mr->ioeventfds,
1423 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1424 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1425 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1426 mr->ioeventfds[i] = mrfd;
1427 memory_region_update_pending |= mr->enabled;
1428 memory_region_transaction_commit();
1429 }
1430
1431 void memory_region_del_eventfd(MemoryRegion *mr,
1432 hwaddr addr,
1433 unsigned size,
1434 bool match_data,
1435 uint64_t data,
1436 EventNotifier *e)
1437 {
1438 MemoryRegionIoeventfd mrfd = {
1439 .addr.start = int128_make64(addr),
1440 .addr.size = int128_make64(size),
1441 .match_data = match_data,
1442 .data = data,
1443 .e = e,
1444 };
1445 unsigned i;
1446
1447 adjust_endianness(mr, &mrfd.data, size);
1448 memory_region_transaction_begin();
1449 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1450 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1451 break;
1452 }
1453 }
1454 assert(i != mr->ioeventfd_nb);
1455 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1456 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1457 --mr->ioeventfd_nb;
1458 mr->ioeventfds = g_realloc(mr->ioeventfds,
1459 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1460 memory_region_update_pending |= mr->enabled;
1461 memory_region_transaction_commit();
1462 }
1463
1464 static void memory_region_add_subregion_common(MemoryRegion *mr,
1465 hwaddr offset,
1466 MemoryRegion *subregion)
1467 {
1468 MemoryRegion *other;
1469
1470 memory_region_transaction_begin();
1471
1472 assert(!subregion->parent);
1473 memory_region_ref(subregion);
1474 subregion->parent = mr;
1475 subregion->addr = offset;
1476 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1477 if (subregion->may_overlap || other->may_overlap) {
1478 continue;
1479 }
1480 if (int128_ge(int128_make64(offset),
1481 int128_add(int128_make64(other->addr), other->size))
1482 || int128_le(int128_add(int128_make64(offset), subregion->size),
1483 int128_make64(other->addr))) {
1484 continue;
1485 }
1486 #if 0
1487 printf("warning: subregion collision %llx/%llx (%s) "
1488 "vs %llx/%llx (%s)\n",
1489 (unsigned long long)offset,
1490 (unsigned long long)int128_get64(subregion->size),
1491 subregion->name,
1492 (unsigned long long)other->addr,
1493 (unsigned long long)int128_get64(other->size),
1494 other->name);
1495 #endif
1496 }
1497 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1498 if (subregion->priority >= other->priority) {
1499 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1500 goto done;
1501 }
1502 }
1503 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1504 done:
1505 memory_region_update_pending |= mr->enabled && subregion->enabled;
1506 memory_region_transaction_commit();
1507 }
1508
1509
1510 void memory_region_add_subregion(MemoryRegion *mr,
1511 hwaddr offset,
1512 MemoryRegion *subregion)
1513 {
1514 subregion->may_overlap = false;
1515 subregion->priority = 0;
1516 memory_region_add_subregion_common(mr, offset, subregion);
1517 }
1518
1519 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1520 hwaddr offset,
1521 MemoryRegion *subregion,
1522 int priority)
1523 {
1524 subregion->may_overlap = true;
1525 subregion->priority = priority;
1526 memory_region_add_subregion_common(mr, offset, subregion);
1527 }
1528
1529 void memory_region_del_subregion(MemoryRegion *mr,
1530 MemoryRegion *subregion)
1531 {
1532 memory_region_transaction_begin();
1533 assert(subregion->parent == mr);
1534 subregion->parent = NULL;
1535 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1536 memory_region_unref(subregion);
1537 memory_region_update_pending |= mr->enabled && subregion->enabled;
1538 memory_region_transaction_commit();
1539 }
1540
1541 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1542 {
1543 if (enabled == mr->enabled) {
1544 return;
1545 }
1546 memory_region_transaction_begin();
1547 mr->enabled = enabled;
1548 memory_region_update_pending = true;
1549 memory_region_transaction_commit();
1550 }
1551
1552 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1553 {
1554 MemoryRegion *parent = mr->parent;
1555 int priority = mr->priority;
1556 bool may_overlap = mr->may_overlap;
1557
1558 if (addr == mr->addr || !parent) {
1559 mr->addr = addr;
1560 return;
1561 }
1562
1563 memory_region_transaction_begin();
1564 memory_region_ref(mr);
1565 memory_region_del_subregion(parent, mr);
1566 if (may_overlap) {
1567 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1568 } else {
1569 memory_region_add_subregion(parent, addr, mr);
1570 }
1571 memory_region_unref(mr);
1572 memory_region_transaction_commit();
1573 }
1574
1575 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1576 {
1577 assert(mr->alias);
1578
1579 if (offset == mr->alias_offset) {
1580 return;
1581 }
1582
1583 memory_region_transaction_begin();
1584 mr->alias_offset = offset;
1585 memory_region_update_pending |= mr->enabled;
1586 memory_region_transaction_commit();
1587 }
1588
1589 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1590 {
1591 return mr->ram_addr;
1592 }
1593
1594 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1595 {
1596 const AddrRange *addr = addr_;
1597 const FlatRange *fr = fr_;
1598
1599 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1600 return -1;
1601 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1602 return 1;
1603 }
1604 return 0;
1605 }
1606
1607 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1608 {
1609 return bsearch(&addr, view->ranges, view->nr,
1610 sizeof(FlatRange), cmp_flatrange_addr);
1611 }
1612
1613 bool memory_region_present(MemoryRegion *parent, hwaddr addr)
1614 {
1615 MemoryRegion *mr = memory_region_find(parent, addr, 1).mr;
1616 if (!mr) {
1617 return false;
1618 }
1619 memory_region_unref(mr);
1620 return true;
1621 }
1622
1623 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1624 hwaddr addr, uint64_t size)
1625 {
1626 MemoryRegionSection ret = { .mr = NULL };
1627 MemoryRegion *root;
1628 AddressSpace *as;
1629 AddrRange range;
1630 FlatView *view;
1631 FlatRange *fr;
1632
1633 addr += mr->addr;
1634 for (root = mr; root->parent; ) {
1635 root = root->parent;
1636 addr += root->addr;
1637 }
1638
1639 as = memory_region_to_address_space(root);
1640 range = addrrange_make(int128_make64(addr), int128_make64(size));
1641
1642 view = address_space_get_flatview(as);
1643 fr = flatview_lookup(view, range);
1644 if (!fr) {
1645 return ret;
1646 }
1647
1648 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
1649 --fr;
1650 }
1651
1652 ret.mr = fr->mr;
1653 ret.address_space = as;
1654 range = addrrange_intersection(range, fr->addr);
1655 ret.offset_within_region = fr->offset_in_region;
1656 ret.offset_within_region += int128_get64(int128_sub(range.start,
1657 fr->addr.start));
1658 ret.size = range.size;
1659 ret.offset_within_address_space = int128_get64(range.start);
1660 ret.readonly = fr->readonly;
1661 memory_region_ref(ret.mr);
1662
1663 flatview_unref(view);
1664 return ret;
1665 }
1666
1667 void address_space_sync_dirty_bitmap(AddressSpace *as)
1668 {
1669 FlatView *view;
1670 FlatRange *fr;
1671
1672 view = address_space_get_flatview(as);
1673 FOR_EACH_FLAT_RANGE(fr, view) {
1674 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1675 }
1676 flatview_unref(view);
1677 }
1678
1679 void memory_global_dirty_log_start(void)
1680 {
1681 global_dirty_log = true;
1682 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1683 }
1684
1685 void memory_global_dirty_log_stop(void)
1686 {
1687 global_dirty_log = false;
1688 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1689 }
1690
1691 static void listener_add_address_space(MemoryListener *listener,
1692 AddressSpace *as)
1693 {
1694 FlatView *view;
1695 FlatRange *fr;
1696
1697 if (listener->address_space_filter
1698 && listener->address_space_filter != as) {
1699 return;
1700 }
1701
1702 if (global_dirty_log) {
1703 if (listener->log_global_start) {
1704 listener->log_global_start(listener);
1705 }
1706 }
1707
1708 view = address_space_get_flatview(as);
1709 FOR_EACH_FLAT_RANGE(fr, view) {
1710 MemoryRegionSection section = {
1711 .mr = fr->mr,
1712 .address_space = as,
1713 .offset_within_region = fr->offset_in_region,
1714 .size = fr->addr.size,
1715 .offset_within_address_space = int128_get64(fr->addr.start),
1716 .readonly = fr->readonly,
1717 };
1718 if (listener->region_add) {
1719 listener->region_add(listener, &section);
1720 }
1721 }
1722 flatview_unref(view);
1723 }
1724
1725 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1726 {
1727 MemoryListener *other = NULL;
1728 AddressSpace *as;
1729
1730 listener->address_space_filter = filter;
1731 if (QTAILQ_EMPTY(&memory_listeners)
1732 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1733 memory_listeners)->priority) {
1734 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1735 } else {
1736 QTAILQ_FOREACH(other, &memory_listeners, link) {
1737 if (listener->priority < other->priority) {
1738 break;
1739 }
1740 }
1741 QTAILQ_INSERT_BEFORE(other, listener, link);
1742 }
1743
1744 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1745 listener_add_address_space(listener, as);
1746 }
1747 }
1748
1749 void memory_listener_unregister(MemoryListener *listener)
1750 {
1751 QTAILQ_REMOVE(&memory_listeners, listener, link);
1752 }
1753
1754 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1755 {
1756 if (QTAILQ_EMPTY(&address_spaces)) {
1757 memory_init();
1758 }
1759
1760 memory_region_transaction_begin();
1761 as->root = root;
1762 as->current_map = g_new(FlatView, 1);
1763 flatview_init(as->current_map);
1764 as->ioeventfd_nb = 0;
1765 as->ioeventfds = NULL;
1766 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1767 as->name = g_strdup(name ? name : "anonymous");
1768 address_space_init_dispatch(as);
1769 memory_region_update_pending |= root->enabled;
1770 memory_region_transaction_commit();
1771 }
1772
1773 void address_space_destroy(AddressSpace *as)
1774 {
1775 /* Flush out anything from MemoryListeners listening in on this */
1776 memory_region_transaction_begin();
1777 as->root = NULL;
1778 memory_region_transaction_commit();
1779 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1780 address_space_destroy_dispatch(as);
1781 flatview_unref(as->current_map);
1782 g_free(as->name);
1783 g_free(as->ioeventfds);
1784 }
1785
1786 bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
1787 {
1788 return memory_region_dispatch_read(mr, addr, pval, size);
1789 }
1790
1791 bool io_mem_write(MemoryRegion *mr, hwaddr addr,
1792 uint64_t val, unsigned size)
1793 {
1794 return memory_region_dispatch_write(mr, addr, val, size);
1795 }
1796
1797 typedef struct MemoryRegionList MemoryRegionList;
1798
1799 struct MemoryRegionList {
1800 const MemoryRegion *mr;
1801 bool printed;
1802 QTAILQ_ENTRY(MemoryRegionList) queue;
1803 };
1804
1805 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1806
1807 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1808 const MemoryRegion *mr, unsigned int level,
1809 hwaddr base,
1810 MemoryRegionListHead *alias_print_queue)
1811 {
1812 MemoryRegionList *new_ml, *ml, *next_ml;
1813 MemoryRegionListHead submr_print_queue;
1814 const MemoryRegion *submr;
1815 unsigned int i;
1816
1817 if (!mr || !mr->enabled) {
1818 return;
1819 }
1820
1821 for (i = 0; i < level; i++) {
1822 mon_printf(f, " ");
1823 }
1824
1825 if (mr->alias) {
1826 MemoryRegionList *ml;
1827 bool found = false;
1828
1829 /* check if the alias is already in the queue */
1830 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1831 if (ml->mr == mr->alias && !ml->printed) {
1832 found = true;
1833 }
1834 }
1835
1836 if (!found) {
1837 ml = g_new(MemoryRegionList, 1);
1838 ml->mr = mr->alias;
1839 ml->printed = false;
1840 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1841 }
1842 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1843 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1844 "-" TARGET_FMT_plx "\n",
1845 base + mr->addr,
1846 base + mr->addr
1847 + (int128_nz(mr->size) ?
1848 (hwaddr)int128_get64(int128_sub(mr->size,
1849 int128_one())) : 0),
1850 mr->priority,
1851 mr->romd_mode ? 'R' : '-',
1852 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1853 : '-',
1854 mr->name,
1855 mr->alias->name,
1856 mr->alias_offset,
1857 mr->alias_offset
1858 + (int128_nz(mr->size) ?
1859 (hwaddr)int128_get64(int128_sub(mr->size,
1860 int128_one())) : 0));
1861 } else {
1862 mon_printf(f,
1863 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1864 base + mr->addr,
1865 base + mr->addr
1866 + (int128_nz(mr->size) ?
1867 (hwaddr)int128_get64(int128_sub(mr->size,
1868 int128_one())) : 0),
1869 mr->priority,
1870 mr->romd_mode ? 'R' : '-',
1871 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1872 : '-',
1873 mr->name);
1874 }
1875
1876 QTAILQ_INIT(&submr_print_queue);
1877
1878 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1879 new_ml = g_new(MemoryRegionList, 1);
1880 new_ml->mr = submr;
1881 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1882 if (new_ml->mr->addr < ml->mr->addr ||
1883 (new_ml->mr->addr == ml->mr->addr &&
1884 new_ml->mr->priority > ml->mr->priority)) {
1885 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1886 new_ml = NULL;
1887 break;
1888 }
1889 }
1890 if (new_ml) {
1891 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1892 }
1893 }
1894
1895 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1896 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1897 alias_print_queue);
1898 }
1899
1900 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1901 g_free(ml);
1902 }
1903 }
1904
1905 void mtree_info(fprintf_function mon_printf, void *f)
1906 {
1907 MemoryRegionListHead ml_head;
1908 MemoryRegionList *ml, *ml2;
1909 AddressSpace *as;
1910
1911 QTAILQ_INIT(&ml_head);
1912
1913 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1914 mon_printf(f, "%s\n", as->name);
1915 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
1916 }
1917
1918 mon_printf(f, "aliases\n");
1919 /* print aliased regions */
1920 QTAILQ_FOREACH(ml, &ml_head, queue) {
1921 if (!ml->printed) {
1922 mon_printf(f, "%s\n", ml->mr->name);
1923 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1924 }
1925 }
1926
1927 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1928 g_free(ml);
1929 }
1930 }
AR7 emulation for QEMU