hw/display/virtio-gpu-base.c

   1 /*
   2  * Virtio GPU Device
   3  *
   4  * Copyright Red Hat, Inc. 2013-2014
   5  *
   6  * Authors:
   7  *     Dave Airlie <airlied@redhat.com>
   8  *     Gerd Hoffmann <kraxel@redhat.com>
   9  *
  10  * This work is licensed under the terms of the GNU GPL, version 2 or later.
  11  * See the COPYING file in the top-level directory.
  12  */
  13
  14 #include "qemu/osdep.h"
  15
  16 #include "hw/virtio/virtio-gpu.h"
  17 #include "migration/blocker.h"
  18 #include "qapi/error.h"
  19 #include "qemu/error-report.h"
  20 #include "trace.h"
  21
  22 void
  23 virtio_gpu_base_reset(VirtIOGPUBase *g)
  24 {
  25     int i;
  26
  27     g->enable = 0;
  28     g->use_virgl_renderer = false;
  29
  30     for (i = 0; i < g->conf.max_outputs; i++) {
  31         g->scanout[i].resource_id = 0;
  32         g->scanout[i].width = 0;
  33         g->scanout[i].height = 0;
  34         g->scanout[i].x = 0;
  35         g->scanout[i].y = 0;
  36         g->scanout[i].ds = NULL;
  37     }
  38 }
  39
  40 void
  41 virtio_gpu_base_fill_display_info(VirtIOGPUBase *g,
  42                                   struct virtio_gpu_resp_display_info *dpy_info)
  43 {
  44     int i;
  45
  46     for (i = 0; i < g->conf.max_outputs; i++) {
  47         if (g->enabled_output_bitmask & (1 << i)) {
  48             dpy_info->pmodes[i].enabled = 1;
  49             dpy_info->pmodes[i].r.width = cpu_to_le32(g->req_state[i].width);
  50             dpy_info->pmodes[i].r.height = cpu_to_le32(g->req_state[i].height);
  51         }
  52     }
  53 }
  54
  55 static void virtio_gpu_invalidate_display(void *opaque)
  56 {
  57 }
  58
  59 static void virtio_gpu_update_display(void *opaque)
  60 {
  61 }
  62
  63 static void virtio_gpu_text_update(void *opaque, console_ch_t *chardata)
  64 {
  65 }
  66
  67 static void virtio_gpu_notify_event(VirtIOGPUBase *g, uint32_t event_type)
  68 {
  69     g->virtio_config.events_read |= event_type;
  70     virtio_notify_config(&g->parent_obj);
  71 }
  72
  73 static int virtio_gpu_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info)
  74 {
  75     VirtIOGPUBase *g = opaque;
  76
  77     if (idx >= g->conf.max_outputs) {
  78         return -1;
  79     }
  80
  81     g->req_state[idx].x = info->xoff;
  82     g->req_state[idx].y = info->yoff;
  83     g->req_state[idx].width = info->width;
  84     g->req_state[idx].height = info->height;
  85     g->req_state[idx].width_mm = info->width_mm;
  86     g->req_state[idx].height_mm = info->height_mm;
  87
  88     if (info->width && info->height) {
  89         g->enabled_output_bitmask |= (1 << idx);
  90     } else {
  91         g->enabled_output_bitmask &= ~(1 << idx);
  92     }
  93
  94     /* send event to guest */
  95     virtio_gpu_notify_event(g, VIRTIO_GPU_EVENT_DISPLAY);
  96     return 0;
  97 }
  98
  99 static void
 100 virtio_gpu_gl_flushed(void *opaque)
 101 {
 102     VirtIOGPUBase *g = opaque;
 103     VirtIOGPUBaseClass *vgc = VIRTIO_GPU_BASE_GET_CLASS(g);
 104
 105     if (vgc->gl_flushed) {
 106         vgc->gl_flushed(g);
 107     }
 108 }
 109
 110 static void
 111 virtio_gpu_gl_block(void *opaque, bool block)
 112 {
 113     VirtIOGPUBase *g = opaque;
 114
 115     if (block) {
 116         g->renderer_blocked++;
 117     } else {
 118         g->renderer_blocked--;
 119     }
 120     assert(g->renderer_blocked >= 0);
 121 }
 122
 123 static int
 124 virtio_gpu_get_flags(void *opaque)
 125 {
 126     VirtIOGPUBase *g = opaque;
 127     int flags = GRAPHIC_FLAGS_NONE;
 128
 129     if (virtio_gpu_virgl_enabled(g->conf)) {
 130         flags |= GRAPHIC_FLAGS_GL;
 131     }
 132
 133     if (virtio_gpu_dmabuf_enabled(g->conf)) {
 134         flags |= GRAPHIC_FLAGS_DMABUF;
 135     }
 136
 137     return flags;
 138 }
 139
 140 static const GraphicHwOps virtio_gpu_ops = {
 141     .get_flags = virtio_gpu_get_flags,
 142     .invalidate = virtio_gpu_invalidate_display,
 143     .gfx_update = virtio_gpu_update_display,
 144     .text_update = virtio_gpu_text_update,
 145     .ui_info = virtio_gpu_ui_info,
 146     .gl_block = virtio_gpu_gl_block,
 147     .gl_flushed = virtio_gpu_gl_flushed,
 148 };
 149
 150 bool
 151 virtio_gpu_base_device_realize(DeviceState *qdev,
 152                                VirtIOHandleOutput ctrl_cb,
 153                                VirtIOHandleOutput cursor_cb,
 154                                Error **errp)
 155 {
 156     VirtIODevice *vdev = VIRTIO_DEVICE(qdev);
 157     VirtIOGPUBase *g = VIRTIO_GPU_BASE(qdev);
 158     int i;
 159
 160     if (g->conf.max_outputs > VIRTIO_GPU_MAX_SCANOUTS) {
 161         error_setg(errp, "invalid max_outputs > %d", VIRTIO_GPU_MAX_SCANOUTS);
 162         return false;
 163     }
 164
 165     g->use_virgl_renderer = false;
 166     if (virtio_gpu_virgl_enabled(g->conf)) {
 167         error_setg(&g->migration_blocker, "virgl is not yet migratable");
 168         if (migrate_add_blocker(g->migration_blocker, errp) < 0) {
 169             error_free(g->migration_blocker);
 170             return false;
 171         }
 172     }
 173
 174     g->virtio_config.num_scanouts = cpu_to_le32(g->conf.max_outputs);
 175     virtio_init(VIRTIO_DEVICE(g), "virtio-gpu", VIRTIO_ID_GPU,
 176                 sizeof(struct virtio_gpu_config));
 177
 178     if (virtio_gpu_virgl_enabled(g->conf)) {
 179         /* use larger control queue in 3d mode */
 180         virtio_add_queue(vdev, 256, ctrl_cb);
 181         virtio_add_queue(vdev, 16, cursor_cb);
 182     } else {
 183         virtio_add_queue(vdev, 64, ctrl_cb);
 184         virtio_add_queue(vdev, 16, cursor_cb);
 185     }
 186
 187     g->enabled_output_bitmask = 1;
 188
 189     g->req_state[0].width = g->conf.xres;
 190     g->req_state[0].height = g->conf.yres;
 191
 192     g->hw_ops = &virtio_gpu_ops;
 193     for (i = 0; i < g->conf.max_outputs; i++) {
 194         g->scanout[i].con =
 195             graphic_console_init(DEVICE(g), i, &virtio_gpu_ops, g);
 196     }
 197
 198     return true;
 199 }
 200
 201 static uint64_t
 202 virtio_gpu_base_get_features(VirtIODevice *vdev, uint64_t features,
 203                              Error **errp)
 204 {
 205     VirtIOGPUBase *g = VIRTIO_GPU_BASE(vdev);
 206
 207     if (virtio_gpu_virgl_enabled(g->conf)) {
 208         features |= (1 << VIRTIO_GPU_F_VIRGL);
 209     }
 210     if (virtio_gpu_edid_enabled(g->conf)) {
 211         features |= (1 << VIRTIO_GPU_F_EDID);
 212     }
 213
 214     return features;
 215 }
 216
 217 static void
 218 virtio_gpu_base_set_features(VirtIODevice *vdev, uint64_t features)
 219 {
 220     static const uint32_t virgl = (1 << VIRTIO_GPU_F_VIRGL);
 221     VirtIOGPUBase *g = VIRTIO_GPU_BASE(vdev);
 222
 223     g->use_virgl_renderer = ((features & virgl) == virgl);
 224     trace_virtio_gpu_features(g->use_virgl_renderer);
 225 }
 226
 227 static void
 228 virtio_gpu_base_device_unrealize(DeviceState *qdev)
 229 {
 230     VirtIOGPUBase *g = VIRTIO_GPU_BASE(qdev);
 231
 232     if (g->migration_blocker) {
 233         migrate_del_blocker(g->migration_blocker);
 234         error_free(g->migration_blocker);
 235     }
 236 }
 237
 238 static void
 239 virtio_gpu_base_class_init(ObjectClass *klass, void *data)
 240 {
 241     DeviceClass *dc = DEVICE_CLASS(klass);
 242     VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass);
 243
 244     vdc->unrealize = virtio_gpu_base_device_unrealize;
 245     vdc->get_features = virtio_gpu_base_get_features;
 246     vdc->set_features = virtio_gpu_base_set_features;
 247
 248     set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
 249     dc->hotpluggable = false;
 250 }
 251
 252 static const TypeInfo virtio_gpu_base_info = {
 253     .name = TYPE_VIRTIO_GPU_BASE,
 254     .parent = TYPE_VIRTIO_DEVICE,
 255     .instance_size = sizeof(VirtIOGPUBase),
 256     .class_size = sizeof(VirtIOGPUBaseClass),
 257     .class_init = virtio_gpu_base_class_init,
 258     .abstract = true
 259 };
 260
 261 static void
 262 virtio_register_types(void)
 263 {
 264     type_register_static(&virtio_gpu_base_info);
 265 }
 266
 267 type_init(virtio_register_types)
 268
 269 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctrl_hdr)                != 24);
 270 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_update_cursor)           != 56);
 271 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_unref)          != 32);
 272 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_create_2d)      != 40);
 273 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_set_scanout)             != 48);
 274 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_flush)          != 48);
 275 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_transfer_to_host_2d)     != 56);
 276 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_mem_entry)               != 16);
 277 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_attach_backing) != 32);
 278 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_detach_backing) != 32);
 279 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_display_info)       != 408);
 280
 281 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_transfer_host_3d)        != 72);
 282 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_create_3d)      != 72);
 283 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_create)              != 96);
 284 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_destroy)             != 24);
 285 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_resource)            != 32);
 286 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_cmd_submit)              != 32);
 287 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_get_capset_info)         != 32);
 288 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_capset_info)        != 40);
 289 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_get_capset)              != 32);
 290 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_capset)             != 24);