2 * ARM implementation of KVM hooks
4 * Copyright Christoffer Dall 2009-2010
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
11 #include "qemu/osdep.h"
12 #include <sys/ioctl.h>
14 #include <linux/kvm.h>
16 #include "qemu-common.h"
17 #include "qemu/timer.h"
18 #include "qemu/error-report.h"
19 #include "qemu/main-loop.h"
20 #include "sysemu/sysemu.h"
21 #include "sysemu/kvm.h"
22 #include "sysemu/kvm_int.h"
26 #include "internals.h"
27 #include "hw/pci/pci.h"
28 #include "exec/memattrs.h"
29 #include "exec/address-spaces.h"
30 #include "hw/boards.h"
34 const KVMCapabilityInfo kvm_arch_required_capabilities
[] = {
38 static bool cap_has_mp_state
;
39 static bool cap_has_inject_serror_esr
;
41 static ARMHostCPUFeatures arm_host_cpu_features
;
43 int kvm_arm_vcpu_init(CPUState
*cs
)
45 ARMCPU
*cpu
= ARM_CPU(cs
);
46 struct kvm_vcpu_init init
;
48 init
.target
= cpu
->kvm_target
;
49 memcpy(init
.features
, cpu
->kvm_init_features
, sizeof(init
.features
));
51 return kvm_vcpu_ioctl(cs
, KVM_ARM_VCPU_INIT
, &init
);
54 int kvm_arm_vcpu_finalize(CPUState
*cs
, int feature
)
56 return kvm_vcpu_ioctl(cs
, KVM_ARM_VCPU_FINALIZE
, &feature
);
59 void kvm_arm_init_serror_injection(CPUState
*cs
)
61 cap_has_inject_serror_esr
= kvm_check_extension(cs
->kvm_state
,
62 KVM_CAP_ARM_INJECT_SERROR_ESR
);
65 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try
,
67 struct kvm_vcpu_init
*init
)
69 int ret
= 0, kvmfd
= -1, vmfd
= -1, cpufd
= -1;
71 kvmfd
= qemu_open("/dev/kvm", O_RDWR
);
75 vmfd
= ioctl(kvmfd
, KVM_CREATE_VM
, 0);
79 cpufd
= ioctl(vmfd
, KVM_CREATE_VCPU
, 0);
85 /* Caller doesn't want the VCPU to be initialized, so skip it */
89 if (init
->target
== -1) {
90 struct kvm_vcpu_init preferred
;
92 ret
= ioctl(vmfd
, KVM_ARM_PREFERRED_TARGET
, &preferred
);
94 init
->target
= preferred
.target
;
98 ret
= ioctl(cpufd
, KVM_ARM_VCPU_INIT
, init
);
102 } else if (cpus_to_try
) {
103 /* Old kernel which doesn't know about the
104 * PREFERRED_TARGET ioctl: we know it will only support
105 * creating one kind of guest CPU which is its preferred
108 struct kvm_vcpu_init
try;
110 while (*cpus_to_try
!= QEMU_KVM_ARM_TARGET_NONE
) {
111 try.target
= *cpus_to_try
++;
112 memcpy(try.features
, init
->features
, sizeof(init
->features
));
113 ret
= ioctl(cpufd
, KVM_ARM_VCPU_INIT
, &try);
121 init
->target
= try.target
;
123 /* Treat a NULL cpus_to_try argument the same as an empty
124 * list, which means we will fail the call since this must
125 * be an old kernel which doesn't support PREFERRED_TARGET.
151 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray
)
155 for (i
= 2; i
>= 0; i
--) {
160 void kvm_arm_set_cpu_features_from_host(ARMCPU
*cpu
)
162 CPUARMState
*env
= &cpu
->env
;
164 if (!arm_host_cpu_features
.dtb_compatible
) {
165 if (!kvm_enabled() ||
166 !kvm_arm_get_host_cpu_features(&arm_host_cpu_features
)) {
167 /* We can't report this error yet, so flag that we need to
168 * in arm_cpu_realizefn().
170 cpu
->kvm_target
= QEMU_KVM_ARM_TARGET_NONE
;
171 cpu
->host_cpu_probe_failed
= true;
176 cpu
->kvm_target
= arm_host_cpu_features
.target
;
177 cpu
->dtb_compatible
= arm_host_cpu_features
.dtb_compatible
;
178 cpu
->isar
= arm_host_cpu_features
.isar
;
179 env
->features
= arm_host_cpu_features
.features
;
182 bool kvm_arm_pmu_supported(CPUState
*cpu
)
184 KVMState
*s
= KVM_STATE(current_machine
->accelerator
);
186 return kvm_check_extension(s
, KVM_CAP_ARM_PMU_V3
);
189 int kvm_arm_get_max_vm_ipa_size(MachineState
*ms
)
191 KVMState
*s
= KVM_STATE(ms
->accelerator
);
194 ret
= kvm_check_extension(s
, KVM_CAP_ARM_VM_IPA_SIZE
);
195 return ret
> 0 ? ret
: 40;
198 int kvm_arch_init(MachineState
*ms
, KVMState
*s
)
201 /* For ARM interrupt delivery is always asynchronous,
202 * whether we are using an in-kernel VGIC or not.
204 kvm_async_interrupts_allowed
= true;
207 * PSCI wakes up secondary cores, so we always need to
208 * have vCPUs waiting in kernel space
210 kvm_halt_in_kernel_allowed
= true;
212 cap_has_mp_state
= kvm_check_extension(s
, KVM_CAP_MP_STATE
);
214 if (ms
->smp
.cpus
> 256 &&
215 !kvm_check_extension(s
, KVM_CAP_ARM_IRQ_LINE_LAYOUT_2
)) {
216 error_report("Using more than 256 vcpus requires a host kernel "
217 "with KVM_CAP_ARM_IRQ_LINE_LAYOUT_2");
224 unsigned long kvm_arch_vcpu_id(CPUState
*cpu
)
226 return cpu
->cpu_index
;
229 /* We track all the KVM devices which need their memory addresses
230 * passing to the kernel in a list of these structures.
231 * When board init is complete we run through the list and
232 * tell the kernel the base addresses of the memory regions.
233 * We use a MemoryListener to track mapping and unmapping of
234 * the regions during board creation, so the board models don't
235 * need to do anything special for the KVM case.
237 * Sometimes the address must be OR'ed with some other fields
238 * (for example for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION).
239 * @kda_addr_ormask aims at storing the value of those fields.
241 typedef struct KVMDevice
{
242 struct kvm_arm_device_addr kda
;
243 struct kvm_device_attr kdattr
;
244 uint64_t kda_addr_ormask
;
246 QSLIST_ENTRY(KVMDevice
) entries
;
250 static QSLIST_HEAD(, KVMDevice
) kvm_devices_head
;
252 static void kvm_arm_devlistener_add(MemoryListener
*listener
,
253 MemoryRegionSection
*section
)
257 QSLIST_FOREACH(kd
, &kvm_devices_head
, entries
) {
258 if (section
->mr
== kd
->mr
) {
259 kd
->kda
.addr
= section
->offset_within_address_space
;
264 static void kvm_arm_devlistener_del(MemoryListener
*listener
,
265 MemoryRegionSection
*section
)
269 QSLIST_FOREACH(kd
, &kvm_devices_head
, entries
) {
270 if (section
->mr
== kd
->mr
) {
276 static MemoryListener devlistener
= {
277 .region_add
= kvm_arm_devlistener_add
,
278 .region_del
= kvm_arm_devlistener_del
,
281 static void kvm_arm_set_device_addr(KVMDevice
*kd
)
283 struct kvm_device_attr
*attr
= &kd
->kdattr
;
286 /* If the device control API is available and we have a device fd on the
287 * KVMDevice struct, let's use the newer API
289 if (kd
->dev_fd
>= 0) {
290 uint64_t addr
= kd
->kda
.addr
;
292 addr
|= kd
->kda_addr_ormask
;
293 attr
->addr
= (uintptr_t)&addr
;
294 ret
= kvm_device_ioctl(kd
->dev_fd
, KVM_SET_DEVICE_ATTR
, attr
);
296 ret
= kvm_vm_ioctl(kvm_state
, KVM_ARM_SET_DEVICE_ADDR
, &kd
->kda
);
300 fprintf(stderr
, "Failed to set device address: %s\n",
306 static void kvm_arm_machine_init_done(Notifier
*notifier
, void *data
)
310 QSLIST_FOREACH_SAFE(kd
, &kvm_devices_head
, entries
, tkd
) {
311 if (kd
->kda
.addr
!= -1) {
312 kvm_arm_set_device_addr(kd
);
314 memory_region_unref(kd
->mr
);
315 QSLIST_REMOVE_HEAD(&kvm_devices_head
, entries
);
318 memory_listener_unregister(&devlistener
);
321 static Notifier notify
= {
322 .notify
= kvm_arm_machine_init_done
,
325 void kvm_arm_register_device(MemoryRegion
*mr
, uint64_t devid
, uint64_t group
,
326 uint64_t attr
, int dev_fd
, uint64_t addr_ormask
)
330 if (!kvm_irqchip_in_kernel()) {
334 if (QSLIST_EMPTY(&kvm_devices_head
)) {
335 memory_listener_register(&devlistener
, &address_space_memory
);
336 qemu_add_machine_init_done_notifier(¬ify
);
338 kd
= g_new0(KVMDevice
, 1);
342 kd
->kdattr
.flags
= 0;
343 kd
->kdattr
.group
= group
;
344 kd
->kdattr
.attr
= attr
;
346 kd
->kda_addr_ormask
= addr_ormask
;
347 QSLIST_INSERT_HEAD(&kvm_devices_head
, kd
, entries
);
348 memory_region_ref(kd
->mr
);
351 static int compare_u64(const void *a
, const void *b
)
353 if (*(uint64_t *)a
> *(uint64_t *)b
) {
356 if (*(uint64_t *)a
< *(uint64_t *)b
) {
362 /* Initialize the ARMCPU cpreg list according to the kernel's
363 * definition of what CPU registers it knows about (and throw away
364 * the previous TCG-created cpreg list).
366 int kvm_arm_init_cpreg_list(ARMCPU
*cpu
)
368 struct kvm_reg_list rl
;
369 struct kvm_reg_list
*rlp
;
370 int i
, ret
, arraylen
;
371 CPUState
*cs
= CPU(cpu
);
374 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_REG_LIST
, &rl
);
378 rlp
= g_malloc(sizeof(struct kvm_reg_list
) + rl
.n
* sizeof(uint64_t));
380 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_REG_LIST
, rlp
);
384 /* Sort the list we get back from the kernel, since cpreg_tuples
385 * must be in strictly ascending order.
387 qsort(&rlp
->reg
, rlp
->n
, sizeof(rlp
->reg
[0]), compare_u64
);
389 for (i
= 0, arraylen
= 0; i
< rlp
->n
; i
++) {
390 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp
->reg
[i
])) {
393 switch (rlp
->reg
[i
] & KVM_REG_SIZE_MASK
) {
394 case KVM_REG_SIZE_U32
:
395 case KVM_REG_SIZE_U64
:
398 fprintf(stderr
, "Can't handle size of register in kernel list\n");
406 cpu
->cpreg_indexes
= g_renew(uint64_t, cpu
->cpreg_indexes
, arraylen
);
407 cpu
->cpreg_values
= g_renew(uint64_t, cpu
->cpreg_values
, arraylen
);
408 cpu
->cpreg_vmstate_indexes
= g_renew(uint64_t, cpu
->cpreg_vmstate_indexes
,
410 cpu
->cpreg_vmstate_values
= g_renew(uint64_t, cpu
->cpreg_vmstate_values
,
412 cpu
->cpreg_array_len
= arraylen
;
413 cpu
->cpreg_vmstate_array_len
= arraylen
;
415 for (i
= 0, arraylen
= 0; i
< rlp
->n
; i
++) {
416 uint64_t regidx
= rlp
->reg
[i
];
417 if (!kvm_arm_reg_syncs_via_cpreg_list(regidx
)) {
420 cpu
->cpreg_indexes
[arraylen
] = regidx
;
423 assert(cpu
->cpreg_array_len
== arraylen
);
425 if (!write_kvmstate_to_list(cpu
)) {
426 /* Shouldn't happen unless kernel is inconsistent about
427 * what registers exist.
429 fprintf(stderr
, "Initial read of kernel register state failed\n");
439 bool write_kvmstate_to_list(ARMCPU
*cpu
)
441 CPUState
*cs
= CPU(cpu
);
445 for (i
= 0; i
< cpu
->cpreg_array_len
; i
++) {
446 struct kvm_one_reg r
;
447 uint64_t regidx
= cpu
->cpreg_indexes
[i
];
453 switch (regidx
& KVM_REG_SIZE_MASK
) {
454 case KVM_REG_SIZE_U32
:
455 r
.addr
= (uintptr_t)&v32
;
456 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, &r
);
458 cpu
->cpreg_values
[i
] = v32
;
461 case KVM_REG_SIZE_U64
:
462 r
.addr
= (uintptr_t)(cpu
->cpreg_values
+ i
);
463 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, &r
);
475 bool write_list_to_kvmstate(ARMCPU
*cpu
, int level
)
477 CPUState
*cs
= CPU(cpu
);
481 for (i
= 0; i
< cpu
->cpreg_array_len
; i
++) {
482 struct kvm_one_reg r
;
483 uint64_t regidx
= cpu
->cpreg_indexes
[i
];
487 if (kvm_arm_cpreg_level(regidx
) > level
) {
492 switch (regidx
& KVM_REG_SIZE_MASK
) {
493 case KVM_REG_SIZE_U32
:
494 v32
= cpu
->cpreg_values
[i
];
495 r
.addr
= (uintptr_t)&v32
;
497 case KVM_REG_SIZE_U64
:
498 r
.addr
= (uintptr_t)(cpu
->cpreg_values
+ i
);
503 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, &r
);
505 /* We might fail for "unknown register" and also for
506 * "you tried to set a register which is constant with
507 * a different value from what it actually contains".
515 void kvm_arm_reset_vcpu(ARMCPU
*cpu
)
519 /* Re-init VCPU so that all registers are set to
520 * their respective reset values.
522 ret
= kvm_arm_vcpu_init(CPU(cpu
));
524 fprintf(stderr
, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret
));
527 if (!write_kvmstate_to_list(cpu
)) {
528 fprintf(stderr
, "write_kvmstate_to_list failed\n");
532 * Sync the reset values also into the CPUState. This is necessary
533 * because the next thing we do will be a kvm_arch_put_registers()
534 * which will update the list values from the CPUState before copying
535 * the list values back to KVM. It's OK to ignore failure returns here
536 * for the same reason we do so in kvm_arch_get_registers().
538 write_list_to_cpustate(cpu
);
542 * Update KVM's MP_STATE based on what QEMU thinks it is
544 int kvm_arm_sync_mpstate_to_kvm(ARMCPU
*cpu
)
546 if (cap_has_mp_state
) {
547 struct kvm_mp_state mp_state
= {
548 .mp_state
= (cpu
->power_state
== PSCI_OFF
) ?
549 KVM_MP_STATE_STOPPED
: KVM_MP_STATE_RUNNABLE
551 int ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_SET_MP_STATE
, &mp_state
);
553 fprintf(stderr
, "%s: failed to set MP_STATE %d/%s\n",
554 __func__
, ret
, strerror(-ret
));
563 * Sync the KVM MP_STATE into QEMU
565 int kvm_arm_sync_mpstate_to_qemu(ARMCPU
*cpu
)
567 if (cap_has_mp_state
) {
568 struct kvm_mp_state mp_state
;
569 int ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_GET_MP_STATE
, &mp_state
);
571 fprintf(stderr
, "%s: failed to get MP_STATE %d/%s\n",
572 __func__
, ret
, strerror(-ret
));
575 cpu
->power_state
= (mp_state
.mp_state
== KVM_MP_STATE_STOPPED
) ?
582 int kvm_put_vcpu_events(ARMCPU
*cpu
)
584 CPUARMState
*env
= &cpu
->env
;
585 struct kvm_vcpu_events events
;
588 if (!kvm_has_vcpu_events()) {
592 memset(&events
, 0, sizeof(events
));
593 events
.exception
.serror_pending
= env
->serror
.pending
;
595 /* Inject SError to guest with specified syndrome if host kernel
596 * supports it, otherwise inject SError without syndrome.
598 if (cap_has_inject_serror_esr
) {
599 events
.exception
.serror_has_esr
= env
->serror
.has_esr
;
600 events
.exception
.serror_esr
= env
->serror
.esr
;
603 ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_SET_VCPU_EVENTS
, &events
);
605 error_report("failed to put vcpu events");
611 int kvm_get_vcpu_events(ARMCPU
*cpu
)
613 CPUARMState
*env
= &cpu
->env
;
614 struct kvm_vcpu_events events
;
617 if (!kvm_has_vcpu_events()) {
621 memset(&events
, 0, sizeof(events
));
622 ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_GET_VCPU_EVENTS
, &events
);
624 error_report("failed to get vcpu events");
628 env
->serror
.pending
= events
.exception
.serror_pending
;
629 env
->serror
.has_esr
= events
.exception
.serror_has_esr
;
630 env
->serror
.esr
= events
.exception
.serror_esr
;
635 void kvm_arch_pre_run(CPUState
*cs
, struct kvm_run
*run
)
639 MemTxAttrs
kvm_arch_post_run(CPUState
*cs
, struct kvm_run
*run
)
642 uint32_t switched_level
;
644 if (kvm_irqchip_in_kernel()) {
646 * We only need to sync timer states with user-space interrupt
647 * controllers, so return early and save cycles if we don't.
649 return MEMTXATTRS_UNSPECIFIED
;
654 /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */
655 if (run
->s
.regs
.device_irq_level
!= cpu
->device_irq_level
) {
656 switched_level
= cpu
->device_irq_level
^ run
->s
.regs
.device_irq_level
;
658 qemu_mutex_lock_iothread();
660 if (switched_level
& KVM_ARM_DEV_EL1_VTIMER
) {
661 qemu_set_irq(cpu
->gt_timer_outputs
[GTIMER_VIRT
],
662 !!(run
->s
.regs
.device_irq_level
&
663 KVM_ARM_DEV_EL1_VTIMER
));
664 switched_level
&= ~KVM_ARM_DEV_EL1_VTIMER
;
667 if (switched_level
& KVM_ARM_DEV_EL1_PTIMER
) {
668 qemu_set_irq(cpu
->gt_timer_outputs
[GTIMER_PHYS
],
669 !!(run
->s
.regs
.device_irq_level
&
670 KVM_ARM_DEV_EL1_PTIMER
));
671 switched_level
&= ~KVM_ARM_DEV_EL1_PTIMER
;
674 if (switched_level
& KVM_ARM_DEV_PMU
) {
675 qemu_set_irq(cpu
->pmu_interrupt
,
676 !!(run
->s
.regs
.device_irq_level
& KVM_ARM_DEV_PMU
));
677 switched_level
&= ~KVM_ARM_DEV_PMU
;
680 if (switched_level
) {
681 qemu_log_mask(LOG_UNIMP
, "%s: unhandled in-kernel device IRQ %x\n",
682 __func__
, switched_level
);
685 /* We also mark unknown levels as processed to not waste cycles */
686 cpu
->device_irq_level
= run
->s
.regs
.device_irq_level
;
687 qemu_mutex_unlock_iothread();
690 return MEMTXATTRS_UNSPECIFIED
;
694 int kvm_arch_handle_exit(CPUState
*cs
, struct kvm_run
*run
)
698 switch (run
->exit_reason
) {
700 if (kvm_arm_handle_debug(cs
, &run
->debug
.arch
)) {
702 } /* otherwise return to guest */
705 qemu_log_mask(LOG_UNIMP
, "%s: un-handled exit reason %d\n",
706 __func__
, run
->exit_reason
);
712 bool kvm_arch_stop_on_emulation_error(CPUState
*cs
)
717 int kvm_arch_process_async_events(CPUState
*cs
)
722 /* The #ifdef protections are until 32bit headers are imported and can
723 * be removed once both 32 and 64 bit reach feature parity.
725 void kvm_arch_update_guest_debug(CPUState
*cs
, struct kvm_guest_debug
*dbg
)
727 #ifdef KVM_GUESTDBG_USE_SW_BP
728 if (kvm_sw_breakpoints_active(cs
)) {
729 dbg
->control
|= KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_SW_BP
;
732 #ifdef KVM_GUESTDBG_USE_HW
733 if (kvm_arm_hw_debug_active(cs
)) {
734 dbg
->control
|= KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_HW
;
735 kvm_arm_copy_hw_debug_data(&dbg
->arch
);
740 void kvm_arch_init_irq_routing(KVMState
*s
)
744 int kvm_arch_irqchip_create(MachineState
*ms
, KVMState
*s
)
746 if (machine_kernel_irqchip_split(ms
)) {
747 perror("-machine kernel_irqchip=split is not supported on ARM.");
751 /* If we can create the VGIC using the newer device control API, we
752 * let the device do this when it initializes itself, otherwise we
753 * fall back to the old API */
754 return kvm_check_extension(s
, KVM_CAP_DEVICE_CTRL
);
757 int kvm_arm_vgic_probe(void)
759 if (kvm_create_device(kvm_state
,
760 KVM_DEV_TYPE_ARM_VGIC_V3
, true) == 0) {
762 } else if (kvm_create_device(kvm_state
,
763 KVM_DEV_TYPE_ARM_VGIC_V2
, true) == 0) {
770 int kvm_arm_set_irq(int cpu
, int irqtype
, int irq
, int level
)
772 int kvm_irq
= (irqtype
<< KVM_ARM_IRQ_TYPE_SHIFT
) | irq
;
773 int cpu_idx1
= cpu
% 256;
774 int cpu_idx2
= cpu
/ 256;
776 kvm_irq
|= (cpu_idx1
<< KVM_ARM_IRQ_VCPU_SHIFT
) |
777 (cpu_idx2
<< KVM_ARM_IRQ_VCPU2_SHIFT
);
779 return kvm_set_irq(kvm_state
, kvm_irq
, !!level
);
782 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry
*route
,
783 uint64_t address
, uint32_t data
, PCIDevice
*dev
)
785 AddressSpace
*as
= pci_device_iommu_address_space(dev
);
786 hwaddr xlat
, len
, doorbell_gpa
;
787 MemoryRegionSection mrs
;
791 if (as
== &address_space_memory
) {
795 /* MSI doorbell address is translated by an IOMMU */
798 mr
= address_space_translate(as
, address
, &xlat
, &len
, true,
799 MEMTXATTRS_UNSPECIFIED
);
803 mrs
= memory_region_find(mr
, xlat
, 1);
808 doorbell_gpa
= mrs
.offset_within_address_space
;
809 memory_region_unref(mrs
.mr
);
811 route
->u
.msi
.address_lo
= doorbell_gpa
;
812 route
->u
.msi
.address_hi
= doorbell_gpa
>> 32;
814 trace_kvm_arm_fixup_msi_route(address
, doorbell_gpa
);
823 int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry
*route
,
824 int vector
, PCIDevice
*dev
)
829 int kvm_arch_release_virq_post(int virq
)
834 int kvm_arch_msi_data_to_gsi(uint32_t data
)
836 return (data
- 32) & 0xffff;