include/hw/arm/armv7m.h

   1 /*
   2  * ARMv7M CPU object
   3  *
   4  * Copyright (c) 2017 Linaro Ltd
   5  * Written by Peter Maydell <peter.maydell@linaro.org>
   6  *
   7  * This code is licensed under the GPL version 2 or later.
   8  */
   9
  10 #ifndef HW_ARM_ARMV7M_H
  11 #define HW_ARM_ARMV7M_H
  12
  13 #include "hw/sysbus.h"
  14 #include "hw/intc/armv7m_nvic.h"
  15 #include "hw/misc/armv7m_ras.h"
  16 #include "target/arm/idau.h"
  17 #include "qom/object.h"
  18 #include "hw/clock.h"
  19
  20 #define TYPE_BITBAND "ARM-bitband-memory"
  21 OBJECT_DECLARE_SIMPLE_TYPE(BitBandState, BITBAND)
  22
  23 struct BitBandState {
  24     /*< private >*/
  25     SysBusDevice parent_obj;
  26     /*< public >*/
  27
  28     AddressSpace source_as;
  29     MemoryRegion iomem;
  30     uint32_t base;
  31     MemoryRegion *source_memory;
  32 };
  33
  34 #define TYPE_ARMV7M "armv7m"
  35 OBJECT_DECLARE_SIMPLE_TYPE(ARMv7MState, ARMV7M)
  36
  37 #define ARMV7M_NUM_BITBANDS 2
  38
  39 /* ARMv7M container object.
  40  * + Unnamed GPIO input lines: external IRQ lines for the NVIC
  41  * + Named GPIO output SYSRESETREQ: signalled for guest AIRCR.SYSRESETREQ.
  42  *   If this GPIO is not wired up then the NVIC will default to performing
  43  *   a qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET).
  44  * + Property "cpu-type": CPU type to instantiate
  45  * + Property "num-irq": number of external IRQ lines
  46  * + Property "num-prio-bits": number of priority bits in the NVIC
  47  * + Property "memory": MemoryRegion defining the physical address space
  48  *   that CPU accesses see. (The NVIC, bitbanding and other CPU-internal
  49  *   devices will be automatically layered on top of this view.)
  50  * + Property "idau": IDAU interface (forwarded to CPU object)
  51  * + Property "init-svtor": secure VTOR reset value (forwarded to CPU object)
  52  * + Property "init-nsvtor": non-secure VTOR reset value (forwarded to CPU object)
  53  * + Property "vfp": enable VFP (forwarded to CPU object)
  54  * + Property "dsp": enable DSP (forwarded to CPU object)
  55  * + Property "enable-bitband": expose bitbanded IO
  56  * + Property "mpu-ns-regions": number of Non-Secure MPU regions (forwarded
  57  *   to CPU object pmsav7-dregion property; default is whatever the default
  58  *   for the CPU is)
  59  * + Property "mpu-s-regions": number of Secure MPU regions (default is
  60  *   whatever the default for the CPU is; must currently be set to the same
  61  *   value as mpu-ns-regions if the CPU implements the Security Extension)
  62  * + Clock input "refclk" is the external reference clock for the systick timers
  63  * + Clock input "cpuclk" is the main CPU clock
  64  */
  65 struct ARMv7MState {
  66     /*< private >*/
  67     SysBusDevice parent_obj;
  68     /*< public >*/
  69     NVICState nvic;
  70     BitBandState bitband[ARMV7M_NUM_BITBANDS];
  71     ARMCPU *cpu;
  72     ARMv7MRAS ras;
  73     SysTickState systick[M_REG_NUM_BANKS];
  74
  75     /* MemoryRegion we pass to the CPU, with our devices layered on
  76      * top of the ones the board provides in board_memory.
  77      */
  78     MemoryRegion container;
  79     /*
  80      * MemoryRegion which passes the transaction to either the S or the
  81      * NS systick device depending on the transaction attributes
  82      */
  83     MemoryRegion systickmem;
  84     /*
  85      * MemoryRegion which enforces the S/NS handling of the systick
  86      * device NS alias region and passes the transaction to the
  87      * NS systick device if appropriate.
  88      */
  89     MemoryRegion systick_ns_mem;
  90     /* Ditto, for the sysregs region provided by the NVIC */
  91     MemoryRegion sysreg_ns_mem;
  92     /* MR providing default PPB behaviour */
  93     MemoryRegion defaultmem;
  94
  95     Clock *refclk;
  96     Clock *cpuclk;
  97
  98     /* Properties */
  99     char *cpu_type;
 100     /* MemoryRegion the board provides to us (with its devices, RAM, etc) */
 101     MemoryRegion *board_memory;
 102     Object *idau;
 103     uint32_t init_svtor;
 104     uint32_t init_nsvtor;
 105     uint32_t mpu_ns_regions;
 106     uint32_t mpu_s_regions;
 107     bool enable_bitband;
 108     bool start_powered_off;
 109     bool vfp;
 110     bool dsp;
 111 };
 112
 113 #endif