2 * tpm_tis.c - QEMU's TPM TIS interface emulator
4 * Copyright (C) 2006,2010-2013 IBM Corporation
7 * Stefan Berger <stefanb@us.ibm.com>
8 * David Safford <safford@us.ibm.com>
10 * Xen 4 support: Andrease Niederl <andreas.niederl@iaik.tugraz.at>
12 * This work is licensed under the terms of the GNU GPL, version 2 or later.
13 * See the COPYING file in the top-level directory.
15 * Implementation of the TIS interface according to specs found at
16 * http://www.trustedcomputinggroup.org. This implementation currently
17 * supports version 1.3, 21 March 2013
18 * In the developers menu choose the PC Client section then find the TIS
21 * TPM TIS for TPM 2 implementation following TCG PC Client Platform
22 * TPM Profile (PTP) Specification, Familiy 2.0, Revision 00.43
25 #include "qemu/osdep.h"
26 #include "hw/isa/isa.h"
27 #include "qapi/error.h"
28 #include "qemu/module.h"
30 #include "hw/acpi/tpm.h"
31 #include "hw/pci/pci_ids.h"
32 #include "sysemu/tpm_backend.h"
38 #define TPM_TIS_NUM_LOCALITIES 5 /* per spec */
39 #define TPM_TIS_LOCALITY_SHIFT 12
40 #define TPM_TIS_NO_LOCALITY 0xff
42 #define TPM_TIS_IS_VALID_LOCTY(x) ((x) < TPM_TIS_NUM_LOCALITIES)
44 #define TPM_TIS_BUFFER_MAX 4096
47 TPM_TIS_STATE_IDLE
= 0,
49 TPM_TIS_STATE_COMPLETION
,
50 TPM_TIS_STATE_EXECUTION
,
51 TPM_TIS_STATE_RECEPTION
,
54 /* locality data -- all fields are persisted */
55 typedef struct TPMLocality
{
64 typedef struct TPMState
{
68 unsigned char buffer
[TPM_TIS_BUFFER_MAX
];
72 uint8_t aborting_locty
;
75 TPMLocality loc
[TPM_TIS_NUM_LOCALITIES
];
82 TPMBackend
*be_driver
;
83 TPMVersion be_tpm_version
;
85 size_t be_buffer_size
;
91 #define TPM(obj) OBJECT_CHECK(TPMState, (obj), TYPE_TPM_TIS)
95 /* local prototypes */
97 static uint64_t tpm_tis_mmio_read(void *opaque
, hwaddr addr
,
100 /* utility functions */
102 static uint8_t tpm_tis_locality_from_addr(hwaddr addr
)
104 return (uint8_t)((addr
>> TPM_TIS_LOCALITY_SHIFT
) & 0x7);
107 static void tpm_tis_show_buffer(const unsigned char *buffer
,
108 size_t buffer_size
, const char *string
)
111 char *line_buffer
, *p
;
113 len
= MIN(tpm_cmd_get_size(buffer
), buffer_size
);
116 * allocate enough room for 3 chars per buffer entry plus a
117 * newline after every 16 chars and a final null terminator.
119 line_buffer
= g_malloc(len
* 3 + (len
/ 16) + 1);
121 for (i
= 0, p
= line_buffer
; i
< len
; i
++) {
122 if (i
&& !(i
% 16)) {
123 p
+= sprintf(p
, "\n");
125 p
+= sprintf(p
, "%.2X ", buffer
[i
]);
127 trace_tpm_tis_show_buffer(string
, len
, line_buffer
);
133 * Set the given flags in the STS register by clearing the register but
134 * preserving the SELFTEST_DONE and TPM_FAMILY_MASK flags and then setting
137 * The SELFTEST_DONE flag is acquired from the backend that determines it by
138 * peeking into TPM commands.
140 * A VM suspend/resume will preserve the flag by storing it into the VM
141 * device state, but the backend will not remember it when QEMU is started
142 * again. Therefore, we cache the flag here. Once set, it will not be unset
145 static void tpm_tis_sts_set(TPMLocality
*l
, uint32_t flags
)
147 l
->sts
&= TPM_TIS_STS_SELFTEST_DONE
| TPM_TIS_STS_TPM_FAMILY_MASK
;
152 * Send a request to the TPM.
154 static void tpm_tis_tpm_send(TPMState
*s
, uint8_t locty
)
156 if (trace_event_get_state_backends(TRACE_TPM_TIS_SHOW_BUFFER
)) {
157 tpm_tis_show_buffer(s
->buffer
, s
->be_buffer_size
, "To TPM");
161 * rw_offset serves as length indicator for length of data;
162 * it's reset when the response comes back
164 s
->loc
[locty
].state
= TPM_TIS_STATE_EXECUTION
;
166 s
->cmd
= (TPMBackendCmd
) {
169 .in_len
= s
->rw_offset
,
171 .out_len
= s
->be_buffer_size
,
174 tpm_backend_deliver_request(s
->be_driver
, &s
->cmd
);
177 /* raise an interrupt if allowed */
178 static void tpm_tis_raise_irq(TPMState
*s
, uint8_t locty
, uint32_t irqmask
)
180 if (!TPM_TIS_IS_VALID_LOCTY(locty
)) {
184 if ((s
->loc
[locty
].inte
& TPM_TIS_INT_ENABLED
) &&
185 (s
->loc
[locty
].inte
& irqmask
)) {
186 trace_tpm_tis_raise_irq(irqmask
);
187 qemu_irq_raise(s
->irq
);
188 s
->loc
[locty
].ints
|= irqmask
;
192 static uint32_t tpm_tis_check_request_use_except(TPMState
*s
, uint8_t locty
)
196 for (l
= 0; l
< TPM_TIS_NUM_LOCALITIES
; l
++) {
200 if ((s
->loc
[l
].access
& TPM_TIS_ACCESS_REQUEST_USE
)) {
208 static void tpm_tis_new_active_locality(TPMState
*s
, uint8_t new_active_locty
)
210 bool change
= (s
->active_locty
!= new_active_locty
);
214 if (change
&& TPM_TIS_IS_VALID_LOCTY(s
->active_locty
)) {
215 is_seize
= TPM_TIS_IS_VALID_LOCTY(new_active_locty
) &&
216 s
->loc
[new_active_locty
].access
& TPM_TIS_ACCESS_SEIZE
;
219 mask
= ~(TPM_TIS_ACCESS_ACTIVE_LOCALITY
);
221 mask
= ~(TPM_TIS_ACCESS_ACTIVE_LOCALITY
|
222 TPM_TIS_ACCESS_REQUEST_USE
);
224 /* reset flags on the old active locality */
225 s
->loc
[s
->active_locty
].access
&= mask
;
228 s
->loc
[s
->active_locty
].access
|= TPM_TIS_ACCESS_BEEN_SEIZED
;
232 s
->active_locty
= new_active_locty
;
234 trace_tpm_tis_new_active_locality(s
->active_locty
);
236 if (TPM_TIS_IS_VALID_LOCTY(new_active_locty
)) {
237 /* set flags on the new active locality */
238 s
->loc
[new_active_locty
].access
|= TPM_TIS_ACCESS_ACTIVE_LOCALITY
;
239 s
->loc
[new_active_locty
].access
&= ~(TPM_TIS_ACCESS_REQUEST_USE
|
240 TPM_TIS_ACCESS_SEIZE
);
244 tpm_tis_raise_irq(s
, s
->active_locty
, TPM_TIS_INT_LOCALITY_CHANGED
);
248 /* abort -- this function switches the locality */
249 static void tpm_tis_abort(TPMState
*s
)
253 trace_tpm_tis_abort(s
->next_locty
);
256 * Need to react differently depending on who's aborting now and
257 * which locality will become active afterwards.
259 if (s
->aborting_locty
== s
->next_locty
) {
260 s
->loc
[s
->aborting_locty
].state
= TPM_TIS_STATE_READY
;
261 tpm_tis_sts_set(&s
->loc
[s
->aborting_locty
],
262 TPM_TIS_STS_COMMAND_READY
);
263 tpm_tis_raise_irq(s
, s
->aborting_locty
, TPM_TIS_INT_COMMAND_READY
);
266 /* locality after abort is another one than the current one */
267 tpm_tis_new_active_locality(s
, s
->next_locty
);
269 s
->next_locty
= TPM_TIS_NO_LOCALITY
;
270 /* nobody's aborting a command anymore */
271 s
->aborting_locty
= TPM_TIS_NO_LOCALITY
;
274 /* prepare aborting current command */
275 static void tpm_tis_prep_abort(TPMState
*s
, uint8_t locty
, uint8_t newlocty
)
279 assert(TPM_TIS_IS_VALID_LOCTY(newlocty
));
281 s
->aborting_locty
= locty
; /* may also be TPM_TIS_NO_LOCALITY */
282 s
->next_locty
= newlocty
; /* locality after successful abort */
285 * only abort a command using an interrupt if currently executing
286 * a command AND if there's a valid connection to the vTPM.
288 for (busy_locty
= 0; busy_locty
< TPM_TIS_NUM_LOCALITIES
; busy_locty
++) {
289 if (s
->loc
[busy_locty
].state
== TPM_TIS_STATE_EXECUTION
) {
291 * request the backend to cancel. Some backends may not
294 tpm_backend_cancel_cmd(s
->be_driver
);
303 * Callback from the TPM to indicate that the response was received.
305 static void tpm_tis_request_completed(TPMIf
*ti
, int ret
)
307 TPMState
*s
= TPM(ti
);
308 uint8_t locty
= s
->cmd
.locty
;
311 assert(TPM_TIS_IS_VALID_LOCTY(locty
));
313 if (s
->cmd
.selftest_done
) {
314 for (l
= 0; l
< TPM_TIS_NUM_LOCALITIES
; l
++) {
315 s
->loc
[l
].sts
|= TPM_TIS_STS_SELFTEST_DONE
;
319 /* FIXME: report error if ret != 0 */
320 tpm_tis_sts_set(&s
->loc
[locty
],
321 TPM_TIS_STS_VALID
| TPM_TIS_STS_DATA_AVAILABLE
);
322 s
->loc
[locty
].state
= TPM_TIS_STATE_COMPLETION
;
325 if (trace_event_get_state_backends(TRACE_TPM_TIS_SHOW_BUFFER
)) {
326 tpm_tis_show_buffer(s
->buffer
, s
->be_buffer_size
, "From TPM");
329 if (TPM_TIS_IS_VALID_LOCTY(s
->next_locty
)) {
333 tpm_tis_raise_irq(s
, locty
,
334 TPM_TIS_INT_DATA_AVAILABLE
| TPM_TIS_INT_STS_VALID
);
338 * Read a byte of response data
340 static uint32_t tpm_tis_data_read(TPMState
*s
, uint8_t locty
)
342 uint32_t ret
= TPM_TIS_NO_DATA_BYTE
;
345 if ((s
->loc
[locty
].sts
& TPM_TIS_STS_DATA_AVAILABLE
)) {
346 len
= MIN(tpm_cmd_get_size(&s
->buffer
),
349 ret
= s
->buffer
[s
->rw_offset
++];
350 if (s
->rw_offset
>= len
) {
352 tpm_tis_sts_set(&s
->loc
[locty
], TPM_TIS_STS_VALID
);
353 tpm_tis_raise_irq(s
, locty
, TPM_TIS_INT_STS_VALID
);
355 trace_tpm_tis_data_read(ret
, s
->rw_offset
- 1);
362 static void tpm_tis_dump_state(void *opaque
, hwaddr addr
)
364 static const unsigned regs
[] = {
366 TPM_TIS_REG_INT_ENABLE
,
367 TPM_TIS_REG_INT_VECTOR
,
368 TPM_TIS_REG_INT_STATUS
,
369 TPM_TIS_REG_INTF_CAPABILITY
,
375 uint8_t locty
= tpm_tis_locality_from_addr(addr
);
376 hwaddr base
= addr
& ~0xfff;
377 TPMState
*s
= opaque
;
379 printf("tpm_tis: active locality : %d\n"
380 "tpm_tis: state of locality %d : %d\n"
381 "tpm_tis: register dump:\n",
383 locty
, s
->loc
[locty
].state
);
385 for (idx
= 0; regs
[idx
] != 0xfff; idx
++) {
386 printf("tpm_tis: 0x%04x : 0x%08x\n", regs
[idx
],
387 (int)tpm_tis_mmio_read(opaque
, base
+ regs
[idx
], 4));
390 printf("tpm_tis: r/w offset : %d\n"
391 "tpm_tis: result buffer : ",
394 idx
< MIN(tpm_cmd_get_size(&s
->buffer
), s
->be_buffer_size
);
397 s
->rw_offset
== idx
? '>' : ' ',
399 ((idx
& 0xf) == 0xf) ? "\ntpm_tis: " : "");
406 * Read a register of the TIS interface
407 * See specs pages 33-63 for description of the registers
409 static uint64_t tpm_tis_mmio_read(void *opaque
, hwaddr addr
,
412 TPMState
*s
= opaque
;
413 uint16_t offset
= addr
& 0xffc;
414 uint8_t shift
= (addr
& 0x3) * 8;
415 uint32_t val
= 0xffffffff;
416 uint8_t locty
= tpm_tis_locality_from_addr(addr
);
420 if (tpm_backend_had_startup_error(s
->be_driver
)) {
425 case TPM_TIS_REG_ACCESS
:
426 /* never show the SEIZE flag even though we use it internally */
427 val
= s
->loc
[locty
].access
& ~TPM_TIS_ACCESS_SEIZE
;
428 /* the pending flag is always calculated */
429 if (tpm_tis_check_request_use_except(s
, locty
)) {
430 val
|= TPM_TIS_ACCESS_PENDING_REQUEST
;
432 val
|= !tpm_backend_get_tpm_established_flag(s
->be_driver
);
434 case TPM_TIS_REG_INT_ENABLE
:
435 val
= s
->loc
[locty
].inte
;
437 case TPM_TIS_REG_INT_VECTOR
:
440 case TPM_TIS_REG_INT_STATUS
:
441 val
= s
->loc
[locty
].ints
;
443 case TPM_TIS_REG_INTF_CAPABILITY
:
444 switch (s
->be_tpm_version
) {
445 case TPM_VERSION_UNSPEC
:
448 case TPM_VERSION_1_2
:
449 val
= TPM_TIS_CAPABILITIES_SUPPORTED1_3
;
451 case TPM_VERSION_2_0
:
452 val
= TPM_TIS_CAPABILITIES_SUPPORTED2_0
;
456 case TPM_TIS_REG_STS
:
457 if (s
->active_locty
== locty
) {
458 if ((s
->loc
[locty
].sts
& TPM_TIS_STS_DATA_AVAILABLE
)) {
459 val
= TPM_TIS_BURST_COUNT(
460 MIN(tpm_cmd_get_size(&s
->buffer
),
462 - s
->rw_offset
) | s
->loc
[locty
].sts
;
464 avail
= s
->be_buffer_size
- s
->rw_offset
;
466 * byte-sized reads should not return 0x00 for 0x100
469 if (size
== 1 && avail
> 0xff) {
472 val
= TPM_TIS_BURST_COUNT(avail
) | s
->loc
[locty
].sts
;
476 case TPM_TIS_REG_DATA_FIFO
:
477 case TPM_TIS_REG_DATA_XFIFO
... TPM_TIS_REG_DATA_XFIFO_END
:
478 if (s
->active_locty
== locty
) {
479 if (size
> 4 - (addr
& 0x3)) {
480 /* prevent access beyond FIFO */
481 size
= 4 - (addr
& 0x3);
486 switch (s
->loc
[locty
].state
) {
487 case TPM_TIS_STATE_COMPLETION
:
488 v
= tpm_tis_data_read(s
, locty
);
491 v
= TPM_TIS_NO_DATA_BYTE
;
498 shift
= 0; /* no more adjustments */
501 case TPM_TIS_REG_INTERFACE_ID
:
502 val
= s
->loc
[locty
].iface_id
;
504 case TPM_TIS_REG_DID_VID
:
505 val
= (TPM_TIS_TPM_DID
<< 16) | TPM_TIS_TPM_VID
;
507 case TPM_TIS_REG_RID
:
508 val
= TPM_TIS_TPM_RID
;
511 case TPM_TIS_REG_DEBUG
:
512 tpm_tis_dump_state(opaque
, addr
);
521 trace_tpm_tis_mmio_read(size
, addr
, val
);
527 * Write a value to a register of the TIS interface
528 * See specs pages 33-63 for description of the registers
530 static void tpm_tis_mmio_write(void *opaque
, hwaddr addr
,
531 uint64_t val
, unsigned size
)
533 TPMState
*s
= opaque
;
534 uint16_t off
= addr
& 0xffc;
535 uint8_t shift
= (addr
& 0x3) * 8;
536 uint8_t locty
= tpm_tis_locality_from_addr(addr
);
537 uint8_t active_locty
, l
;
538 int c
, set_new_locty
= 1;
540 uint32_t mask
= (size
== 1) ? 0xff : ((size
== 2) ? 0xffff : ~0);
542 trace_tpm_tis_mmio_write(size
, addr
, val
);
545 trace_tpm_tis_mmio_write_locty4();
549 if (tpm_backend_had_startup_error(s
->be_driver
)) {
563 case TPM_TIS_REG_ACCESS
:
565 if ((val
& TPM_TIS_ACCESS_SEIZE
)) {
566 val
&= ~(TPM_TIS_ACCESS_REQUEST_USE
|
567 TPM_TIS_ACCESS_ACTIVE_LOCALITY
);
570 active_locty
= s
->active_locty
;
572 if ((val
& TPM_TIS_ACCESS_ACTIVE_LOCALITY
)) {
573 /* give up locality if currently owned */
574 if (s
->active_locty
== locty
) {
575 trace_tpm_tis_mmio_write_release_locty(locty
);
577 uint8_t newlocty
= TPM_TIS_NO_LOCALITY
;
578 /* anybody wants the locality ? */
579 for (c
= TPM_TIS_NUM_LOCALITIES
- 1; c
>= 0; c
--) {
580 if ((s
->loc
[c
].access
& TPM_TIS_ACCESS_REQUEST_USE
)) {
581 trace_tpm_tis_mmio_write_locty_req_use(c
);
586 trace_tpm_tis_mmio_write_next_locty(newlocty
);
588 if (TPM_TIS_IS_VALID_LOCTY(newlocty
)) {
590 tpm_tis_prep_abort(s
, locty
, newlocty
);
592 active_locty
= TPM_TIS_NO_LOCALITY
;
595 /* not currently the owner; clear a pending request */
596 s
->loc
[locty
].access
&= ~TPM_TIS_ACCESS_REQUEST_USE
;
600 if ((val
& TPM_TIS_ACCESS_BEEN_SEIZED
)) {
601 s
->loc
[locty
].access
&= ~TPM_TIS_ACCESS_BEEN_SEIZED
;
604 if ((val
& TPM_TIS_ACCESS_SEIZE
)) {
606 * allow seize if a locality is active and the requesting
607 * locality is higher than the one that's active
609 * allow seize for requesting locality if no locality is
612 while ((TPM_TIS_IS_VALID_LOCTY(s
->active_locty
) &&
613 locty
> s
->active_locty
) ||
614 !TPM_TIS_IS_VALID_LOCTY(s
->active_locty
)) {
615 bool higher_seize
= FALSE
;
617 /* already a pending SEIZE ? */
618 if ((s
->loc
[locty
].access
& TPM_TIS_ACCESS_SEIZE
)) {
622 /* check for ongoing seize by a higher locality */
623 for (l
= locty
+ 1; l
< TPM_TIS_NUM_LOCALITIES
; l
++) {
624 if ((s
->loc
[l
].access
& TPM_TIS_ACCESS_SEIZE
)) {
634 /* cancel any seize by a lower locality */
635 for (l
= 0; l
< locty
; l
++) {
636 s
->loc
[l
].access
&= ~TPM_TIS_ACCESS_SEIZE
;
639 s
->loc
[locty
].access
|= TPM_TIS_ACCESS_SEIZE
;
641 trace_tpm_tis_mmio_write_locty_seized(locty
, s
->active_locty
);
642 trace_tpm_tis_mmio_write_init_abort();
645 tpm_tis_prep_abort(s
, s
->active_locty
, locty
);
650 if ((val
& TPM_TIS_ACCESS_REQUEST_USE
)) {
651 if (s
->active_locty
!= locty
) {
652 if (TPM_TIS_IS_VALID_LOCTY(s
->active_locty
)) {
653 s
->loc
[locty
].access
|= TPM_TIS_ACCESS_REQUEST_USE
;
655 /* no locality active -> make this one active now */
656 active_locty
= locty
;
662 tpm_tis_new_active_locality(s
, active_locty
);
666 case TPM_TIS_REG_INT_ENABLE
:
667 if (s
->active_locty
!= locty
) {
671 s
->loc
[locty
].inte
&= mask
;
672 s
->loc
[locty
].inte
|= (val
& (TPM_TIS_INT_ENABLED
|
673 TPM_TIS_INT_POLARITY_MASK
|
674 TPM_TIS_INTERRUPTS_SUPPORTED
));
676 case TPM_TIS_REG_INT_VECTOR
:
677 /* hard wired -- ignore */
679 case TPM_TIS_REG_INT_STATUS
:
680 if (s
->active_locty
!= locty
) {
684 /* clearing of interrupt flags */
685 if (((val
& TPM_TIS_INTERRUPTS_SUPPORTED
)) &&
686 (s
->loc
[locty
].ints
& TPM_TIS_INTERRUPTS_SUPPORTED
)) {
687 s
->loc
[locty
].ints
&= ~val
;
688 if (s
->loc
[locty
].ints
== 0) {
689 qemu_irq_lower(s
->irq
);
690 trace_tpm_tis_mmio_write_lowering_irq();
693 s
->loc
[locty
].ints
&= ~(val
& TPM_TIS_INTERRUPTS_SUPPORTED
);
695 case TPM_TIS_REG_STS
:
696 if (s
->active_locty
!= locty
) {
700 if (s
->be_tpm_version
== TPM_VERSION_2_0
) {
701 /* some flags that are only supported for TPM 2 */
702 if (val
& TPM_TIS_STS_COMMAND_CANCEL
) {
703 if (s
->loc
[locty
].state
== TPM_TIS_STATE_EXECUTION
) {
705 * request the backend to cancel. Some backends may not
708 tpm_backend_cancel_cmd(s
->be_driver
);
712 if (val
& TPM_TIS_STS_RESET_ESTABLISHMENT_BIT
) {
713 if (locty
== 3 || locty
== 4) {
714 tpm_backend_reset_tpm_established_flag(s
->be_driver
, locty
);
719 val
&= (TPM_TIS_STS_COMMAND_READY
| TPM_TIS_STS_TPM_GO
|
720 TPM_TIS_STS_RESPONSE_RETRY
);
722 if (val
== TPM_TIS_STS_COMMAND_READY
) {
723 switch (s
->loc
[locty
].state
) {
725 case TPM_TIS_STATE_READY
:
729 case TPM_TIS_STATE_IDLE
:
730 tpm_tis_sts_set(&s
->loc
[locty
], TPM_TIS_STS_COMMAND_READY
);
731 s
->loc
[locty
].state
= TPM_TIS_STATE_READY
;
732 tpm_tis_raise_irq(s
, locty
, TPM_TIS_INT_COMMAND_READY
);
735 case TPM_TIS_STATE_EXECUTION
:
736 case TPM_TIS_STATE_RECEPTION
:
737 /* abort currently running command */
738 trace_tpm_tis_mmio_write_init_abort();
739 tpm_tis_prep_abort(s
, locty
, locty
);
742 case TPM_TIS_STATE_COMPLETION
:
744 /* shortcut to ready state with C/R set */
745 s
->loc
[locty
].state
= TPM_TIS_STATE_READY
;
746 if (!(s
->loc
[locty
].sts
& TPM_TIS_STS_COMMAND_READY
)) {
747 tpm_tis_sts_set(&s
->loc
[locty
],
748 TPM_TIS_STS_COMMAND_READY
);
749 tpm_tis_raise_irq(s
, locty
, TPM_TIS_INT_COMMAND_READY
);
751 s
->loc
[locty
].sts
&= ~(TPM_TIS_STS_DATA_AVAILABLE
);
755 } else if (val
== TPM_TIS_STS_TPM_GO
) {
756 switch (s
->loc
[locty
].state
) {
757 case TPM_TIS_STATE_RECEPTION
:
758 if ((s
->loc
[locty
].sts
& TPM_TIS_STS_EXPECT
) == 0) {
759 tpm_tis_tpm_send(s
, locty
);
766 } else if (val
== TPM_TIS_STS_RESPONSE_RETRY
) {
767 switch (s
->loc
[locty
].state
) {
768 case TPM_TIS_STATE_COMPLETION
:
770 tpm_tis_sts_set(&s
->loc
[locty
],
772 TPM_TIS_STS_DATA_AVAILABLE
);
780 case TPM_TIS_REG_DATA_FIFO
:
781 case TPM_TIS_REG_DATA_XFIFO
... TPM_TIS_REG_DATA_XFIFO_END
:
783 if (s
->active_locty
!= locty
) {
787 if (s
->loc
[locty
].state
== TPM_TIS_STATE_IDLE
||
788 s
->loc
[locty
].state
== TPM_TIS_STATE_EXECUTION
||
789 s
->loc
[locty
].state
== TPM_TIS_STATE_COMPLETION
) {
792 trace_tpm_tis_mmio_write_data2send(val
, size
);
793 if (s
->loc
[locty
].state
== TPM_TIS_STATE_READY
) {
794 s
->loc
[locty
].state
= TPM_TIS_STATE_RECEPTION
;
795 tpm_tis_sts_set(&s
->loc
[locty
],
796 TPM_TIS_STS_EXPECT
| TPM_TIS_STS_VALID
);
800 if (size
> 4 - (addr
& 0x3)) {
801 /* prevent access beyond FIFO */
802 size
= 4 - (addr
& 0x3);
805 while ((s
->loc
[locty
].sts
& TPM_TIS_STS_EXPECT
) && size
> 0) {
806 if (s
->rw_offset
< s
->be_buffer_size
) {
807 s
->buffer
[s
->rw_offset
++] =
812 tpm_tis_sts_set(&s
->loc
[locty
], TPM_TIS_STS_VALID
);
816 /* check for complete packet */
817 if (s
->rw_offset
> 5 &&
818 (s
->loc
[locty
].sts
& TPM_TIS_STS_EXPECT
)) {
819 /* we have a packet length - see if we have all of it */
820 bool need_irq
= !(s
->loc
[locty
].sts
& TPM_TIS_STS_VALID
);
822 len
= tpm_cmd_get_size(&s
->buffer
);
823 if (len
> s
->rw_offset
) {
824 tpm_tis_sts_set(&s
->loc
[locty
],
825 TPM_TIS_STS_EXPECT
| TPM_TIS_STS_VALID
);
827 /* packet complete */
828 tpm_tis_sts_set(&s
->loc
[locty
], TPM_TIS_STS_VALID
);
831 tpm_tis_raise_irq(s
, locty
, TPM_TIS_INT_STS_VALID
);
836 case TPM_TIS_REG_INTERFACE_ID
:
837 if (val
& TPM_TIS_IFACE_ID_INT_SEL_LOCK
) {
838 for (l
= 0; l
< TPM_TIS_NUM_LOCALITIES
; l
++) {
839 s
->loc
[l
].iface_id
|= TPM_TIS_IFACE_ID_INT_SEL_LOCK
;
846 static const MemoryRegionOps tpm_tis_memory_ops
= {
847 .read
= tpm_tis_mmio_read
,
848 .write
= tpm_tis_mmio_write
,
849 .endianness
= DEVICE_LITTLE_ENDIAN
,
851 .min_access_size
= 1,
852 .max_access_size
= 4,
857 * Get the TPMVersion of the backend device being used
859 static enum TPMVersion
tpm_tis_get_tpm_version(TPMIf
*ti
)
861 TPMState
*s
= TPM(ti
);
863 if (tpm_backend_had_startup_error(s
->be_driver
)) {
864 return TPM_VERSION_UNSPEC
;
867 return tpm_backend_get_tpm_version(s
->be_driver
);
871 * This function is called when the machine starts, resets or due to
874 static void tpm_tis_reset(DeviceState
*dev
)
876 TPMState
*s
= TPM(dev
);
879 s
->be_tpm_version
= tpm_backend_get_tpm_version(s
->be_driver
);
880 s
->be_buffer_size
= MIN(tpm_backend_get_buffer_size(s
->be_driver
),
883 if (s
->ppi_enabled
) {
884 tpm_ppi_reset(&s
->ppi
);
886 tpm_backend_reset(s
->be_driver
);
888 s
->active_locty
= TPM_TIS_NO_LOCALITY
;
889 s
->next_locty
= TPM_TIS_NO_LOCALITY
;
890 s
->aborting_locty
= TPM_TIS_NO_LOCALITY
;
892 for (c
= 0; c
< TPM_TIS_NUM_LOCALITIES
; c
++) {
893 s
->loc
[c
].access
= TPM_TIS_ACCESS_TPM_REG_VALID_STS
;
894 switch (s
->be_tpm_version
) {
895 case TPM_VERSION_UNSPEC
:
897 case TPM_VERSION_1_2
:
898 s
->loc
[c
].sts
= TPM_TIS_STS_TPM_FAMILY1_2
;
899 s
->loc
[c
].iface_id
= TPM_TIS_IFACE_ID_SUPPORTED_FLAGS1_3
;
901 case TPM_VERSION_2_0
:
902 s
->loc
[c
].sts
= TPM_TIS_STS_TPM_FAMILY2_0
;
903 s
->loc
[c
].iface_id
= TPM_TIS_IFACE_ID_SUPPORTED_FLAGS2_0
;
906 s
->loc
[c
].inte
= TPM_TIS_INT_POLARITY_LOW_LEVEL
;
908 s
->loc
[c
].state
= TPM_TIS_STATE_IDLE
;
913 tpm_backend_startup_tpm(s
->be_driver
, s
->be_buffer_size
);
916 /* persistent state handling */
918 static int tpm_tis_pre_save(void *opaque
)
920 TPMState
*s
= opaque
;
921 uint8_t locty
= s
->active_locty
;
923 trace_tpm_tis_pre_save(locty
, s
->rw_offset
);
926 tpm_tis_dump_state(opaque
, 0);
930 * Synchronize with backend completion.
932 tpm_backend_finish_sync(s
->be_driver
);
937 static const VMStateDescription vmstate_locty
= {
938 .name
= "tpm-tis/locty",
940 .fields
= (VMStateField
[]) {
941 VMSTATE_UINT32(state
, TPMLocality
),
942 VMSTATE_UINT32(inte
, TPMLocality
),
943 VMSTATE_UINT32(ints
, TPMLocality
),
944 VMSTATE_UINT8(access
, TPMLocality
),
945 VMSTATE_UINT32(sts
, TPMLocality
),
946 VMSTATE_UINT32(iface_id
, TPMLocality
),
947 VMSTATE_END_OF_LIST(),
951 static const VMStateDescription vmstate_tpm_tis
= {
954 .pre_save
= tpm_tis_pre_save
,
955 .fields
= (VMStateField
[]) {
956 VMSTATE_BUFFER(buffer
, TPMState
),
957 VMSTATE_UINT16(rw_offset
, TPMState
),
958 VMSTATE_UINT8(active_locty
, TPMState
),
959 VMSTATE_UINT8(aborting_locty
, TPMState
),
960 VMSTATE_UINT8(next_locty
, TPMState
),
962 VMSTATE_STRUCT_ARRAY(loc
, TPMState
, TPM_TIS_NUM_LOCALITIES
, 0,
963 vmstate_locty
, TPMLocality
),
965 VMSTATE_END_OF_LIST()
969 static Property tpm_tis_properties
[] = {
970 DEFINE_PROP_UINT32("irq", TPMState
, irq_num
, TPM_TIS_IRQ
),
971 DEFINE_PROP_TPMBE("tpmdev", TPMState
, be_driver
),
972 DEFINE_PROP_BOOL("ppi", TPMState
, ppi_enabled
, true),
973 DEFINE_PROP_END_OF_LIST(),
976 static void tpm_tis_realizefn(DeviceState
*dev
, Error
**errp
)
978 TPMState
*s
= TPM(dev
);
981 error_setg(errp
, "at most one TPM device is permitted");
986 error_setg(errp
, "'tpmdev' property is required");
989 if (s
->irq_num
> 15) {
990 error_setg(errp
, "IRQ %d is outside valid range of 0 to 15",
995 isa_init_irq(&s
->busdev
, &s
->irq
, s
->irq_num
);
997 memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev
)),
998 TPM_TIS_ADDR_BASE
, &s
->mmio
);
1000 if (s
->ppi_enabled
) {
1001 tpm_ppi_init(&s
->ppi
, isa_address_space(ISA_DEVICE(dev
)),
1002 TPM_PPI_ADDR_BASE
, OBJECT(s
));
1006 static void tpm_tis_initfn(Object
*obj
)
1008 TPMState
*s
= TPM(obj
);
1010 memory_region_init_io(&s
->mmio
, OBJECT(s
), &tpm_tis_memory_ops
,
1012 TPM_TIS_NUM_LOCALITIES
<< TPM_TIS_LOCALITY_SHIFT
);
1015 static void tpm_tis_class_init(ObjectClass
*klass
, void *data
)
1017 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1018 TPMIfClass
*tc
= TPM_IF_CLASS(klass
);
1020 dc
->realize
= tpm_tis_realizefn
;
1021 dc
->props
= tpm_tis_properties
;
1022 dc
->reset
= tpm_tis_reset
;
1023 dc
->vmsd
= &vmstate_tpm_tis
;
1024 tc
->model
= TPM_MODEL_TPM_TIS
;
1025 tc
->get_version
= tpm_tis_get_tpm_version
;
1026 tc
->request_completed
= tpm_tis_request_completed
;
1029 static const TypeInfo tpm_tis_info
= {
1030 .name
= TYPE_TPM_TIS
,
1031 .parent
= TYPE_ISA_DEVICE
,
1032 .instance_size
= sizeof(TPMState
),
1033 .instance_init
= tpm_tis_initfn
,
1034 .class_init
= tpm_tis_class_init
,
1035 .interfaces
= (InterfaceInfo
[]) {
1041 static void tpm_tis_register(void)
1043 type_register_static(&tpm_tis_info
);
1046 type_init(tpm_tis_register
)