4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GPL.
12 #include "hw/arm/arm.h"
13 #include "sysemu/sysemu.h"
14 #include "hw/boards.h"
15 #include "hw/loader.h"
17 #include "sysemu/device_tree.h"
18 #include "qemu/config-file.h"
19 #include "exec/address-spaces.h"
21 /* Kernel boot protocol is specified in the kernel docs
22 * Documentation/arm/Booting and Documentation/arm64/booting.txt
23 * They have different preferred image load offsets from system RAM base.
25 #define KERNEL_ARGS_ADDR 0x100
26 #define KERNEL_LOAD_ADDR 0x00010000
27 #define KERNEL64_LOAD_ADDR 0x00080000
30 FIXUP_NONE
= 0, /* do nothing */
31 FIXUP_TERMINATOR
, /* end of insns */
32 FIXUP_BOARDID
, /* overwrite with board ID number */
33 FIXUP_ARGPTR
, /* overwrite with pointer to kernel args */
34 FIXUP_ENTRYPOINT
, /* overwrite with kernel entry point */
35 FIXUP_GIC_CPU_IF
, /* overwrite with GIC CPU interface address */
36 FIXUP_BOOTREG
, /* overwrite with boot register address */
37 FIXUP_DSB
, /* overwrite with correct DSB insn for cpu */
41 typedef struct ARMInsnFixup
{
46 static const ARMInsnFixup bootloader_aarch64
[] = {
47 { 0x580000c0 }, /* ldr x0, arg ; Load the lower 32-bits of DTB */
48 { 0xaa1f03e1 }, /* mov x1, xzr */
49 { 0xaa1f03e2 }, /* mov x2, xzr */
50 { 0xaa1f03e3 }, /* mov x3, xzr */
51 { 0x58000084 }, /* ldr x4, entry ; Load the lower 32-bits of kernel entry */
52 { 0xd61f0080 }, /* br x4 ; Jump to the kernel entry point */
53 { 0, FIXUP_ARGPTR
}, /* arg: .word @DTB Lower 32-bits */
54 { 0 }, /* .word @DTB Higher 32-bits */
55 { 0, FIXUP_ENTRYPOINT
}, /* entry: .word @Kernel Entry Lower 32-bits */
56 { 0 }, /* .word @Kernel Entry Higher 32-bits */
57 { 0, FIXUP_TERMINATOR
}
60 /* The worlds second smallest bootloader. Set r0-r2, then jump to kernel. */
61 static const ARMInsnFixup bootloader
[] = {
62 { 0xe3a00000 }, /* mov r0, #0 */
63 { 0xe59f1004 }, /* ldr r1, [pc, #4] */
64 { 0xe59f2004 }, /* ldr r2, [pc, #4] */
65 { 0xe59ff004 }, /* ldr pc, [pc, #4] */
68 { 0, FIXUP_ENTRYPOINT
},
69 { 0, FIXUP_TERMINATOR
}
72 /* Handling for secondary CPU boot in a multicore system.
73 * Unlike the uniprocessor/primary CPU boot, this is platform
74 * dependent. The default code here is based on the secondary
75 * CPU boot protocol used on realview/vexpress boards, with
76 * some parameterisation to increase its flexibility.
77 * QEMU platform models for which this code is not appropriate
78 * should override write_secondary_boot and secondary_cpu_reset_hook
81 * This code enables the interrupt controllers for the secondary
82 * CPUs and then puts all the secondary CPUs into a loop waiting
83 * for an interprocessor interrupt and polling a configurable
84 * location for the kernel secondary CPU entry point.
86 #define DSB_INSN 0xf57ff04f
87 #define CP15_DSB_INSN 0xee070f9a /* mcr cp15, 0, r0, c7, c10, 4 */
89 static const ARMInsnFixup smpboot
[] = {
90 { 0xe59f2028 }, /* ldr r2, gic_cpu_if */
91 { 0xe59f0028 }, /* ldr r0, bootreg_addr */
92 { 0xe3a01001 }, /* mov r1, #1 */
93 { 0xe5821000 }, /* str r1, [r2] - set GICC_CTLR.Enable */
94 { 0xe3a010ff }, /* mov r1, #0xff */
95 { 0xe5821004 }, /* str r1, [r2, 4] - set GIC_PMR.Priority to 0xff */
96 { 0, FIXUP_DSB
}, /* dsb */
97 { 0xe320f003 }, /* wfi */
98 { 0xe5901000 }, /* ldr r1, [r0] */
99 { 0xe1110001 }, /* tst r1, r1 */
100 { 0x0afffffb }, /* beq <wfi> */
101 { 0xe12fff11 }, /* bx r1 */
102 { 0, FIXUP_GIC_CPU_IF
}, /* gic_cpu_if: .word 0x.... */
103 { 0, FIXUP_BOOTREG
}, /* bootreg_addr: .word 0x.... */
104 { 0, FIXUP_TERMINATOR
}
107 static void write_bootloader(const char *name
, hwaddr addr
,
108 const ARMInsnFixup
*insns
, uint32_t *fixupcontext
)
110 /* Fix up the specified bootloader fragment and write it into
111 * guest memory using rom_add_blob_fixed(). fixupcontext is
112 * an array giving the values to write in for the fixup types
113 * which write a value into the code array.
119 while (insns
[len
].fixup
!= FIXUP_TERMINATOR
) {
123 code
= g_new0(uint32_t, len
);
125 for (i
= 0; i
< len
; i
++) {
126 uint32_t insn
= insns
[i
].insn
;
127 FixupType fixup
= insns
[i
].fixup
;
134 case FIXUP_ENTRYPOINT
:
135 case FIXUP_GIC_CPU_IF
:
138 insn
= fixupcontext
[fixup
];
143 code
[i
] = tswap32(insn
);
146 rom_add_blob_fixed(name
, code
, len
* sizeof(uint32_t), addr
);
151 static void default_write_secondary(ARMCPU
*cpu
,
152 const struct arm_boot_info
*info
)
154 uint32_t fixupcontext
[FIXUP_MAX
];
156 fixupcontext
[FIXUP_GIC_CPU_IF
] = info
->gic_cpu_if_addr
;
157 fixupcontext
[FIXUP_BOOTREG
] = info
->smp_bootreg_addr
;
158 if (arm_feature(&cpu
->env
, ARM_FEATURE_V7
)) {
159 fixupcontext
[FIXUP_DSB
] = DSB_INSN
;
161 fixupcontext
[FIXUP_DSB
] = CP15_DSB_INSN
;
164 write_bootloader("smpboot", info
->smp_loader_start
,
165 smpboot
, fixupcontext
);
168 static void default_reset_secondary(ARMCPU
*cpu
,
169 const struct arm_boot_info
*info
)
171 CPUARMState
*env
= &cpu
->env
;
173 stl_phys_notdirty(&address_space_memory
, info
->smp_bootreg_addr
, 0);
174 env
->regs
[15] = info
->smp_loader_start
;
177 static inline bool have_dtb(const struct arm_boot_info
*info
)
179 return info
->dtb_filename
|| info
->get_dtb
;
182 #define WRITE_WORD(p, value) do { \
183 stl_phys_notdirty(&address_space_memory, p, value); \
187 static void set_kernel_args(const struct arm_boot_info
*info
)
189 int initrd_size
= info
->initrd_size
;
190 hwaddr base
= info
->loader_start
;
193 p
= base
+ KERNEL_ARGS_ADDR
;
196 WRITE_WORD(p
, 0x54410001);
198 WRITE_WORD(p
, 0x1000);
201 /* TODO: handle multiple chips on one ATAG list */
203 WRITE_WORD(p
, 0x54410002);
204 WRITE_WORD(p
, info
->ram_size
);
205 WRITE_WORD(p
, info
->loader_start
);
209 WRITE_WORD(p
, 0x54420005);
210 WRITE_WORD(p
, info
->initrd_start
);
211 WRITE_WORD(p
, initrd_size
);
213 if (info
->kernel_cmdline
&& *info
->kernel_cmdline
) {
217 cmdline_size
= strlen(info
->kernel_cmdline
);
218 cpu_physical_memory_write(p
+ 8, info
->kernel_cmdline
,
220 cmdline_size
= (cmdline_size
>> 2) + 1;
221 WRITE_WORD(p
, cmdline_size
+ 2);
222 WRITE_WORD(p
, 0x54410009);
223 p
+= cmdline_size
* 4;
225 if (info
->atag_board
) {
228 uint8_t atag_board_buf
[0x1000];
230 atag_board_len
= (info
->atag_board(info
, atag_board_buf
) + 3) & ~3;
231 WRITE_WORD(p
, (atag_board_len
+ 8) >> 2);
232 WRITE_WORD(p
, 0x414f4d50);
233 cpu_physical_memory_write(p
, atag_board_buf
, atag_board_len
);
241 static void set_kernel_args_old(const struct arm_boot_info
*info
)
245 int initrd_size
= info
->initrd_size
;
246 hwaddr base
= info
->loader_start
;
248 /* see linux/include/asm-arm/setup.h */
249 p
= base
+ KERNEL_ARGS_ADDR
;
253 WRITE_WORD(p
, info
->ram_size
/ 4096);
256 #define FLAG_READONLY 1
257 #define FLAG_RDLOAD 4
258 #define FLAG_RDPROMPT 8
260 WRITE_WORD(p
, FLAG_READONLY
| FLAG_RDLOAD
| FLAG_RDPROMPT
);
262 WRITE_WORD(p
, (31 << 8) | 0); /* /dev/mtdblock0 */
271 /* memc_control_reg */
273 /* unsigned char sounddefault */
274 /* unsigned char adfsdrives */
275 /* unsigned char bytes_per_char_h */
276 /* unsigned char bytes_per_char_v */
278 /* pages_in_bank[4] */
287 WRITE_WORD(p
, info
->initrd_start
);
292 WRITE_WORD(p
, initrd_size
);
297 /* system_serial_low */
299 /* system_serial_high */
303 /* zero unused fields */
304 while (p
< base
+ KERNEL_ARGS_ADDR
+ 256 + 1024) {
307 s
= info
->kernel_cmdline
;
309 cpu_physical_memory_write(p
, s
, strlen(s
) + 1);
316 * load_dtb() - load a device tree binary image into memory
317 * @addr: the address to load the image at
318 * @binfo: struct describing the boot environment
319 * @addr_limit: upper limit of the available memory area at @addr
321 * Load a device tree supplied by the machine or by the user with the
322 * '-dtb' command line option, and put it at offset @addr in target
325 * If @addr_limit contains a meaningful value (i.e., it is strictly greater
326 * than @addr), the device tree is only loaded if its size does not exceed
329 * Returns: the size of the device tree image on success,
330 * 0 if the image size exceeds the limit,
333 * Note: Must not be called unless have_dtb(binfo) is true.
335 static int load_dtb(hwaddr addr
, const struct arm_boot_info
*binfo
,
340 uint32_t acells
, scells
;
342 if (binfo
->dtb_filename
) {
344 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, binfo
->dtb_filename
);
346 fprintf(stderr
, "Couldn't open dtb file %s\n", binfo
->dtb_filename
);
350 fdt
= load_device_tree(filename
, &size
);
352 fprintf(stderr
, "Couldn't open dtb file %s\n", filename
);
358 fdt
= binfo
->get_dtb(binfo
, &size
);
360 fprintf(stderr
, "Board was unable to create a dtb blob\n");
365 if (addr_limit
> addr
&& size
> (addr_limit
- addr
)) {
366 /* Installing the device tree blob at addr would exceed addr_limit.
367 * Whether this constitutes failure is up to the caller to decide,
368 * so just return 0 as size, i.e., no error.
374 acells
= qemu_fdt_getprop_cell(fdt
, "/", "#address-cells");
375 scells
= qemu_fdt_getprop_cell(fdt
, "/", "#size-cells");
376 if (acells
== 0 || scells
== 0) {
377 fprintf(stderr
, "dtb file invalid (#address-cells or #size-cells 0)\n");
381 if (scells
< 2 && binfo
->ram_size
>= (1ULL << 32)) {
382 /* This is user error so deserves a friendlier error message
383 * than the failure of setprop_sized_cells would provide
385 fprintf(stderr
, "qemu: dtb file not compatible with "
390 rc
= qemu_fdt_setprop_sized_cells(fdt
, "/memory", "reg",
391 acells
, binfo
->loader_start
,
392 scells
, binfo
->ram_size
);
394 fprintf(stderr
, "couldn't set /memory/reg\n");
398 if (binfo
->kernel_cmdline
&& *binfo
->kernel_cmdline
) {
399 rc
= qemu_fdt_setprop_string(fdt
, "/chosen", "bootargs",
400 binfo
->kernel_cmdline
);
402 fprintf(stderr
, "couldn't set /chosen/bootargs\n");
407 if (binfo
->initrd_size
) {
408 rc
= qemu_fdt_setprop_cell(fdt
, "/chosen", "linux,initrd-start",
409 binfo
->initrd_start
);
411 fprintf(stderr
, "couldn't set /chosen/linux,initrd-start\n");
415 rc
= qemu_fdt_setprop_cell(fdt
, "/chosen", "linux,initrd-end",
416 binfo
->initrd_start
+ binfo
->initrd_size
);
418 fprintf(stderr
, "couldn't set /chosen/linux,initrd-end\n");
423 if (binfo
->modify_dtb
) {
424 binfo
->modify_dtb(binfo
, fdt
);
427 qemu_fdt_dumpdtb(fdt
, size
);
429 /* Put the DTB into the memory map as a ROM image: this will ensure
430 * the DTB is copied again upon reset, even if addr points into RAM.
432 rom_add_blob_fixed("dtb", fdt
, size
, addr
);
443 static void do_cpu_reset(void *opaque
)
445 ARMCPU
*cpu
= opaque
;
446 CPUARMState
*env
= &cpu
->env
;
447 const struct arm_boot_info
*info
= env
->boot_info
;
451 if (!info
->is_linux
) {
452 /* Jump to the entry point. */
454 env
->pc
= info
->entry
;
456 env
->regs
[15] = info
->entry
& 0xfffffffe;
457 env
->thumb
= info
->entry
& 1;
460 /* If we are booting Linux then we need to check whether we are
461 * booting into secure or non-secure state and adjust the state
462 * accordingly. Out of reset, ARM is defined to be in secure state
463 * (SCR.NS = 0), we change that here if non-secure boot has been
466 if (arm_feature(env
, ARM_FEATURE_EL3
)) {
467 /* AArch64 is defined to come out of reset into EL3 if enabled.
468 * If we are booting Linux then we need to adjust our EL as
469 * Linux expects us to be in EL2 or EL1. AArch32 resets into
470 * SVC, which Linux expects, so no privilege/exception level to
474 if (arm_feature(env
, ARM_FEATURE_EL2
)) {
475 env
->pstate
= PSTATE_MODE_EL2h
;
477 env
->pstate
= PSTATE_MODE_EL1h
;
481 /* Set to non-secure if not a secure boot */
482 if (!info
->secure_boot
) {
483 /* Linux expects non-secure state */
484 env
->cp15
.scr_el3
|= SCR_NS
;
488 if (CPU(cpu
) == first_cpu
) {
490 env
->pc
= info
->loader_start
;
492 env
->regs
[15] = info
->loader_start
;
495 if (!have_dtb(info
)) {
497 set_kernel_args_old(info
);
499 set_kernel_args(info
);
503 info
->secondary_cpu_reset_hook(cpu
, info
);
510 * load_image_to_fw_cfg() - Load an image file into an fw_cfg entry identified
512 * @fw_cfg: The firmware config instance to store the data in.
513 * @size_key: The firmware config key to store the size of the loaded
514 * data under, with fw_cfg_add_i32().
515 * @data_key: The firmware config key to store the loaded data under,
516 * with fw_cfg_add_bytes().
517 * @image_name: The name of the image file to load. If it is NULL, the
518 * function returns without doing anything.
519 * @try_decompress: Whether the image should be decompressed (gunzipped) before
520 * adding it to fw_cfg. If decompression fails, the image is
523 * In case of failure, the function prints an error message to stderr and the
524 * process exits with status 1.
526 static void load_image_to_fw_cfg(FWCfgState
*fw_cfg
, uint16_t size_key
,
527 uint16_t data_key
, const char *image_name
,
533 if (image_name
== NULL
) {
537 if (try_decompress
) {
538 size
= load_image_gzipped_buffer(image_name
,
539 LOAD_IMAGE_MAX_GUNZIP_BYTES
, &data
);
542 if (size
== (size_t)-1) {
546 if (!g_file_get_contents(image_name
, &contents
, &length
, NULL
)) {
547 fprintf(stderr
, "failed to load \"%s\"\n", image_name
);
551 data
= (uint8_t *)contents
;
554 fw_cfg_add_i32(fw_cfg
, size_key
, size
);
555 fw_cfg_add_bytes(fw_cfg
, data_key
, data
, size
);
558 void arm_load_kernel(ARMCPU
*cpu
, struct arm_boot_info
*info
)
564 uint64_t elf_entry
, elf_low_addr
, elf_high_addr
;
566 hwaddr entry
, kernel_load_offset
;
568 static const ARMInsnFixup
*primary_loader
;
570 /* CPU objects (unlike devices) are not automatically reset on system
571 * reset, so we must always register a handler to do so. If we're
572 * actually loading a kernel, the handler is also responsible for
573 * arranging that we start it correctly.
575 for (cs
= CPU(cpu
); cs
; cs
= CPU_NEXT(cs
)) {
576 qemu_register_reset(do_cpu_reset
, ARM_CPU(cs
));
579 /* Load the kernel. */
580 if (!info
->kernel_filename
|| info
->firmware_loaded
) {
582 if (have_dtb(info
)) {
583 /* If we have a device tree blob, but no kernel to supply it to (or
584 * the kernel is supposed to be loaded by the bootloader), copy the
585 * DTB to the base of RAM for the bootloader to pick up.
587 if (load_dtb(info
->loader_start
, info
, 0) < 0) {
592 if (info
->kernel_filename
) {
594 bool try_decompressing_kernel
;
596 fw_cfg
= fw_cfg_find();
597 try_decompressing_kernel
= arm_feature(&cpu
->env
,
598 ARM_FEATURE_AARCH64
);
600 /* Expose the kernel, the command line, and the initrd in fw_cfg.
601 * We don't process them here at all, it's all left to the
604 load_image_to_fw_cfg(fw_cfg
,
605 FW_CFG_KERNEL_SIZE
, FW_CFG_KERNEL_DATA
,
606 info
->kernel_filename
,
607 try_decompressing_kernel
);
608 load_image_to_fw_cfg(fw_cfg
,
609 FW_CFG_INITRD_SIZE
, FW_CFG_INITRD_DATA
,
610 info
->initrd_filename
, false);
612 if (info
->kernel_cmdline
) {
613 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
,
614 strlen(info
->kernel_cmdline
) + 1);
615 fw_cfg_add_string(fw_cfg
, FW_CFG_CMDLINE_DATA
,
616 info
->kernel_cmdline
);
620 /* We will start from address 0 (typically a boot ROM image) in the
621 * same way as hardware.
626 if (arm_feature(&cpu
->env
, ARM_FEATURE_AARCH64
)) {
627 primary_loader
= bootloader_aarch64
;
628 kernel_load_offset
= KERNEL64_LOAD_ADDR
;
629 elf_machine
= EM_AARCH64
;
631 primary_loader
= bootloader
;
632 kernel_load_offset
= KERNEL_LOAD_ADDR
;
633 elf_machine
= EM_ARM
;
636 info
->dtb_filename
= qemu_opt_get(qemu_get_machine_opts(), "dtb");
638 if (!info
->secondary_cpu_reset_hook
) {
639 info
->secondary_cpu_reset_hook
= default_reset_secondary
;
641 if (!info
->write_secondary_boot
) {
642 info
->write_secondary_boot
= default_write_secondary
;
645 if (info
->nb_cpus
== 0)
648 #ifdef TARGET_WORDS_BIGENDIAN
654 /* We want to put the initrd far enough into RAM that when the
655 * kernel is uncompressed it will not clobber the initrd. However
656 * on boards without much RAM we must ensure that we still leave
657 * enough room for a decent sized initrd, and on boards with large
658 * amounts of RAM we must avoid the initrd being so far up in RAM
659 * that it is outside lowmem and inaccessible to the kernel.
660 * So for boards with less than 256MB of RAM we put the initrd
661 * halfway into RAM, and for boards with 256MB of RAM or more we put
662 * the initrd at 128MB.
664 info
->initrd_start
= info
->loader_start
+
665 MIN(info
->ram_size
/ 2, 128 * 1024 * 1024);
667 /* Assume that raw images are linux kernels, and ELF images are not. */
668 kernel_size
= load_elf(info
->kernel_filename
, NULL
, NULL
, &elf_entry
,
669 &elf_low_addr
, &elf_high_addr
, big_endian
,
671 if (kernel_size
> 0 && have_dtb(info
)) {
672 /* If there is still some room left at the base of RAM, try and put
673 * the DTB there like we do for images loaded with -bios or -pflash.
675 if (elf_low_addr
> info
->loader_start
676 || elf_high_addr
< info
->loader_start
) {
677 /* Pass elf_low_addr as address limit to load_dtb if it may be
678 * pointing into RAM, otherwise pass '0' (no limit)
680 if (elf_low_addr
< info
->loader_start
) {
683 if (load_dtb(info
->loader_start
, info
, elf_low_addr
) < 0) {
689 if (kernel_size
< 0) {
690 kernel_size
= load_uimage(info
->kernel_filename
, &entry
, NULL
,
691 &is_linux
, NULL
, NULL
);
693 /* On aarch64, it's the bootloader's job to uncompress the kernel. */
694 if (arm_feature(&cpu
->env
, ARM_FEATURE_AARCH64
) && kernel_size
< 0) {
695 entry
= info
->loader_start
+ kernel_load_offset
;
696 kernel_size
= load_image_gzipped(info
->kernel_filename
, entry
,
697 info
->ram_size
- kernel_load_offset
);
700 if (kernel_size
< 0) {
701 entry
= info
->loader_start
+ kernel_load_offset
;
702 kernel_size
= load_image_targphys(info
->kernel_filename
, entry
,
703 info
->ram_size
- kernel_load_offset
);
706 if (kernel_size
< 0) {
707 fprintf(stderr
, "qemu: could not load kernel '%s'\n",
708 info
->kernel_filename
);
713 uint32_t fixupcontext
[FIXUP_MAX
];
715 if (info
->initrd_filename
) {
716 initrd_size
= load_ramdisk(info
->initrd_filename
,
720 if (initrd_size
< 0) {
721 initrd_size
= load_image_targphys(info
->initrd_filename
,
726 if (initrd_size
< 0) {
727 fprintf(stderr
, "qemu: could not load initrd '%s'\n",
728 info
->initrd_filename
);
734 info
->initrd_size
= initrd_size
;
736 fixupcontext
[FIXUP_BOARDID
] = info
->board_id
;
738 /* for device tree boot, we pass the DTB directly in r2. Otherwise
739 * we point to the kernel args.
741 if (have_dtb(info
)) {
742 /* Place the DTB after the initrd in memory. Note that some
743 * kernels will trash anything in the 4K page the initrd
744 * ends in, so make sure the DTB isn't caught up in that.
746 hwaddr dtb_start
= QEMU_ALIGN_UP(info
->initrd_start
+ initrd_size
,
748 if (load_dtb(dtb_start
, info
, 0) < 0) {
751 fixupcontext
[FIXUP_ARGPTR
] = dtb_start
;
753 fixupcontext
[FIXUP_ARGPTR
] = info
->loader_start
+ KERNEL_ARGS_ADDR
;
754 if (info
->ram_size
>= (1ULL << 32)) {
755 fprintf(stderr
, "qemu: RAM size must be less than 4GB to boot"
756 " Linux kernel using ATAGS (try passing a device tree"
761 fixupcontext
[FIXUP_ENTRYPOINT
] = entry
;
763 write_bootloader("bootloader", info
->loader_start
,
764 primary_loader
, fixupcontext
);
766 if (info
->nb_cpus
> 1) {
767 info
->write_secondary_boot(cpu
, info
);
770 info
->is_linux
= is_linux
;
772 for (cs
= CPU(cpu
); cs
; cs
= CPU_NEXT(cs
)) {
773 ARM_CPU(cs
)->env
.boot_info
= info
;