4 * Copyright (c) 2012 Jia Liu <proljc@gmail.com>
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qapi/error.h"
23 #include "qemu-common.h"
24 #include "exec/exec-all.h"
26 static void openrisc_cpu_set_pc(CPUState
*cs
, vaddr value
)
28 OpenRISCCPU
*cpu
= OPENRISC_CPU(cs
);
33 static bool openrisc_cpu_has_work(CPUState
*cs
)
35 return cs
->interrupt_request
& (CPU_INTERRUPT_HARD
|
39 /* CPUClass::reset() */
40 static void openrisc_cpu_reset(CPUState
*s
)
42 OpenRISCCPU
*cpu
= OPENRISC_CPU(s
);
43 OpenRISCCPUClass
*occ
= OPENRISC_CPU_GET_CLASS(cpu
);
47 memset(&cpu
->env
, 0, offsetof(CPUOpenRISCState
, end_reset_fields
));
50 cpu
->env
.sr
= SR_FO
| SR_SM
;
51 cpu
->env
.lock_addr
= -1;
52 s
->exception_index
= -1;
54 cpu
->env
.upr
= UPR_UP
| UPR_DMP
| UPR_IMP
| UPR_PICP
| UPR_TTP
|
56 cpu
->env
.dmmucfgr
= (DMMUCFGR_NTW
& (0 << 2)) | (DMMUCFGR_NTS
& (6 << 2));
57 cpu
->env
.immucfgr
= (IMMUCFGR_NTW
& (0 << 2)) | (IMMUCFGR_NTS
& (6 << 2));
59 #ifndef CONFIG_USER_ONLY
60 cpu
->env
.picmr
= 0x00000000;
61 cpu
->env
.picsr
= 0x00000000;
63 cpu
->env
.ttmr
= 0x00000000;
67 static void openrisc_cpu_realizefn(DeviceState
*dev
, Error
**errp
)
69 CPUState
*cs
= CPU(dev
);
70 OpenRISCCPUClass
*occ
= OPENRISC_CPU_GET_CLASS(dev
);
71 Error
*local_err
= NULL
;
73 cpu_exec_realizefn(cs
, &local_err
);
74 if (local_err
!= NULL
) {
75 error_propagate(errp
, local_err
);
82 occ
->parent_realize(dev
, errp
);
85 static void openrisc_cpu_initfn(Object
*obj
)
87 CPUState
*cs
= CPU(obj
);
88 OpenRISCCPU
*cpu
= OPENRISC_CPU(obj
);
90 cs
->env_ptr
= &cpu
->env
;
92 #ifndef CONFIG_USER_ONLY
93 cpu_openrisc_mmu_init(cpu
);
99 static ObjectClass
*openrisc_cpu_class_by_name(const char *cpu_model
)
104 typename
= g_strdup_printf("%s-" TYPE_OPENRISC_CPU
, cpu_model
);
105 oc
= object_class_by_name(typename
);
107 if (oc
!= NULL
&& (!object_class_dynamic_cast(oc
, TYPE_OPENRISC_CPU
) ||
108 object_class_is_abstract(oc
))) {
114 static void or1200_initfn(Object
*obj
)
116 OpenRISCCPU
*cpu
= OPENRISC_CPU(obj
);
118 cpu
->env
.cpucfgr
= CPUCFGR_NSGF
| CPUCFGR_OB32S
| CPUCFGR_OF32S
|
122 static void openrisc_any_initfn(Object
*obj
)
124 OpenRISCCPU
*cpu
= OPENRISC_CPU(obj
);
126 cpu
->env
.cpucfgr
= CPUCFGR_NSGF
| CPUCFGR_OB32S
| CPUCFGR_EVBARP
;
129 typedef struct OpenRISCCPUInfo
{
131 void (*initfn
)(Object
*obj
);
134 static const OpenRISCCPUInfo openrisc_cpus
[] = {
135 { .name
= "or1200", .initfn
= or1200_initfn
},
136 { .name
= "any", .initfn
= openrisc_any_initfn
},
139 static void openrisc_cpu_class_init(ObjectClass
*oc
, void *data
)
141 OpenRISCCPUClass
*occ
= OPENRISC_CPU_CLASS(oc
);
142 CPUClass
*cc
= CPU_CLASS(occ
);
143 DeviceClass
*dc
= DEVICE_CLASS(oc
);
145 occ
->parent_realize
= dc
->realize
;
146 dc
->realize
= openrisc_cpu_realizefn
;
148 occ
->parent_reset
= cc
->reset
;
149 cc
->reset
= openrisc_cpu_reset
;
151 cc
->class_by_name
= openrisc_cpu_class_by_name
;
152 cc
->has_work
= openrisc_cpu_has_work
;
153 cc
->do_interrupt
= openrisc_cpu_do_interrupt
;
154 cc
->cpu_exec_interrupt
= openrisc_cpu_exec_interrupt
;
155 cc
->dump_state
= openrisc_cpu_dump_state
;
156 cc
->set_pc
= openrisc_cpu_set_pc
;
157 cc
->gdb_read_register
= openrisc_cpu_gdb_read_register
;
158 cc
->gdb_write_register
= openrisc_cpu_gdb_write_register
;
159 #ifdef CONFIG_USER_ONLY
160 cc
->handle_mmu_fault
= openrisc_cpu_handle_mmu_fault
;
162 cc
->get_phys_page_debug
= openrisc_cpu_get_phys_page_debug
;
163 dc
->vmsd
= &vmstate_openrisc_cpu
;
165 cc
->gdb_num_core_regs
= 32 + 3;
166 cc
->tcg_initialize
= openrisc_translate_init
;
169 static void cpu_register(const OpenRISCCPUInfo
*info
)
171 TypeInfo type_info
= {
172 .parent
= TYPE_OPENRISC_CPU
,
173 .instance_size
= sizeof(OpenRISCCPU
),
174 .instance_init
= info
->initfn
,
175 .class_size
= sizeof(OpenRISCCPUClass
),
178 type_info
.name
= g_strdup_printf("%s-" TYPE_OPENRISC_CPU
, info
->name
);
179 type_register(&type_info
);
180 g_free((void *)type_info
.name
);
183 static const TypeInfo openrisc_cpu_type_info
= {
184 .name
= TYPE_OPENRISC_CPU
,
186 .instance_size
= sizeof(OpenRISCCPU
),
187 .instance_init
= openrisc_cpu_initfn
,
189 .class_size
= sizeof(OpenRISCCPUClass
),
190 .class_init
= openrisc_cpu_class_init
,
193 static void openrisc_cpu_register_types(void)
197 type_register_static(&openrisc_cpu_type_info
);
198 for (i
= 0; i
< ARRAY_SIZE(openrisc_cpus
); i
++) {
199 cpu_register(&openrisc_cpus
[i
]);
203 /* Sort alphabetically by type name, except for "any". */
204 static gint
openrisc_cpu_list_compare(gconstpointer a
, gconstpointer b
)
206 ObjectClass
*class_a
= (ObjectClass
*)a
;
207 ObjectClass
*class_b
= (ObjectClass
*)b
;
208 const char *name_a
, *name_b
;
210 name_a
= object_class_get_name(class_a
);
211 name_b
= object_class_get_name(class_b
);
212 if (strcmp(name_a
, "any-" TYPE_OPENRISC_CPU
) == 0) {
214 } else if (strcmp(name_b
, "any-" TYPE_OPENRISC_CPU
) == 0) {
217 return strcmp(name_a
, name_b
);
221 static void openrisc_cpu_list_entry(gpointer data
, gpointer user_data
)
223 ObjectClass
*oc
= data
;
224 CPUListState
*s
= user_data
;
225 const char *typename
;
228 typename
= object_class_get_name(oc
);
229 name
= g_strndup(typename
,
230 strlen(typename
) - strlen("-" TYPE_OPENRISC_CPU
));
231 (*s
->cpu_fprintf
)(s
->file
, " %s\n",
236 void cpu_openrisc_list(FILE *f
, fprintf_function cpu_fprintf
)
240 .cpu_fprintf
= cpu_fprintf
,
244 list
= object_class_get_list(TYPE_OPENRISC_CPU
, false);
245 list
= g_slist_sort(list
, openrisc_cpu_list_compare
);
246 (*cpu_fprintf
)(f
, "Available CPUs:\n");
247 g_slist_foreach(list
, openrisc_cpu_list_entry
, &s
);
251 type_init(openrisc_cpu_register_types
)