2 * QEMU VMWARE PVSCSI paravirtual SCSI bus
4 * Copyright (c) 2012 Ravello Systems LTD (http://ravellosystems.com)
6 * Developed by Daynix Computing LTD (http://www.daynix.com)
8 * Based on implementation by Paolo Bonzini
9 * http://lists.gnu.org/archive/html/qemu-devel/2011-08/msg00729.html
12 * Paolo Bonzini <pbonzini@redhat.com>
13 * Dmitry Fleytman <dmitry@daynix.com>
14 * Yan Vugenfirer <yan@daynix.com>
16 * This work is licensed under the terms of the GNU GPL, version 2.
17 * See the COPYING file in the top-level directory.
20 * MSI-X support has been removed for the moment because it leads Windows OS
21 * to crash on startup. The crash happens because Windows driver requires
22 * MSI-X shared memory to be part of the same BAR used for rings state
23 * registers, etc. This is not supported by QEMU infrastructure so separate
24 * BAR created from MSI-X purposes. Windows driver fails to deal with 2 BARs.
28 #include "qemu/osdep.h"
29 #include "qapi/error.h"
30 #include "qemu/main-loop.h"
31 #include "qemu/module.h"
32 #include "hw/scsi/scsi.h"
33 #include "migration/vmstate.h"
34 #include "scsi/constants.h"
35 #include "hw/pci/msi.h"
36 #include "hw/qdev-properties.h"
37 #include "vmw_pvscsi.h"
41 #define PVSCSI_USE_64BIT (true)
42 #define PVSCSI_PER_VECTOR_MASK (false)
44 #define PVSCSI_MAX_DEVS (64)
45 #define PVSCSI_MSIX_NUM_VECTORS (1)
47 #define PVSCSI_MAX_SG_ELEM 2048
49 #define PVSCSI_MAX_CMD_DATA_WORDS \
50 (sizeof(PVSCSICmdDescSetupRings)/sizeof(uint32_t))
52 #define RS_GET_FIELD(m, field) \
53 (ldl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \
54 (m)->rs_pa + offsetof(struct PVSCSIRingsState, field)))
55 #define RS_SET_FIELD(m, field, val) \
56 (stl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \
57 (m)->rs_pa + offsetof(struct PVSCSIRingsState, field), val))
59 typedef struct PVSCSIClass
{
60 PCIDeviceClass parent_class
;
61 DeviceRealize parent_dc_realize
;
64 #define TYPE_PVSCSI "pvscsi"
65 #define PVSCSI(obj) OBJECT_CHECK(PVSCSIState, (obj), TYPE_PVSCSI)
67 #define PVSCSI_DEVICE_CLASS(klass) \
68 OBJECT_CLASS_CHECK(PVSCSIClass, (klass), TYPE_PVSCSI)
69 #define PVSCSI_DEVICE_GET_CLASS(obj) \
70 OBJECT_GET_CLASS(PVSCSIClass, (obj), TYPE_PVSCSI)
72 /* Compatibility flags for migration */
73 #define PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT 0
74 #define PVSCSI_COMPAT_OLD_PCI_CONFIGURATION \
75 (1 << PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT)
76 #define PVSCSI_COMPAT_DISABLE_PCIE_BIT 1
77 #define PVSCSI_COMPAT_DISABLE_PCIE \
78 (1 << PVSCSI_COMPAT_DISABLE_PCIE_BIT)
80 #define PVSCSI_USE_OLD_PCI_CONFIGURATION(s) \
81 ((s)->compat_flags & PVSCSI_COMPAT_OLD_PCI_CONFIGURATION)
82 #define PVSCSI_MSI_OFFSET(s) \
83 (PVSCSI_USE_OLD_PCI_CONFIGURATION(s) ? 0x50 : 0x7c)
84 #define PVSCSI_EXP_EP_OFFSET (0x40)
86 typedef struct PVSCSIRingInfo
{
88 uint32_t txr_len_mask
;
89 uint32_t rxr_len_mask
;
90 uint32_t msg_len_mask
;
91 uint64_t req_ring_pages_pa
[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES
];
92 uint64_t cmp_ring_pages_pa
[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES
];
93 uint64_t msg_ring_pages_pa
[PVSCSI_SETUP_MSG_RING_MAX_NUM_PAGES
];
94 uint64_t consumed_ptr
;
95 uint64_t filled_cmp_ptr
;
96 uint64_t filled_msg_ptr
;
99 typedef struct PVSCSISGState
{
105 typedef QTAILQ_HEAD(, PVSCSIRequest
) PVSCSIRequestList
;
108 PCIDevice parent_obj
;
109 MemoryRegion io_space
;
111 QEMUBH
*completion_worker
;
112 PVSCSIRequestList pending_queue
;
113 PVSCSIRequestList completion_queue
;
115 uint64_t reg_interrupt_status
; /* Interrupt status register value */
116 uint64_t reg_interrupt_enabled
; /* Interrupt mask register value */
117 uint64_t reg_command_status
; /* Command status register value */
119 /* Command data adoption mechanism */
120 uint64_t curr_cmd
; /* Last command arrived */
121 uint32_t curr_cmd_data_cntr
; /* Amount of data for last command */
123 /* Collector for current command data */
124 uint32_t curr_cmd_data
[PVSCSI_MAX_CMD_DATA_WORDS
];
126 uint8_t rings_info_valid
; /* Whether data rings initialized */
127 uint8_t msg_ring_info_valid
; /* Whether message ring initialized */
128 uint8_t use_msg
; /* Whether to use message ring */
130 uint8_t msi_used
; /* For migration compatibility */
131 PVSCSIRingInfo rings
; /* Data transfer rings manager */
132 uint32_t resetting
; /* Reset in progress */
134 uint32_t compat_flags
;
137 typedef struct PVSCSIRequest
{
145 struct PVSCSIRingReqDesc req
;
146 struct PVSCSIRingCmpDesc cmp
;
147 QTAILQ_ENTRY(PVSCSIRequest
) next
;
150 /* Integer binary logarithm */
152 pvscsi_log2(uint32_t input
)
156 while (input
>> ++log
) {
162 pvscsi_ring_init_data(PVSCSIRingInfo
*m
, PVSCSICmdDescSetupRings
*ri
)
165 uint32_t txr_len_log2
, rxr_len_log2
;
166 uint32_t req_ring_size
, cmp_ring_size
;
167 m
->rs_pa
= ri
->ringsStatePPN
<< VMW_PAGE_SHIFT
;
169 req_ring_size
= ri
->reqRingNumPages
* PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE
;
170 cmp_ring_size
= ri
->cmpRingNumPages
* PVSCSI_MAX_NUM_CMP_ENTRIES_PER_PAGE
;
171 txr_len_log2
= pvscsi_log2(req_ring_size
- 1);
172 rxr_len_log2
= pvscsi_log2(cmp_ring_size
- 1);
174 m
->txr_len_mask
= MASK(txr_len_log2
);
175 m
->rxr_len_mask
= MASK(rxr_len_log2
);
178 m
->filled_cmp_ptr
= 0;
180 for (i
= 0; i
< ri
->reqRingNumPages
; i
++) {
181 m
->req_ring_pages_pa
[i
] = ri
->reqRingPPNs
[i
] << VMW_PAGE_SHIFT
;
184 for (i
= 0; i
< ri
->cmpRingNumPages
; i
++) {
185 m
->cmp_ring_pages_pa
[i
] = ri
->cmpRingPPNs
[i
] << VMW_PAGE_SHIFT
;
188 RS_SET_FIELD(m
, reqProdIdx
, 0);
189 RS_SET_FIELD(m
, reqConsIdx
, 0);
190 RS_SET_FIELD(m
, reqNumEntriesLog2
, txr_len_log2
);
192 RS_SET_FIELD(m
, cmpProdIdx
, 0);
193 RS_SET_FIELD(m
, cmpConsIdx
, 0);
194 RS_SET_FIELD(m
, cmpNumEntriesLog2
, rxr_len_log2
);
196 trace_pvscsi_ring_init_data(txr_len_log2
, rxr_len_log2
);
198 /* Flush ring state page changes */
203 pvscsi_ring_init_msg(PVSCSIRingInfo
*m
, PVSCSICmdDescSetupMsgRing
*ri
)
209 if (!ri
->numPages
|| ri
->numPages
> PVSCSI_SETUP_MSG_RING_MAX_NUM_PAGES
) {
212 ring_size
= ri
->numPages
* PVSCSI_MAX_NUM_MSG_ENTRIES_PER_PAGE
;
213 len_log2
= pvscsi_log2(ring_size
- 1);
215 m
->msg_len_mask
= MASK(len_log2
);
217 m
->filled_msg_ptr
= 0;
219 for (i
= 0; i
< ri
->numPages
; i
++) {
220 m
->msg_ring_pages_pa
[i
] = ri
->ringPPNs
[i
] << VMW_PAGE_SHIFT
;
223 RS_SET_FIELD(m
, msgProdIdx
, 0);
224 RS_SET_FIELD(m
, msgConsIdx
, 0);
225 RS_SET_FIELD(m
, msgNumEntriesLog2
, len_log2
);
227 trace_pvscsi_ring_init_msg(len_log2
);
229 /* Flush ring state page changes */
236 pvscsi_ring_cleanup(PVSCSIRingInfo
*mgr
)
239 mgr
->txr_len_mask
= 0;
240 mgr
->rxr_len_mask
= 0;
241 mgr
->msg_len_mask
= 0;
242 mgr
->consumed_ptr
= 0;
243 mgr
->filled_cmp_ptr
= 0;
244 mgr
->filled_msg_ptr
= 0;
245 memset(mgr
->req_ring_pages_pa
, 0, sizeof(mgr
->req_ring_pages_pa
));
246 memset(mgr
->cmp_ring_pages_pa
, 0, sizeof(mgr
->cmp_ring_pages_pa
));
247 memset(mgr
->msg_ring_pages_pa
, 0, sizeof(mgr
->msg_ring_pages_pa
));
251 pvscsi_ring_pop_req_descr(PVSCSIRingInfo
*mgr
)
253 uint32_t ready_ptr
= RS_GET_FIELD(mgr
, reqProdIdx
);
254 uint32_t ring_size
= PVSCSI_MAX_NUM_PAGES_REQ_RING
255 * PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE
;
257 if (ready_ptr
!= mgr
->consumed_ptr
258 && ready_ptr
- mgr
->consumed_ptr
< ring_size
) {
259 uint32_t next_ready_ptr
=
260 mgr
->consumed_ptr
++ & mgr
->txr_len_mask
;
261 uint32_t next_ready_page
=
262 next_ready_ptr
/ PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE
;
263 uint32_t inpage_idx
=
264 next_ready_ptr
% PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE
;
266 return mgr
->req_ring_pages_pa
[next_ready_page
] +
267 inpage_idx
* sizeof(PVSCSIRingReqDesc
);
274 pvscsi_ring_flush_req(PVSCSIRingInfo
*mgr
)
276 RS_SET_FIELD(mgr
, reqConsIdx
, mgr
->consumed_ptr
);
280 pvscsi_ring_pop_cmp_descr(PVSCSIRingInfo
*mgr
)
283 * According to Linux driver code it explicitly verifies that number
284 * of requests being processed by device is less then the size of
285 * completion queue, so device may omit completion queue overflow
286 * conditions check. We assume that this is true for other (Windows)
290 uint32_t free_cmp_ptr
=
291 mgr
->filled_cmp_ptr
++ & mgr
->rxr_len_mask
;
292 uint32_t free_cmp_page
=
293 free_cmp_ptr
/ PVSCSI_MAX_NUM_CMP_ENTRIES_PER_PAGE
;
294 uint32_t inpage_idx
=
295 free_cmp_ptr
% PVSCSI_MAX_NUM_CMP_ENTRIES_PER_PAGE
;
296 return mgr
->cmp_ring_pages_pa
[free_cmp_page
] +
297 inpage_idx
* sizeof(PVSCSIRingCmpDesc
);
301 pvscsi_ring_pop_msg_descr(PVSCSIRingInfo
*mgr
)
303 uint32_t free_msg_ptr
=
304 mgr
->filled_msg_ptr
++ & mgr
->msg_len_mask
;
305 uint32_t free_msg_page
=
306 free_msg_ptr
/ PVSCSI_MAX_NUM_MSG_ENTRIES_PER_PAGE
;
307 uint32_t inpage_idx
=
308 free_msg_ptr
% PVSCSI_MAX_NUM_MSG_ENTRIES_PER_PAGE
;
309 return mgr
->msg_ring_pages_pa
[free_msg_page
] +
310 inpage_idx
* sizeof(PVSCSIRingMsgDesc
);
314 pvscsi_ring_flush_cmp(PVSCSIRingInfo
*mgr
)
316 /* Flush descriptor changes */
319 trace_pvscsi_ring_flush_cmp(mgr
->filled_cmp_ptr
);
321 RS_SET_FIELD(mgr
, cmpProdIdx
, mgr
->filled_cmp_ptr
);
325 pvscsi_ring_msg_has_room(PVSCSIRingInfo
*mgr
)
327 uint32_t prodIdx
= RS_GET_FIELD(mgr
, msgProdIdx
);
328 uint32_t consIdx
= RS_GET_FIELD(mgr
, msgConsIdx
);
330 return (prodIdx
- consIdx
) < (mgr
->msg_len_mask
+ 1);
334 pvscsi_ring_flush_msg(PVSCSIRingInfo
*mgr
)
336 /* Flush descriptor changes */
339 trace_pvscsi_ring_flush_msg(mgr
->filled_msg_ptr
);
341 RS_SET_FIELD(mgr
, msgProdIdx
, mgr
->filled_msg_ptr
);
345 pvscsi_reset_state(PVSCSIState
*s
)
347 s
->curr_cmd
= PVSCSI_CMD_FIRST
;
348 s
->curr_cmd_data_cntr
= 0;
349 s
->reg_command_status
= PVSCSI_COMMAND_PROCESSING_SUCCEEDED
;
350 s
->reg_interrupt_status
= 0;
351 pvscsi_ring_cleanup(&s
->rings
);
352 s
->rings_info_valid
= FALSE
;
353 s
->msg_ring_info_valid
= FALSE
;
354 QTAILQ_INIT(&s
->pending_queue
);
355 QTAILQ_INIT(&s
->completion_queue
);
359 pvscsi_update_irq_status(PVSCSIState
*s
)
361 PCIDevice
*d
= PCI_DEVICE(s
);
362 bool should_raise
= s
->reg_interrupt_enabled
& s
->reg_interrupt_status
;
364 trace_pvscsi_update_irq_level(should_raise
, s
->reg_interrupt_enabled
,
365 s
->reg_interrupt_status
);
367 if (msi_enabled(d
)) {
369 trace_pvscsi_update_irq_msi();
370 msi_notify(d
, PVSCSI_VECTOR_COMPLETION
);
375 pci_set_irq(d
, !!should_raise
);
379 pvscsi_raise_completion_interrupt(PVSCSIState
*s
)
381 s
->reg_interrupt_status
|= PVSCSI_INTR_CMPL_0
;
383 /* Memory barrier to flush interrupt status register changes*/
386 pvscsi_update_irq_status(s
);
390 pvscsi_raise_message_interrupt(PVSCSIState
*s
)
392 s
->reg_interrupt_status
|= PVSCSI_INTR_MSG_0
;
394 /* Memory barrier to flush interrupt status register changes*/
397 pvscsi_update_irq_status(s
);
401 pvscsi_cmp_ring_put(PVSCSIState
*s
, struct PVSCSIRingCmpDesc
*cmp_desc
)
405 cmp_descr_pa
= pvscsi_ring_pop_cmp_descr(&s
->rings
);
406 trace_pvscsi_cmp_ring_put(cmp_descr_pa
);
407 cpu_physical_memory_write(cmp_descr_pa
, cmp_desc
, sizeof(*cmp_desc
));
411 pvscsi_msg_ring_put(PVSCSIState
*s
, struct PVSCSIRingMsgDesc
*msg_desc
)
415 msg_descr_pa
= pvscsi_ring_pop_msg_descr(&s
->rings
);
416 trace_pvscsi_msg_ring_put(msg_descr_pa
);
417 cpu_physical_memory_write(msg_descr_pa
, msg_desc
, sizeof(*msg_desc
));
421 pvscsi_process_completion_queue(void *opaque
)
423 PVSCSIState
*s
= opaque
;
424 PVSCSIRequest
*pvscsi_req
;
425 bool has_completed
= false;
427 while (!QTAILQ_EMPTY(&s
->completion_queue
)) {
428 pvscsi_req
= QTAILQ_FIRST(&s
->completion_queue
);
429 QTAILQ_REMOVE(&s
->completion_queue
, pvscsi_req
, next
);
430 pvscsi_cmp_ring_put(s
, &pvscsi_req
->cmp
);
432 has_completed
= true;
436 pvscsi_ring_flush_cmp(&s
->rings
);
437 pvscsi_raise_completion_interrupt(s
);
442 pvscsi_reset_adapter(PVSCSIState
*s
)
445 qbus_reset_all(BUS(&s
->bus
));
447 pvscsi_process_completion_queue(s
);
448 assert(QTAILQ_EMPTY(&s
->pending_queue
));
449 pvscsi_reset_state(s
);
453 pvscsi_schedule_completion_processing(PVSCSIState
*s
)
455 /* Try putting more complete requests on the ring. */
456 if (!QTAILQ_EMPTY(&s
->completion_queue
)) {
457 qemu_bh_schedule(s
->completion_worker
);
462 pvscsi_complete_request(PVSCSIState
*s
, PVSCSIRequest
*r
)
464 assert(!r
->completed
);
466 trace_pvscsi_complete_request(r
->cmp
.context
, r
->cmp
.dataLen
,
468 if (r
->sreq
!= NULL
) {
469 scsi_req_unref(r
->sreq
);
473 QTAILQ_REMOVE(&s
->pending_queue
, r
, next
);
474 QTAILQ_INSERT_TAIL(&s
->completion_queue
, r
, next
);
475 pvscsi_schedule_completion_processing(s
);
478 static QEMUSGList
*pvscsi_get_sg_list(SCSIRequest
*r
)
480 PVSCSIRequest
*req
= r
->hba_private
;
482 trace_pvscsi_get_sg_list(req
->sgl
.nsg
, req
->sgl
.size
);
488 pvscsi_get_next_sg_elem(PVSCSISGState
*sg
)
490 struct PVSCSISGElement elem
;
492 cpu_physical_memory_read(sg
->elemAddr
, &elem
, sizeof(elem
));
493 if ((elem
.flags
& ~PVSCSI_KNOWN_FLAGS
) != 0) {
495 * There is PVSCSI_SGE_FLAG_CHAIN_ELEMENT flag described in
496 * header file but its value is unknown. This flag requires
497 * additional processing, so we put warning here to catch it
498 * some day and make proper implementation
500 trace_pvscsi_get_next_sg_elem(elem
.flags
);
503 sg
->elemAddr
+= sizeof(elem
);
504 sg
->dataAddr
= elem
.addr
;
505 sg
->resid
= elem
.length
;
509 pvscsi_write_sense(PVSCSIRequest
*r
, uint8_t *sense
, int len
)
511 r
->cmp
.senseLen
= MIN(r
->req
.senseLen
, len
);
512 r
->sense_key
= sense
[(sense
[0] & 2) ? 1 : 2];
513 cpu_physical_memory_write(r
->req
.senseAddr
, sense
, r
->cmp
.senseLen
);
517 pvscsi_command_complete(SCSIRequest
*req
, uint32_t status
, size_t resid
)
519 PVSCSIRequest
*pvscsi_req
= req
->hba_private
;
523 trace_pvscsi_command_complete_not_found(req
->tag
);
529 /* Short transfer. */
530 trace_pvscsi_command_complete_data_run();
531 pvscsi_req
->cmp
.hostStatus
= BTSTAT_DATARUN
;
534 pvscsi_req
->cmp
.scsiStatus
= status
;
535 if (pvscsi_req
->cmp
.scsiStatus
== CHECK_CONDITION
) {
536 uint8_t sense
[SCSI_SENSE_BUF_SIZE
];
538 scsi_req_get_sense(pvscsi_req
->sreq
, sense
, sizeof(sense
));
540 trace_pvscsi_command_complete_sense_len(sense_len
);
541 pvscsi_write_sense(pvscsi_req
, sense
, sense_len
);
543 qemu_sglist_destroy(&pvscsi_req
->sgl
);
544 pvscsi_complete_request(s
, pvscsi_req
);
548 pvscsi_send_msg(PVSCSIState
*s
, SCSIDevice
*dev
, uint32_t msg_type
)
550 if (s
->msg_ring_info_valid
&& pvscsi_ring_msg_has_room(&s
->rings
)) {
551 PVSCSIMsgDescDevStatusChanged msg
= {0};
554 msg
.bus
= dev
->channel
;
555 msg
.target
= dev
->id
;
556 msg
.lun
[1] = dev
->lun
;
558 pvscsi_msg_ring_put(s
, (PVSCSIRingMsgDesc
*)&msg
);
559 pvscsi_ring_flush_msg(&s
->rings
);
560 pvscsi_raise_message_interrupt(s
);
565 pvscsi_hotplug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
, Error
**errp
)
567 PVSCSIState
*s
= PVSCSI(hotplug_dev
);
569 pvscsi_send_msg(s
, SCSI_DEVICE(dev
), PVSCSI_MSG_DEV_ADDED
);
573 pvscsi_hot_unplug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
, Error
**errp
)
575 PVSCSIState
*s
= PVSCSI(hotplug_dev
);
577 pvscsi_send_msg(s
, SCSI_DEVICE(dev
), PVSCSI_MSG_DEV_REMOVED
);
578 qdev_simple_device_unplug_cb(hotplug_dev
, dev
, errp
);
582 pvscsi_request_cancelled(SCSIRequest
*req
)
584 PVSCSIRequest
*pvscsi_req
= req
->hba_private
;
585 PVSCSIState
*s
= pvscsi_req
->dev
;
587 if (pvscsi_req
->completed
) {
591 if (pvscsi_req
->dev
->resetting
) {
592 pvscsi_req
->cmp
.hostStatus
= BTSTAT_BUSRESET
;
594 pvscsi_req
->cmp
.hostStatus
= BTSTAT_ABORTQUEUE
;
597 pvscsi_complete_request(s
, pvscsi_req
);
601 pvscsi_device_find(PVSCSIState
*s
, int channel
, int target
,
602 uint8_t *requested_lun
, uint8_t *target_lun
)
604 if (requested_lun
[0] || requested_lun
[2] || requested_lun
[3] ||
605 requested_lun
[4] || requested_lun
[5] || requested_lun
[6] ||
606 requested_lun
[7] || (target
> PVSCSI_MAX_DEVS
)) {
609 *target_lun
= requested_lun
[1];
610 return scsi_device_find(&s
->bus
, channel
, target
, *target_lun
);
614 static PVSCSIRequest
*
615 pvscsi_queue_pending_descriptor(PVSCSIState
*s
, SCSIDevice
**d
,
616 struct PVSCSIRingReqDesc
*descr
)
618 PVSCSIRequest
*pvscsi_req
;
621 pvscsi_req
= g_malloc0(sizeof(*pvscsi_req
));
623 pvscsi_req
->req
= *descr
;
624 pvscsi_req
->cmp
.context
= pvscsi_req
->req
.context
;
625 QTAILQ_INSERT_TAIL(&s
->pending_queue
, pvscsi_req
, next
);
627 *d
= pvscsi_device_find(s
, descr
->bus
, descr
->target
, descr
->lun
, &lun
);
629 pvscsi_req
->lun
= lun
;
636 pvscsi_convert_sglist(PVSCSIRequest
*r
)
638 uint32_t chunk_size
, elmcnt
= 0;
639 uint64_t data_length
= r
->req
.dataLen
;
640 PVSCSISGState sg
= r
->sg
;
641 while (data_length
&& elmcnt
< PVSCSI_MAX_SG_ELEM
) {
642 while (!sg
.resid
&& elmcnt
++ < PVSCSI_MAX_SG_ELEM
) {
643 pvscsi_get_next_sg_elem(&sg
);
644 trace_pvscsi_convert_sglist(r
->req
.context
, r
->sg
.dataAddr
,
647 chunk_size
= MIN(data_length
, sg
.resid
);
649 qemu_sglist_add(&r
->sgl
, sg
.dataAddr
, chunk_size
);
652 sg
.dataAddr
+= chunk_size
;
653 data_length
-= chunk_size
;
654 sg
.resid
-= chunk_size
;
659 pvscsi_build_sglist(PVSCSIState
*s
, PVSCSIRequest
*r
)
661 PCIDevice
*d
= PCI_DEVICE(s
);
663 pci_dma_sglist_init(&r
->sgl
, d
, 1);
664 if (r
->req
.flags
& PVSCSI_FLAG_CMD_WITH_SG_LIST
) {
665 pvscsi_convert_sglist(r
);
667 qemu_sglist_add(&r
->sgl
, r
->req
.dataAddr
, r
->req
.dataLen
);
672 pvscsi_process_request_descriptor(PVSCSIState
*s
,
673 struct PVSCSIRingReqDesc
*descr
)
676 PVSCSIRequest
*r
= pvscsi_queue_pending_descriptor(s
, &d
, descr
);
679 trace_pvscsi_process_req_descr(descr
->cdb
[0], descr
->context
);
682 r
->cmp
.hostStatus
= BTSTAT_SELTIMEO
;
683 trace_pvscsi_process_req_descr_unknown_device();
684 pvscsi_complete_request(s
, r
);
688 if (descr
->flags
& PVSCSI_FLAG_CMD_WITH_SG_LIST
) {
689 r
->sg
.elemAddr
= descr
->dataAddr
;
692 r
->sreq
= scsi_req_new(d
, descr
->context
, r
->lun
, descr
->cdb
, r
);
693 if (r
->sreq
->cmd
.mode
== SCSI_XFER_FROM_DEV
&&
694 (descr
->flags
& PVSCSI_FLAG_CMD_DIR_TODEVICE
)) {
695 r
->cmp
.hostStatus
= BTSTAT_BADMSG
;
696 trace_pvscsi_process_req_descr_invalid_dir();
697 scsi_req_cancel(r
->sreq
);
700 if (r
->sreq
->cmd
.mode
== SCSI_XFER_TO_DEV
&&
701 (descr
->flags
& PVSCSI_FLAG_CMD_DIR_TOHOST
)) {
702 r
->cmp
.hostStatus
= BTSTAT_BADMSG
;
703 trace_pvscsi_process_req_descr_invalid_dir();
704 scsi_req_cancel(r
->sreq
);
708 pvscsi_build_sglist(s
, r
);
709 n
= scsi_req_enqueue(r
->sreq
);
712 scsi_req_continue(r
->sreq
);
717 pvscsi_process_io(PVSCSIState
*s
)
719 PVSCSIRingReqDesc descr
;
720 hwaddr next_descr_pa
;
722 assert(s
->rings_info_valid
);
723 while ((next_descr_pa
= pvscsi_ring_pop_req_descr(&s
->rings
)) != 0) {
725 /* Only read after production index verification */
728 trace_pvscsi_process_io(next_descr_pa
);
729 cpu_physical_memory_read(next_descr_pa
, &descr
, sizeof(descr
));
730 pvscsi_process_request_descriptor(s
, &descr
);
733 pvscsi_ring_flush_req(&s
->rings
);
737 pvscsi_dbg_dump_tx_rings_config(PVSCSICmdDescSetupRings
*rc
)
740 trace_pvscsi_tx_rings_ppn("Rings State", rc
->ringsStatePPN
);
742 trace_pvscsi_tx_rings_num_pages("Request Ring", rc
->reqRingNumPages
);
743 for (i
= 0; i
< rc
->reqRingNumPages
; i
++) {
744 trace_pvscsi_tx_rings_ppn("Request Ring", rc
->reqRingPPNs
[i
]);
747 trace_pvscsi_tx_rings_num_pages("Confirm Ring", rc
->cmpRingNumPages
);
748 for (i
= 0; i
< rc
->cmpRingNumPages
; i
++) {
749 trace_pvscsi_tx_rings_ppn("Confirm Ring", rc
->cmpRingPPNs
[i
]);
754 pvscsi_on_cmd_config(PVSCSIState
*s
)
756 trace_pvscsi_on_cmd_noimpl("PVSCSI_CMD_CONFIG");
757 return PVSCSI_COMMAND_PROCESSING_FAILED
;
761 pvscsi_on_cmd_unplug(PVSCSIState
*s
)
763 trace_pvscsi_on_cmd_noimpl("PVSCSI_CMD_DEVICE_UNPLUG");
764 return PVSCSI_COMMAND_PROCESSING_FAILED
;
768 pvscsi_on_issue_scsi(PVSCSIState
*s
)
770 trace_pvscsi_on_cmd_noimpl("PVSCSI_CMD_ISSUE_SCSI");
771 return PVSCSI_COMMAND_PROCESSING_FAILED
;
775 pvscsi_on_cmd_setup_rings(PVSCSIState
*s
)
777 PVSCSICmdDescSetupRings
*rc
=
778 (PVSCSICmdDescSetupRings
*) s
->curr_cmd_data
;
780 trace_pvscsi_on_cmd_arrived("PVSCSI_CMD_SETUP_RINGS");
782 if (!rc
->reqRingNumPages
783 || rc
->reqRingNumPages
> PVSCSI_SETUP_RINGS_MAX_NUM_PAGES
784 || !rc
->cmpRingNumPages
785 || rc
->cmpRingNumPages
> PVSCSI_SETUP_RINGS_MAX_NUM_PAGES
) {
786 return PVSCSI_COMMAND_PROCESSING_FAILED
;
789 pvscsi_dbg_dump_tx_rings_config(rc
);
790 pvscsi_ring_init_data(&s
->rings
, rc
);
792 s
->rings_info_valid
= TRUE
;
793 return PVSCSI_COMMAND_PROCESSING_SUCCEEDED
;
797 pvscsi_on_cmd_abort(PVSCSIState
*s
)
799 PVSCSICmdDescAbortCmd
*cmd
= (PVSCSICmdDescAbortCmd
*) s
->curr_cmd_data
;
800 PVSCSIRequest
*r
, *next
;
802 trace_pvscsi_on_cmd_abort(cmd
->context
, cmd
->target
);
804 QTAILQ_FOREACH_SAFE(r
, &s
->pending_queue
, next
, next
) {
805 if (r
->req
.context
== cmd
->context
) {
810 assert(!r
->completed
);
811 r
->cmp
.hostStatus
= BTSTAT_ABORTQUEUE
;
812 scsi_req_cancel(r
->sreq
);
815 return PVSCSI_COMMAND_PROCESSING_SUCCEEDED
;
819 pvscsi_on_cmd_unknown(PVSCSIState
*s
)
821 trace_pvscsi_on_cmd_unknown_data(s
->curr_cmd_data
[0]);
822 return PVSCSI_COMMAND_PROCESSING_FAILED
;
826 pvscsi_on_cmd_reset_device(PVSCSIState
*s
)
828 uint8_t target_lun
= 0;
829 struct PVSCSICmdDescResetDevice
*cmd
=
830 (struct PVSCSICmdDescResetDevice
*) s
->curr_cmd_data
;
833 sdev
= pvscsi_device_find(s
, 0, cmd
->target
, cmd
->lun
, &target_lun
);
835 trace_pvscsi_on_cmd_reset_dev(cmd
->target
, (int) target_lun
, sdev
);
839 device_legacy_reset(&sdev
->qdev
);
841 return PVSCSI_COMMAND_PROCESSING_SUCCEEDED
;
844 return PVSCSI_COMMAND_PROCESSING_FAILED
;
848 pvscsi_on_cmd_reset_bus(PVSCSIState
*s
)
850 trace_pvscsi_on_cmd_arrived("PVSCSI_CMD_RESET_BUS");
853 qbus_reset_all(BUS(&s
->bus
));
855 return PVSCSI_COMMAND_PROCESSING_SUCCEEDED
;
859 pvscsi_on_cmd_setup_msg_ring(PVSCSIState
*s
)
861 PVSCSICmdDescSetupMsgRing
*rc
=
862 (PVSCSICmdDescSetupMsgRing
*) s
->curr_cmd_data
;
864 trace_pvscsi_on_cmd_arrived("PVSCSI_CMD_SETUP_MSG_RING");
867 return PVSCSI_COMMAND_PROCESSING_FAILED
;
870 if (s
->rings_info_valid
) {
871 if (pvscsi_ring_init_msg(&s
->rings
, rc
) < 0) {
872 return PVSCSI_COMMAND_PROCESSING_FAILED
;
874 s
->msg_ring_info_valid
= TRUE
;
876 return sizeof(PVSCSICmdDescSetupMsgRing
) / sizeof(uint32_t);
880 pvscsi_on_cmd_adapter_reset(PVSCSIState
*s
)
882 trace_pvscsi_on_cmd_arrived("PVSCSI_CMD_ADAPTER_RESET");
884 pvscsi_reset_adapter(s
);
885 return PVSCSI_COMMAND_PROCESSING_SUCCEEDED
;
888 static const struct {
890 uint64_t (*handler_fn
)(PVSCSIState
*s
);
891 } pvscsi_commands
[] = {
892 [PVSCSI_CMD_FIRST
] = {
894 .handler_fn
= pvscsi_on_cmd_unknown
,
897 /* Not implemented, data size defined based on what arrives on windows */
898 [PVSCSI_CMD_CONFIG
] = {
899 .data_size
= 6 * sizeof(uint32_t),
900 .handler_fn
= pvscsi_on_cmd_config
,
903 /* Command not implemented, data size is unknown */
904 [PVSCSI_CMD_ISSUE_SCSI
] = {
906 .handler_fn
= pvscsi_on_issue_scsi
,
909 /* Command not implemented, data size is unknown */
910 [PVSCSI_CMD_DEVICE_UNPLUG
] = {
912 .handler_fn
= pvscsi_on_cmd_unplug
,
915 [PVSCSI_CMD_SETUP_RINGS
] = {
916 .data_size
= sizeof(PVSCSICmdDescSetupRings
),
917 .handler_fn
= pvscsi_on_cmd_setup_rings
,
920 [PVSCSI_CMD_RESET_DEVICE
] = {
921 .data_size
= sizeof(struct PVSCSICmdDescResetDevice
),
922 .handler_fn
= pvscsi_on_cmd_reset_device
,
925 [PVSCSI_CMD_RESET_BUS
] = {
927 .handler_fn
= pvscsi_on_cmd_reset_bus
,
930 [PVSCSI_CMD_SETUP_MSG_RING
] = {
931 .data_size
= sizeof(PVSCSICmdDescSetupMsgRing
),
932 .handler_fn
= pvscsi_on_cmd_setup_msg_ring
,
935 [PVSCSI_CMD_ADAPTER_RESET
] = {
937 .handler_fn
= pvscsi_on_cmd_adapter_reset
,
940 [PVSCSI_CMD_ABORT_CMD
] = {
941 .data_size
= sizeof(struct PVSCSICmdDescAbortCmd
),
942 .handler_fn
= pvscsi_on_cmd_abort
,
947 pvscsi_do_command_processing(PVSCSIState
*s
)
949 size_t bytes_arrived
= s
->curr_cmd_data_cntr
* sizeof(uint32_t);
951 assert(s
->curr_cmd
< PVSCSI_CMD_LAST
);
952 if (bytes_arrived
>= pvscsi_commands
[s
->curr_cmd
].data_size
) {
953 s
->reg_command_status
= pvscsi_commands
[s
->curr_cmd
].handler_fn(s
);
954 s
->curr_cmd
= PVSCSI_CMD_FIRST
;
955 s
->curr_cmd_data_cntr
= 0;
960 pvscsi_on_command_data(PVSCSIState
*s
, uint32_t value
)
962 size_t bytes_arrived
= s
->curr_cmd_data_cntr
* sizeof(uint32_t);
964 assert(bytes_arrived
< sizeof(s
->curr_cmd_data
));
965 s
->curr_cmd_data
[s
->curr_cmd_data_cntr
++] = value
;
967 pvscsi_do_command_processing(s
);
971 pvscsi_on_command(PVSCSIState
*s
, uint64_t cmd_id
)
973 if ((cmd_id
> PVSCSI_CMD_FIRST
) && (cmd_id
< PVSCSI_CMD_LAST
)) {
974 s
->curr_cmd
= cmd_id
;
976 s
->curr_cmd
= PVSCSI_CMD_FIRST
;
977 trace_pvscsi_on_cmd_unknown(cmd_id
);
980 s
->curr_cmd_data_cntr
= 0;
981 s
->reg_command_status
= PVSCSI_COMMAND_NOT_ENOUGH_DATA
;
983 pvscsi_do_command_processing(s
);
987 pvscsi_io_write(void *opaque
, hwaddr addr
,
988 uint64_t val
, unsigned size
)
990 PVSCSIState
*s
= opaque
;
993 case PVSCSI_REG_OFFSET_COMMAND
:
994 pvscsi_on_command(s
, val
);
997 case PVSCSI_REG_OFFSET_COMMAND_DATA
:
998 pvscsi_on_command_data(s
, (uint32_t) val
);
1001 case PVSCSI_REG_OFFSET_INTR_STATUS
:
1002 trace_pvscsi_io_write("PVSCSI_REG_OFFSET_INTR_STATUS", val
);
1003 s
->reg_interrupt_status
&= ~val
;
1004 pvscsi_update_irq_status(s
);
1005 pvscsi_schedule_completion_processing(s
);
1008 case PVSCSI_REG_OFFSET_INTR_MASK
:
1009 trace_pvscsi_io_write("PVSCSI_REG_OFFSET_INTR_MASK", val
);
1010 s
->reg_interrupt_enabled
= val
;
1011 pvscsi_update_irq_status(s
);
1014 case PVSCSI_REG_OFFSET_KICK_NON_RW_IO
:
1015 trace_pvscsi_io_write("PVSCSI_REG_OFFSET_KICK_NON_RW_IO", val
);
1016 pvscsi_process_io(s
);
1019 case PVSCSI_REG_OFFSET_KICK_RW_IO
:
1020 trace_pvscsi_io_write("PVSCSI_REG_OFFSET_KICK_RW_IO", val
);
1021 pvscsi_process_io(s
);
1024 case PVSCSI_REG_OFFSET_DEBUG
:
1025 trace_pvscsi_io_write("PVSCSI_REG_OFFSET_DEBUG", val
);
1029 trace_pvscsi_io_write_unknown(addr
, size
, val
);
1036 pvscsi_io_read(void *opaque
, hwaddr addr
, unsigned size
)
1038 PVSCSIState
*s
= opaque
;
1041 case PVSCSI_REG_OFFSET_INTR_STATUS
:
1042 trace_pvscsi_io_read("PVSCSI_REG_OFFSET_INTR_STATUS",
1043 s
->reg_interrupt_status
);
1044 return s
->reg_interrupt_status
;
1046 case PVSCSI_REG_OFFSET_INTR_MASK
:
1047 trace_pvscsi_io_read("PVSCSI_REG_OFFSET_INTR_MASK",
1048 s
->reg_interrupt_status
);
1049 return s
->reg_interrupt_enabled
;
1051 case PVSCSI_REG_OFFSET_COMMAND_STATUS
:
1052 trace_pvscsi_io_read("PVSCSI_REG_OFFSET_COMMAND_STATUS",
1053 s
->reg_interrupt_status
);
1054 return s
->reg_command_status
;
1057 trace_pvscsi_io_read_unknown(addr
, size
);
1064 pvscsi_init_msi(PVSCSIState
*s
)
1067 PCIDevice
*d
= PCI_DEVICE(s
);
1069 res
= msi_init(d
, PVSCSI_MSI_OFFSET(s
), PVSCSI_MSIX_NUM_VECTORS
,
1070 PVSCSI_USE_64BIT
, PVSCSI_PER_VECTOR_MASK
, NULL
);
1072 trace_pvscsi_init_msi_fail(res
);
1073 s
->msi_used
= false;
1080 pvscsi_cleanup_msi(PVSCSIState
*s
)
1082 PCIDevice
*d
= PCI_DEVICE(s
);
1087 static const MemoryRegionOps pvscsi_ops
= {
1088 .read
= pvscsi_io_read
,
1089 .write
= pvscsi_io_write
,
1090 .endianness
= DEVICE_LITTLE_ENDIAN
,
1092 .min_access_size
= 4,
1093 .max_access_size
= 4,
1097 static const struct SCSIBusInfo pvscsi_scsi_info
= {
1099 .max_target
= PVSCSI_MAX_DEVS
,
1103 .get_sg_list
= pvscsi_get_sg_list
,
1104 .complete
= pvscsi_command_complete
,
1105 .cancel
= pvscsi_request_cancelled
,
1109 pvscsi_realizefn(PCIDevice
*pci_dev
, Error
**errp
)
1111 PVSCSIState
*s
= PVSCSI(pci_dev
);
1113 trace_pvscsi_state("init");
1115 /* PCI subsystem ID, subsystem vendor ID, revision */
1116 if (PVSCSI_USE_OLD_PCI_CONFIGURATION(s
)) {
1117 pci_set_word(pci_dev
->config
+ PCI_SUBSYSTEM_ID
, 0x1000);
1119 pci_set_word(pci_dev
->config
+ PCI_SUBSYSTEM_VENDOR_ID
,
1120 PCI_VENDOR_ID_VMWARE
);
1121 pci_set_word(pci_dev
->config
+ PCI_SUBSYSTEM_ID
,
1122 PCI_DEVICE_ID_VMWARE_PVSCSI
);
1123 pci_config_set_revision(pci_dev
->config
, 0x2);
1126 /* PCI latency timer = 255 */
1127 pci_dev
->config
[PCI_LATENCY_TIMER
] = 0xff;
1129 /* Interrupt pin A */
1130 pci_config_set_interrupt_pin(pci_dev
->config
, 1);
1132 memory_region_init_io(&s
->io_space
, OBJECT(s
), &pvscsi_ops
, s
,
1133 "pvscsi-io", PVSCSI_MEM_SPACE_SIZE
);
1134 pci_register_bar(pci_dev
, 0, PCI_BASE_ADDRESS_SPACE_MEMORY
, &s
->io_space
);
1138 if (pci_is_express(pci_dev
) && pci_bus_is_express(pci_get_bus(pci_dev
))) {
1139 pcie_endpoint_cap_init(pci_dev
, PVSCSI_EXP_EP_OFFSET
);
1142 s
->completion_worker
= qemu_bh_new(pvscsi_process_completion_queue
, s
);
1144 scsi_bus_new(&s
->bus
, sizeof(s
->bus
), DEVICE(pci_dev
),
1145 &pvscsi_scsi_info
, NULL
);
1146 /* override default SCSI bus hotplug-handler, with pvscsi's one */
1147 qbus_set_hotplug_handler(BUS(&s
->bus
), OBJECT(s
), &error_abort
);
1148 pvscsi_reset_state(s
);
1152 pvscsi_uninit(PCIDevice
*pci_dev
)
1154 PVSCSIState
*s
= PVSCSI(pci_dev
);
1156 trace_pvscsi_state("uninit");
1157 qemu_bh_delete(s
->completion_worker
);
1159 pvscsi_cleanup_msi(s
);
1163 pvscsi_reset(DeviceState
*dev
)
1165 PCIDevice
*d
= PCI_DEVICE(dev
);
1166 PVSCSIState
*s
= PVSCSI(d
);
1168 trace_pvscsi_state("reset");
1169 pvscsi_reset_adapter(s
);
1173 pvscsi_pre_save(void *opaque
)
1175 PVSCSIState
*s
= (PVSCSIState
*) opaque
;
1177 trace_pvscsi_state("presave");
1179 assert(QTAILQ_EMPTY(&s
->pending_queue
));
1180 assert(QTAILQ_EMPTY(&s
->completion_queue
));
1186 pvscsi_post_load(void *opaque
, int version_id
)
1188 trace_pvscsi_state("postload");
1192 static bool pvscsi_vmstate_need_pcie_device(void *opaque
)
1194 PVSCSIState
*s
= PVSCSI(opaque
);
1196 return !(s
->compat_flags
& PVSCSI_COMPAT_DISABLE_PCIE
);
1199 static bool pvscsi_vmstate_test_pci_device(void *opaque
, int version_id
)
1201 return !pvscsi_vmstate_need_pcie_device(opaque
);
1204 static const VMStateDescription vmstate_pvscsi_pcie_device
= {
1205 .name
= "pvscsi/pcie",
1206 .needed
= pvscsi_vmstate_need_pcie_device
,
1207 .fields
= (VMStateField
[]) {
1208 VMSTATE_PCI_DEVICE(parent_obj
, PVSCSIState
),
1209 VMSTATE_END_OF_LIST()
1213 static const VMStateDescription vmstate_pvscsi
= {
1216 .minimum_version_id
= 0,
1217 .pre_save
= pvscsi_pre_save
,
1218 .post_load
= pvscsi_post_load
,
1219 .fields
= (VMStateField
[]) {
1220 VMSTATE_STRUCT_TEST(parent_obj
, PVSCSIState
,
1221 pvscsi_vmstate_test_pci_device
, 0,
1222 vmstate_pci_device
, PCIDevice
),
1223 VMSTATE_UINT8(msi_used
, PVSCSIState
),
1224 VMSTATE_UINT32(resetting
, PVSCSIState
),
1225 VMSTATE_UINT64(reg_interrupt_status
, PVSCSIState
),
1226 VMSTATE_UINT64(reg_interrupt_enabled
, PVSCSIState
),
1227 VMSTATE_UINT64(reg_command_status
, PVSCSIState
),
1228 VMSTATE_UINT64(curr_cmd
, PVSCSIState
),
1229 VMSTATE_UINT32(curr_cmd_data_cntr
, PVSCSIState
),
1230 VMSTATE_UINT32_ARRAY(curr_cmd_data
, PVSCSIState
,
1231 ARRAY_SIZE(((PVSCSIState
*)NULL
)->curr_cmd_data
)),
1232 VMSTATE_UINT8(rings_info_valid
, PVSCSIState
),
1233 VMSTATE_UINT8(msg_ring_info_valid
, PVSCSIState
),
1234 VMSTATE_UINT8(use_msg
, PVSCSIState
),
1236 VMSTATE_UINT64(rings
.rs_pa
, PVSCSIState
),
1237 VMSTATE_UINT32(rings
.txr_len_mask
, PVSCSIState
),
1238 VMSTATE_UINT32(rings
.rxr_len_mask
, PVSCSIState
),
1239 VMSTATE_UINT64_ARRAY(rings
.req_ring_pages_pa
, PVSCSIState
,
1240 PVSCSI_SETUP_RINGS_MAX_NUM_PAGES
),
1241 VMSTATE_UINT64_ARRAY(rings
.cmp_ring_pages_pa
, PVSCSIState
,
1242 PVSCSI_SETUP_RINGS_MAX_NUM_PAGES
),
1243 VMSTATE_UINT64(rings
.consumed_ptr
, PVSCSIState
),
1244 VMSTATE_UINT64(rings
.filled_cmp_ptr
, PVSCSIState
),
1246 VMSTATE_END_OF_LIST()
1248 .subsections
= (const VMStateDescription
*[]) {
1249 &vmstate_pvscsi_pcie_device
,
1254 static Property pvscsi_properties
[] = {
1255 DEFINE_PROP_UINT8("use_msg", PVSCSIState
, use_msg
, 1),
1256 DEFINE_PROP_BIT("x-old-pci-configuration", PVSCSIState
, compat_flags
,
1257 PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT
, false),
1258 DEFINE_PROP_BIT("x-disable-pcie", PVSCSIState
, compat_flags
,
1259 PVSCSI_COMPAT_DISABLE_PCIE_BIT
, false),
1260 DEFINE_PROP_END_OF_LIST(),
1263 static void pvscsi_realize(DeviceState
*qdev
, Error
**errp
)
1265 PVSCSIClass
*pvs_c
= PVSCSI_DEVICE_GET_CLASS(qdev
);
1266 PCIDevice
*pci_dev
= PCI_DEVICE(qdev
);
1267 PVSCSIState
*s
= PVSCSI(qdev
);
1269 if (!(s
->compat_flags
& PVSCSI_COMPAT_DISABLE_PCIE
)) {
1270 pci_dev
->cap_present
|= QEMU_PCI_CAP_EXPRESS
;
1273 pvs_c
->parent_dc_realize(qdev
, errp
);
1276 static void pvscsi_class_init(ObjectClass
*klass
, void *data
)
1278 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1279 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
1280 PVSCSIClass
*pvs_k
= PVSCSI_DEVICE_CLASS(klass
);
1281 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(klass
);
1283 k
->realize
= pvscsi_realizefn
;
1284 k
->exit
= pvscsi_uninit
;
1285 k
->vendor_id
= PCI_VENDOR_ID_VMWARE
;
1286 k
->device_id
= PCI_DEVICE_ID_VMWARE_PVSCSI
;
1287 k
->class_id
= PCI_CLASS_STORAGE_SCSI
;
1288 k
->subsystem_id
= 0x1000;
1289 device_class_set_parent_realize(dc
, pvscsi_realize
,
1290 &pvs_k
->parent_dc_realize
);
1291 dc
->reset
= pvscsi_reset
;
1292 dc
->vmsd
= &vmstate_pvscsi
;
1293 device_class_set_props(dc
, pvscsi_properties
);
1294 set_bit(DEVICE_CATEGORY_STORAGE
, dc
->categories
);
1295 hc
->unplug
= pvscsi_hot_unplug
;
1296 hc
->plug
= pvscsi_hotplug
;
1299 static const TypeInfo pvscsi_info
= {
1300 .name
= TYPE_PVSCSI
,
1301 .parent
= TYPE_PCI_DEVICE
,
1302 .class_size
= sizeof(PVSCSIClass
),
1303 .instance_size
= sizeof(PVSCSIState
),
1304 .class_init
= pvscsi_class_init
,
1305 .interfaces
= (InterfaceInfo
[]) {
1306 { TYPE_HOTPLUG_HANDLER
},
1307 { INTERFACE_PCIE_DEVICE
},
1308 { INTERFACE_CONVENTIONAL_PCI_DEVICE
},
1314 pvscsi_register_types(void)
1316 type_register_static(&pvscsi_info
);
1319 type_init(pvscsi_register_types
);