2 * PXA270-based Clamshell PDA platforms.
4 * Copyright (c) 2006 Openedhand Ltd.
5 * Written by Andrzej Zaborowski <balrog@zabor.org>
7 * This code is licensed under the GNU GPL v2.
18 #include "qemu-timer.h"
23 #include "audio/audio.h"
29 #define REG_FMT "0x%02lx"
32 #define FLASH_BASE 0x0c000000
33 #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */
34 #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */
35 #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */
36 #define FLASH_ECCCNTR 0x0c /* ECC byte counter */
37 #define FLASH_ECCCLRR 0x10 /* Clear ECC */
38 #define FLASH_FLASHIO 0x14 /* Flash I/O */
39 #define FLASH_FLASHCTL 0x18 /* Flash Control */
41 #define FLASHCTL_CE0 (1 << 0)
42 #define FLASHCTL_CLE (1 << 1)
43 #define FLASHCTL_ALE (1 << 2)
44 #define FLASHCTL_WP (1 << 3)
45 #define FLASHCTL_CE1 (1 << 4)
46 #define FLASHCTL_RYBY (1 << 5)
47 #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
58 static uint32_t sl_readb(void *opaque
, target_phys_addr_t addr
)
60 SLNANDState
*s
= (SLNANDState
*) opaque
;
64 #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
66 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
67 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
69 #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to))
71 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
72 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
78 return s
->ecc
.count
& 0xff;
81 nand_getpins(s
->nand
, &ryby
);
83 return s
->ctl
| FLASHCTL_RYBY
;
88 return ecc_digest(&s
->ecc
, nand_getio(s
->nand
));
91 zaurus_printf("Bad register offset " REG_FMT
"\n", (unsigned long)addr
);
96 static uint32_t sl_readl(void *opaque
, target_phys_addr_t addr
)
98 SLNANDState
*s
= (SLNANDState
*) opaque
;
100 if (addr
== FLASH_FLASHIO
)
101 return ecc_digest(&s
->ecc
, nand_getio(s
->nand
)) |
102 (ecc_digest(&s
->ecc
, nand_getio(s
->nand
)) << 16);
104 return sl_readb(opaque
, addr
);
107 static void sl_writeb(void *opaque
, target_phys_addr_t addr
,
110 SLNANDState
*s
= (SLNANDState
*) opaque
;
114 /* Value is ignored. */
119 s
->ctl
= value
& 0xff & ~FLASHCTL_RYBY
;
120 nand_setpins(s
->nand
,
121 s
->ctl
& FLASHCTL_CLE
,
122 s
->ctl
& FLASHCTL_ALE
,
123 s
->ctl
& FLASHCTL_NCE
,
124 s
->ctl
& FLASHCTL_WP
,
129 nand_setio(s
->nand
, ecc_digest(&s
->ecc
, value
& 0xff));
133 zaurus_printf("Bad register offset " REG_FMT
"\n", (unsigned long)addr
);
142 static CPUReadMemoryFunc
* const sl_readfn
[] = {
147 static CPUWriteMemoryFunc
* const sl_writefn
[] = {
153 static void sl_flash_register(PXA2xxState
*cpu
, int size
)
157 dev
= qdev_create(NULL
, "sl-nand");
159 qdev_prop_set_uint8(dev
, "manf_id", NAND_MFR_SAMSUNG
);
160 if (size
== FLASH_128M
)
161 qdev_prop_set_uint8(dev
, "chip_id", 0x73);
162 else if (size
== FLASH_1024M
)
163 qdev_prop_set_uint8(dev
, "chip_id", 0xf1);
165 qdev_init_nofail(dev
);
166 sysbus_mmio_map(sysbus_from_qdev(dev
), 0, FLASH_BASE
);
169 static int sl_nand_init(SysBusDevice
*dev
) {
173 s
= FROM_SYSBUS(SLNANDState
, dev
);
176 s
->nand
= nand_init(s
->manf_id
, s
->chip_id
);
178 iomemtype
= cpu_register_io_memory(sl_readfn
,
179 sl_writefn
, s
, DEVICE_NATIVE_ENDIAN
);
181 sysbus_init_mmio(dev
, 0x40, iomemtype
);
188 #define SPITZ_KEY_STROBE_NUM 11
189 #define SPITZ_KEY_SENSE_NUM 7
191 static const int spitz_gpio_key_sense
[SPITZ_KEY_SENSE_NUM
] = {
192 12, 17, 91, 34, 36, 38, 39
195 static const int spitz_gpio_key_strobe
[SPITZ_KEY_STROBE_NUM
] = {
196 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
199 /* Eighth additional row maps the special keys */
200 static int spitz_keymap
[SPITZ_KEY_SENSE_NUM
+ 1][SPITZ_KEY_STROBE_NUM
] = {
201 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
202 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
203 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 },
204 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 },
205 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 },
206 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 },
207 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 },
208 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 },
211 #define SPITZ_GPIO_AK_INT 13 /* Remote control */
212 #define SPITZ_GPIO_SYNC 16 /* Sync button */
213 #define SPITZ_GPIO_ON_KEY 95 /* Power button */
214 #define SPITZ_GPIO_SWA 97 /* Lid */
215 #define SPITZ_GPIO_SWB 96 /* Tablet mode */
217 /* The special buttons are mapped to unused keys */
218 static const int spitz_gpiomap
[5] = {
219 SPITZ_GPIO_AK_INT
, SPITZ_GPIO_SYNC
, SPITZ_GPIO_ON_KEY
,
220 SPITZ_GPIO_SWA
, SPITZ_GPIO_SWB
,
222 static int spitz_gpio_invert
[5] = { 0, 0, 0, 0, 0, };
225 qemu_irq sense
[SPITZ_KEY_SENSE_NUM
];
229 uint16_t keyrow
[SPITZ_KEY_SENSE_NUM
];
230 uint16_t strobe_state
;
231 uint16_t sense_state
;
233 uint16_t pre_map
[0x100];
237 int fifopos
, fifolen
;
239 } SpitzKeyboardState
;
241 static void spitz_keyboard_sense_update(SpitzKeyboardState
*s
)
244 uint16_t strobe
, sense
= 0;
245 for (i
= 0; i
< SPITZ_KEY_SENSE_NUM
; i
++) {
246 strobe
= s
->keyrow
[i
] & s
->strobe_state
;
249 if (!(s
->sense_state
& (1 << i
)))
250 qemu_irq_raise(s
->sense
[i
]);
251 } else if (s
->sense_state
& (1 << i
))
252 qemu_irq_lower(s
->sense
[i
]);
255 s
->sense_state
= sense
;
258 static void spitz_keyboard_strobe(void *opaque
, int line
, int level
)
260 SpitzKeyboardState
*s
= (SpitzKeyboardState
*) opaque
;
263 s
->strobe_state
|= 1 << line
;
265 s
->strobe_state
&= ~(1 << line
);
266 spitz_keyboard_sense_update(s
);
269 static void spitz_keyboard_keydown(SpitzKeyboardState
*s
, int keycode
)
271 int spitz_keycode
= s
->keymap
[keycode
& 0x7f];
272 if (spitz_keycode
== -1)
275 /* Handle the additional keys */
276 if ((spitz_keycode
>> 4) == SPITZ_KEY_SENSE_NUM
) {
277 qemu_set_irq(s
->gpiomap
[spitz_keycode
& 0xf], (keycode
< 0x80) ^
278 spitz_gpio_invert
[spitz_keycode
& 0xf]);
283 s
->keyrow
[spitz_keycode
>> 4] &= ~(1 << (spitz_keycode
& 0xf));
285 s
->keyrow
[spitz_keycode
>> 4] |= 1 << (spitz_keycode
& 0xf);
287 spitz_keyboard_sense_update(s
);
290 #define SHIFT (1 << 7)
291 #define CTRL (1 << 8)
294 #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
296 static void spitz_keyboard_handler(SpitzKeyboardState
*s
, int keycode
)
301 case 0x2a: /* Left Shift */
307 case 0x36: /* Right Shift */
313 case 0x1d: /* Control */
327 code
= s
->pre_map
[mapcode
= ((s
->modifiers
& 3) ?
329 (keycode
& ~SHIFT
))];
331 if (code
!= mapcode
) {
333 if ((code
& SHIFT
) && !(s
->modifiers
& 1))
334 QUEUE_KEY(0x2a | (keycode
& 0x80));
335 if ((code
& CTRL
) && !(s
->modifiers
& 4))
336 QUEUE_KEY(0x1d | (keycode
& 0x80));
337 if ((code
& FN
) && !(s
->modifiers
& 8))
338 QUEUE_KEY(0x38 | (keycode
& 0x80));
339 if ((code
& FN
) && (s
->modifiers
& 1))
340 QUEUE_KEY(0x2a | (~keycode
& 0x80));
341 if ((code
& FN
) && (s
->modifiers
& 2))
342 QUEUE_KEY(0x36 | (~keycode
& 0x80));
344 if (keycode
& 0x80) {
345 if ((s
->imodifiers
& 1 ) && !(s
->modifiers
& 1))
346 QUEUE_KEY(0x2a | 0x80);
347 if ((s
->imodifiers
& 4 ) && !(s
->modifiers
& 4))
348 QUEUE_KEY(0x1d | 0x80);
349 if ((s
->imodifiers
& 8 ) && !(s
->modifiers
& 8))
350 QUEUE_KEY(0x38 | 0x80);
351 if ((s
->imodifiers
& 0x10) && (s
->modifiers
& 1))
353 if ((s
->imodifiers
& 0x20) && (s
->modifiers
& 2))
357 if ((code
& SHIFT
) && !((s
->modifiers
| s
->imodifiers
) & 1)) {
361 if ((code
& CTRL
) && !((s
->modifiers
| s
->imodifiers
) & 4)) {
365 if ((code
& FN
) && !((s
->modifiers
| s
->imodifiers
) & 8)) {
369 if ((code
& FN
) && (s
->modifiers
& 1) &&
370 !(s
->imodifiers
& 0x10)) {
371 QUEUE_KEY(0x2a | 0x80);
372 s
->imodifiers
|= 0x10;
374 if ((code
& FN
) && (s
->modifiers
& 2) &&
375 !(s
->imodifiers
& 0x20)) {
376 QUEUE_KEY(0x36 | 0x80);
377 s
->imodifiers
|= 0x20;
383 QUEUE_KEY((code
& 0x7f) | (keycode
& 0x80));
386 static void spitz_keyboard_tick(void *opaque
)
388 SpitzKeyboardState
*s
= (SpitzKeyboardState
*) opaque
;
391 spitz_keyboard_keydown(s
, s
->fifo
[s
->fifopos
++]);
393 if (s
->fifopos
>= 16)
397 qemu_mod_timer(s
->kbdtimer
, qemu_get_clock(vm_clock
) +
398 get_ticks_per_sec() / 32);
401 static void spitz_keyboard_pre_map(SpitzKeyboardState
*s
)
404 for (i
= 0; i
< 0x100; i
++)
406 s
->pre_map
[0x02 | SHIFT
] = 0x02 | SHIFT
; /* exclam */
407 s
->pre_map
[0x28 | SHIFT
] = 0x03 | SHIFT
; /* quotedbl */
408 s
->pre_map
[0x04 | SHIFT
] = 0x04 | SHIFT
; /* numbersign */
409 s
->pre_map
[0x05 | SHIFT
] = 0x05 | SHIFT
; /* dollar */
410 s
->pre_map
[0x06 | SHIFT
] = 0x06 | SHIFT
; /* percent */
411 s
->pre_map
[0x08 | SHIFT
] = 0x07 | SHIFT
; /* ampersand */
412 s
->pre_map
[0x28 ] = 0x08 | SHIFT
; /* apostrophe */
413 s
->pre_map
[0x0a | SHIFT
] = 0x09 | SHIFT
; /* parenleft */
414 s
->pre_map
[0x0b | SHIFT
] = 0x0a | SHIFT
; /* parenright */
415 s
->pre_map
[0x29 | SHIFT
] = 0x0b | SHIFT
; /* asciitilde */
416 s
->pre_map
[0x03 | SHIFT
] = 0x0c | SHIFT
; /* at */
417 s
->pre_map
[0xd3 ] = 0x0e | FN
; /* Delete */
418 s
->pre_map
[0x3a ] = 0x0f | FN
; /* Caps_Lock */
419 s
->pre_map
[0x07 | SHIFT
] = 0x11 | FN
; /* asciicircum */
420 s
->pre_map
[0x0d ] = 0x12 | FN
; /* equal */
421 s
->pre_map
[0x0d | SHIFT
] = 0x13 | FN
; /* plus */
422 s
->pre_map
[0x1a ] = 0x14 | FN
; /* bracketleft */
423 s
->pre_map
[0x1b ] = 0x15 | FN
; /* bracketright */
424 s
->pre_map
[0x1a | SHIFT
] = 0x16 | FN
; /* braceleft */
425 s
->pre_map
[0x1b | SHIFT
] = 0x17 | FN
; /* braceright */
426 s
->pre_map
[0x27 ] = 0x22 | FN
; /* semicolon */
427 s
->pre_map
[0x27 | SHIFT
] = 0x23 | FN
; /* colon */
428 s
->pre_map
[0x09 | SHIFT
] = 0x24 | FN
; /* asterisk */
429 s
->pre_map
[0x2b ] = 0x25 | FN
; /* backslash */
430 s
->pre_map
[0x2b | SHIFT
] = 0x26 | FN
; /* bar */
431 s
->pre_map
[0x0c | SHIFT
] = 0x30 | FN
; /* underscore */
432 s
->pre_map
[0x33 | SHIFT
] = 0x33 | FN
; /* less */
433 s
->pre_map
[0x35 ] = 0x33 | SHIFT
; /* slash */
434 s
->pre_map
[0x34 | SHIFT
] = 0x34 | FN
; /* greater */
435 s
->pre_map
[0x35 | SHIFT
] = 0x34 | SHIFT
; /* question */
436 s
->pre_map
[0x49 ] = 0x48 | FN
; /* Page_Up */
437 s
->pre_map
[0x51 ] = 0x50 | FN
; /* Page_Down */
443 s
->kbdtimer
= qemu_new_timer(vm_clock
, spitz_keyboard_tick
, s
);
444 spitz_keyboard_tick(s
);
451 static void spitz_keyboard_save(QEMUFile
*f
, void *opaque
)
453 SpitzKeyboardState
*s
= (SpitzKeyboardState
*) opaque
;
456 qemu_put_be16s(f
, &s
->sense_state
);
457 qemu_put_be16s(f
, &s
->strobe_state
);
458 for (i
= 0; i
< 5; i
++)
459 qemu_put_byte(f
, spitz_gpio_invert
[i
]);
462 static int spitz_keyboard_load(QEMUFile
*f
, void *opaque
, int version_id
)
464 SpitzKeyboardState
*s
= (SpitzKeyboardState
*) opaque
;
467 qemu_get_be16s(f
, &s
->sense_state
);
468 qemu_get_be16s(f
, &s
->strobe_state
);
469 for (i
= 0; i
< 5; i
++)
470 spitz_gpio_invert
[i
] = qemu_get_byte(f
);
472 /* Release all pressed keys */
473 memset(s
->keyrow
, 0, sizeof(s
->keyrow
));
474 spitz_keyboard_sense_update(s
);
483 static void spitz_keyboard_register(PXA2xxState
*cpu
)
486 SpitzKeyboardState
*s
;
488 s
= (SpitzKeyboardState
*)
489 qemu_mallocz(sizeof(SpitzKeyboardState
));
490 memset(s
, 0, sizeof(SpitzKeyboardState
));
492 for (i
= 0; i
< 0x80; i
++)
494 for (i
= 0; i
< SPITZ_KEY_SENSE_NUM
+ 1; i
++)
495 for (j
= 0; j
< SPITZ_KEY_STROBE_NUM
; j
++)
496 if (spitz_keymap
[i
][j
] != -1)
497 s
->keymap
[spitz_keymap
[i
][j
]] = (i
<< 4) | j
;
499 for (i
= 0; i
< SPITZ_KEY_SENSE_NUM
; i
++)
500 s
->sense
[i
] = pxa2xx_gpio_in_get(cpu
->gpio
)[spitz_gpio_key_sense
[i
]];
502 for (i
= 0; i
< 5; i
++)
503 s
->gpiomap
[i
] = pxa2xx_gpio_in_get(cpu
->gpio
)[spitz_gpiomap
[i
]];
505 s
->strobe
= qemu_allocate_irqs(spitz_keyboard_strobe
, s
,
506 SPITZ_KEY_STROBE_NUM
);
507 for (i
= 0; i
< SPITZ_KEY_STROBE_NUM
; i
++)
508 pxa2xx_gpio_out_set(cpu
->gpio
, spitz_gpio_key_strobe
[i
], s
->strobe
[i
]);
510 spitz_keyboard_pre_map(s
);
511 qemu_add_kbd_event_handler((QEMUPutKBDEvent
*) spitz_keyboard_handler
, s
);
513 register_savevm(NULL
, "spitz_keyboard", 0, 0,
514 spitz_keyboard_save
, spitz_keyboard_load
, s
);
517 /* LCD backlight controller */
519 #define LCDTG_RESCTL 0x00
520 #define LCDTG_PHACTRL 0x01
521 #define LCDTG_DUTYCTRL 0x02
522 #define LCDTG_POWERREG0 0x03
523 #define LCDTG_POWERREG1 0x04
524 #define LCDTG_GPOR3 0x05
525 #define LCDTG_PICTRL 0x06
526 #define LCDTG_POLCTRL 0x07
530 uint32_t bl_intensity
;
534 static void spitz_bl_update(SpitzLCDTG
*s
)
536 if (s
->bl_power
&& s
->bl_intensity
)
537 zaurus_printf("LCD Backlight now at %i/63\n", s
->bl_intensity
);
539 zaurus_printf("LCD Backlight now off\n");
542 /* FIXME: Implement GPIO properly and remove this hack. */
543 static SpitzLCDTG
*spitz_lcdtg
;
545 static inline void spitz_bl_bit5(void *opaque
, int line
, int level
)
547 SpitzLCDTG
*s
= spitz_lcdtg
;
548 int prev
= s
->bl_intensity
;
551 s
->bl_intensity
&= ~0x20;
553 s
->bl_intensity
|= 0x20;
555 if (s
->bl_power
&& prev
!= s
->bl_intensity
)
559 static inline void spitz_bl_power(void *opaque
, int line
, int level
)
561 SpitzLCDTG
*s
= spitz_lcdtg
;
562 s
->bl_power
= !!level
;
566 static uint32_t spitz_lcdtg_transfer(SSISlave
*dev
, uint32_t value
)
568 SpitzLCDTG
*s
= FROM_SSI_SLAVE(SpitzLCDTG
, dev
);
576 zaurus_printf("LCD in QVGA mode\n");
578 zaurus_printf("LCD in VGA mode\n");
582 s
->bl_intensity
&= ~0x1f;
583 s
->bl_intensity
|= value
;
588 case LCDTG_POWERREG0
:
589 /* Set common voltage to M62332FP */
595 static int spitz_lcdtg_init(SSISlave
*dev
)
597 SpitzLCDTG
*s
= FROM_SSI_SLAVE(SpitzLCDTG
, dev
);
601 s
->bl_intensity
= 0x20;
608 #define CORGI_SSP_PORT 2
610 #define SPITZ_GPIO_LCDCON_CS 53
611 #define SPITZ_GPIO_ADS7846_CS 14
612 #define SPITZ_GPIO_MAX1111_CS 20
613 #define SPITZ_GPIO_TP_INT 11
615 static DeviceState
*max1111
;
617 /* "Demux" the signal based on current chipselect */
624 static uint32_t corgi_ssp_transfer(SSISlave
*dev
, uint32_t value
)
626 CorgiSSPState
*s
= FROM_SSI_SLAVE(CorgiSSPState
, dev
);
629 for (i
= 0; i
< 3; i
++) {
631 return ssi_transfer(s
->bus
[i
], value
);
637 static void corgi_ssp_gpio_cs(void *opaque
, int line
, int level
)
639 CorgiSSPState
*s
= (CorgiSSPState
*)opaque
;
640 assert(line
>= 0 && line
< 3);
641 s
->enable
[line
] = !level
;
644 #define MAX1111_BATT_VOLT 1
645 #define MAX1111_BATT_TEMP 2
646 #define MAX1111_ACIN_VOLT 3
648 #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */
649 #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */
650 #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */
652 static void spitz_adc_temp_on(void *opaque
, int line
, int level
)
658 max111x_set_input(max1111
, MAX1111_BATT_TEMP
, SPITZ_BATTERY_TEMP
);
660 max111x_set_input(max1111
, MAX1111_BATT_TEMP
, 0);
663 static int corgi_ssp_init(SSISlave
*dev
)
665 CorgiSSPState
*s
= FROM_SSI_SLAVE(CorgiSSPState
, dev
);
667 qdev_init_gpio_in(&dev
->qdev
, corgi_ssp_gpio_cs
, 3);
668 s
->bus
[0] = ssi_create_bus(&dev
->qdev
, "ssi0");
669 s
->bus
[1] = ssi_create_bus(&dev
->qdev
, "ssi1");
670 s
->bus
[2] = ssi_create_bus(&dev
->qdev
, "ssi2");
675 static void spitz_ssp_attach(PXA2xxState
*cpu
)
681 mux
= ssi_create_slave(cpu
->ssp
[CORGI_SSP_PORT
- 1], "corgi-ssp");
683 bus
= qdev_get_child_bus(mux
, "ssi0");
684 ssi_create_slave(bus
, "spitz-lcdtg");
686 bus
= qdev_get_child_bus(mux
, "ssi1");
687 dev
= ssi_create_slave(bus
, "ads7846");
688 qdev_connect_gpio_out(dev
, 0,
689 pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_TP_INT
]);
691 bus
= qdev_get_child_bus(mux
, "ssi2");
692 max1111
= ssi_create_slave(bus
, "max1111");
693 max111x_set_input(max1111
, MAX1111_BATT_VOLT
, SPITZ_BATTERY_VOLT
);
694 max111x_set_input(max1111
, MAX1111_BATT_TEMP
, 0);
695 max111x_set_input(max1111
, MAX1111_ACIN_VOLT
, SPITZ_CHARGEON_ACIN
);
697 pxa2xx_gpio_out_set(cpu
->gpio
, SPITZ_GPIO_LCDCON_CS
,
698 qdev_get_gpio_in(mux
, 0));
699 pxa2xx_gpio_out_set(cpu
->gpio
, SPITZ_GPIO_ADS7846_CS
,
700 qdev_get_gpio_in(mux
, 1));
701 pxa2xx_gpio_out_set(cpu
->gpio
, SPITZ_GPIO_MAX1111_CS
,
702 qdev_get_gpio_in(mux
, 2));
707 static void spitz_microdrive_attach(PXA2xxState
*cpu
, int slot
)
710 BlockDriverState
*bs
;
713 dinfo
= drive_get(IF_IDE
, 0, 0);
717 if (bdrv_is_inserted(bs
) && !bdrv_is_removable(bs
)) {
718 md
= dscm1xxxx_init(dinfo
);
719 pxa2xx_pcmcia_attach(cpu
->pcmcia
[slot
], md
);
723 /* Wm8750 and Max7310 on I2C */
725 #define AKITA_MAX_ADDR 0x18
726 #define SPITZ_WM_ADDRL 0x1b
727 #define SPITZ_WM_ADDRH 0x1a
729 #define SPITZ_GPIO_WM 5
731 static void spitz_wm8750_addr(void *opaque
, int line
, int level
)
733 i2c_slave
*wm
= (i2c_slave
*) opaque
;
735 i2c_set_slave_address(wm
, SPITZ_WM_ADDRH
);
737 i2c_set_slave_address(wm
, SPITZ_WM_ADDRL
);
740 static void spitz_i2c_setup(PXA2xxState
*cpu
)
742 /* Attach the CPU on one end of our I2C bus. */
743 i2c_bus
*bus
= pxa2xx_i2c_bus(cpu
->i2c
[0]);
747 /* Attach a WM8750 to the bus */
748 wm
= i2c_create_slave(bus
, "wm8750", 0);
750 spitz_wm8750_addr(wm
, 0, 0);
751 pxa2xx_gpio_out_set(cpu
->gpio
, SPITZ_GPIO_WM
,
752 qemu_allocate_irqs(spitz_wm8750_addr
, wm
, 1)[0]);
753 /* .. and to the sound interface. */
754 cpu
->i2s
->opaque
= wm
;
755 cpu
->i2s
->codec_out
= wm8750_dac_dat
;
756 cpu
->i2s
->codec_in
= wm8750_adc_dat
;
757 wm8750_data_req_set(wm
, cpu
->i2s
->data_req
, cpu
->i2s
);
760 static void spitz_akita_i2c_setup(PXA2xxState
*cpu
)
762 /* Attach a Max7310 to Akita I2C bus. */
763 i2c_create_slave(pxa2xx_i2c_bus(cpu
->i2c
[0]), "max7310",
767 /* Other peripherals */
769 static void spitz_out_switch(void *opaque
, int line
, int level
)
773 zaurus_printf("Charging %s.\n", level
? "off" : "on");
776 zaurus_printf("Discharging %s.\n", level
? "on" : "off");
779 zaurus_printf("Green LED %s.\n", level
? "on" : "off");
782 zaurus_printf("Orange LED %s.\n", level
? "on" : "off");
785 spitz_bl_bit5(opaque
, line
, level
);
788 spitz_bl_power(opaque
, line
, level
);
791 spitz_adc_temp_on(opaque
, line
, level
);
796 #define SPITZ_SCP_LED_GREEN 1
797 #define SPITZ_SCP_JK_B 2
798 #define SPITZ_SCP_CHRG_ON 3
799 #define SPITZ_SCP_MUTE_L 4
800 #define SPITZ_SCP_MUTE_R 5
801 #define SPITZ_SCP_CF_POWER 6
802 #define SPITZ_SCP_LED_ORANGE 7
803 #define SPITZ_SCP_JK_A 8
804 #define SPITZ_SCP_ADC_TEMP_ON 9
805 #define SPITZ_SCP2_IR_ON 1
806 #define SPITZ_SCP2_AKIN_PULLUP 2
807 #define SPITZ_SCP2_BACKLIGHT_CONT 7
808 #define SPITZ_SCP2_BACKLIGHT_ON 8
809 #define SPITZ_SCP2_MIC_BIAS 9
811 static void spitz_scoop_gpio_setup(PXA2xxState
*cpu
,
812 DeviceState
*scp0
, DeviceState
*scp1
)
814 qemu_irq
*outsignals
= qemu_allocate_irqs(spitz_out_switch
, cpu
, 8);
816 qdev_connect_gpio_out(scp0
, SPITZ_SCP_CHRG_ON
, outsignals
[0]);
817 qdev_connect_gpio_out(scp0
, SPITZ_SCP_JK_B
, outsignals
[1]);
818 qdev_connect_gpio_out(scp0
, SPITZ_SCP_LED_GREEN
, outsignals
[2]);
819 qdev_connect_gpio_out(scp0
, SPITZ_SCP_LED_ORANGE
, outsignals
[3]);
822 qdev_connect_gpio_out(scp1
, SPITZ_SCP2_BACKLIGHT_CONT
, outsignals
[4]);
823 qdev_connect_gpio_out(scp1
, SPITZ_SCP2_BACKLIGHT_ON
, outsignals
[5]);
826 qdev_connect_gpio_out(scp0
, SPITZ_SCP_ADC_TEMP_ON
, outsignals
[6]);
829 #define SPITZ_GPIO_HSYNC 22
830 #define SPITZ_GPIO_SD_DETECT 9
831 #define SPITZ_GPIO_SD_WP 81
832 #define SPITZ_GPIO_ON_RESET 89
833 #define SPITZ_GPIO_BAT_COVER 90
834 #define SPITZ_GPIO_CF1_IRQ 105
835 #define SPITZ_GPIO_CF1_CD 94
836 #define SPITZ_GPIO_CF2_IRQ 106
837 #define SPITZ_GPIO_CF2_CD 93
839 static int spitz_hsync
;
841 static void spitz_lcd_hsync_handler(void *opaque
, int line
, int level
)
843 PXA2xxState
*cpu
= (PXA2xxState
*) opaque
;
844 qemu_set_irq(pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_HSYNC
], spitz_hsync
);
848 static void spitz_gpio_setup(PXA2xxState
*cpu
, int slots
)
852 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
853 * read to satisfy broken guests that poll-wait for hsync.
854 * Simulating a real hsync event would be less practical and
855 * wouldn't guarantee that a guest ever exits the loop.
858 lcd_hsync
= qemu_allocate_irqs(spitz_lcd_hsync_handler
, cpu
, 1)[0];
859 pxa2xx_gpio_read_notifier(cpu
->gpio
, lcd_hsync
);
860 pxa2xx_lcd_vsync_notifier(cpu
->lcd
, lcd_hsync
);
863 pxa2xx_mmci_handlers(cpu
->mmc
,
864 pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_SD_WP
],
865 pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_SD_DETECT
]);
867 /* Battery lock always closed */
868 qemu_irq_raise(pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_BAT_COVER
]);
871 pxa2xx_gpio_out_set(cpu
->gpio
, SPITZ_GPIO_ON_RESET
, cpu
->reset
);
873 /* PCMCIA signals: card's IRQ and Card-Detect */
875 pxa2xx_pcmcia_set_irq_cb(cpu
->pcmcia
[0],
876 pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_CF1_IRQ
],
877 pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_CF1_CD
]);
879 pxa2xx_pcmcia_set_irq_cb(cpu
->pcmcia
[1],
880 pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_CF2_IRQ
],
881 pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_CF2_CD
]);
883 /* Initialise the screen rotation related signals */
884 spitz_gpio_invert
[3] = 0; /* Always open */
885 if (graphic_rotate
) { /* Tablet mode */
886 spitz_gpio_invert
[4] = 0;
887 } else { /* Portrait mode */
888 spitz_gpio_invert
[4] = 1;
890 qemu_set_irq(pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_SWA
],
891 spitz_gpio_invert
[3]);
892 qemu_set_irq(pxa2xx_gpio_in_get(cpu
->gpio
)[SPITZ_GPIO_SWB
],
893 spitz_gpio_invert
[4]);
897 enum spitz_model_e
{ spitz
, akita
, borzoi
, terrier
};
899 #define SPITZ_RAM 0x04000000
900 #define SPITZ_ROM 0x00800000
902 static struct arm_boot_info spitz_binfo
= {
903 .loader_start
= PXA2XX_SDRAM_BASE
,
904 .ram_size
= 0x04000000,
907 static void spitz_common_init(ram_addr_t ram_size
,
908 const char *kernel_filename
,
909 const char *kernel_cmdline
, const char *initrd_filename
,
910 const char *cpu_model
, enum spitz_model_e model
, int arm_id
)
913 DeviceState
*scp0
, *scp1
= NULL
;
916 cpu_model
= (model
== terrier
) ? "pxa270-c5" : "pxa270-c0";
918 /* Setup CPU & memory */
919 cpu
= pxa270_init(spitz_binfo
.ram_size
, cpu_model
);
921 sl_flash_register(cpu
, (model
== spitz
) ? FLASH_128M
: FLASH_1024M
);
923 cpu_register_physical_memory(0, SPITZ_ROM
,
924 qemu_ram_alloc(NULL
, "spitz.rom", SPITZ_ROM
) | IO_MEM_ROM
);
926 /* Setup peripherals */
927 spitz_keyboard_register(cpu
);
929 spitz_ssp_attach(cpu
);
931 scp0
= sysbus_create_simple("scoop", 0x10800000, NULL
);
932 if (model
!= akita
) {
933 scp1
= sysbus_create_simple("scoop", 0x08800040, NULL
);
936 spitz_scoop_gpio_setup(cpu
, scp0
, scp1
);
938 spitz_gpio_setup(cpu
, (model
== akita
) ? 1 : 2);
940 spitz_i2c_setup(cpu
);
943 spitz_akita_i2c_setup(cpu
);
945 if (model
== terrier
)
946 /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
947 spitz_microdrive_attach(cpu
, 1);
948 else if (model
!= akita
)
949 /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
950 spitz_microdrive_attach(cpu
, 0);
952 spitz_binfo
.kernel_filename
= kernel_filename
;
953 spitz_binfo
.kernel_cmdline
= kernel_cmdline
;
954 spitz_binfo
.initrd_filename
= initrd_filename
;
955 spitz_binfo
.board_id
= arm_id
;
956 arm_load_kernel(cpu
->env
, &spitz_binfo
);
957 sl_bootparam_write(SL_PXA_PARAM_BASE
);
960 static void spitz_init(ram_addr_t ram_size
,
961 const char *boot_device
,
962 const char *kernel_filename
, const char *kernel_cmdline
,
963 const char *initrd_filename
, const char *cpu_model
)
965 spitz_common_init(ram_size
, kernel_filename
,
966 kernel_cmdline
, initrd_filename
, cpu_model
, spitz
, 0x2c9);
969 static void borzoi_init(ram_addr_t ram_size
,
970 const char *boot_device
,
971 const char *kernel_filename
, const char *kernel_cmdline
,
972 const char *initrd_filename
, const char *cpu_model
)
974 spitz_common_init(ram_size
, kernel_filename
,
975 kernel_cmdline
, initrd_filename
, cpu_model
, borzoi
, 0x33f);
978 static void akita_init(ram_addr_t ram_size
,
979 const char *boot_device
,
980 const char *kernel_filename
, const char *kernel_cmdline
,
981 const char *initrd_filename
, const char *cpu_model
)
983 spitz_common_init(ram_size
, kernel_filename
,
984 kernel_cmdline
, initrd_filename
, cpu_model
, akita
, 0x2e8);
987 static void terrier_init(ram_addr_t ram_size
,
988 const char *boot_device
,
989 const char *kernel_filename
, const char *kernel_cmdline
,
990 const char *initrd_filename
, const char *cpu_model
)
992 spitz_common_init(ram_size
, kernel_filename
,
993 kernel_cmdline
, initrd_filename
, cpu_model
, terrier
, 0x33f);
996 static QEMUMachine akitapda_machine
= {
998 .desc
= "Akita PDA (PXA270)",
1002 static QEMUMachine spitzpda_machine
= {
1004 .desc
= "Spitz PDA (PXA270)",
1008 static QEMUMachine borzoipda_machine
= {
1010 .desc
= "Borzoi PDA (PXA270)",
1011 .init
= borzoi_init
,
1014 static QEMUMachine terrierpda_machine
= {
1016 .desc
= "Terrier PDA (PXA270)",
1017 .init
= terrier_init
,
1020 static void spitz_machine_init(void)
1022 qemu_register_machine(&akitapda_machine
);
1023 qemu_register_machine(&spitzpda_machine
);
1024 qemu_register_machine(&borzoipda_machine
);
1025 qemu_register_machine(&terrierpda_machine
);
1028 machine_init(spitz_machine_init
);
1030 static VMStateDescription vmstate_sl_nand_info
= {
1033 .minimum_version_id
= 0,
1034 .minimum_version_id_old
= 0,
1035 .fields
= (VMStateField
[]) {
1036 VMSTATE_UINT8(ctl
, SLNANDState
),
1037 VMSTATE_STRUCT(ecc
, SLNANDState
, 0, vmstate_ecc_state
, ECCState
),
1038 VMSTATE_END_OF_LIST(),
1042 static SysBusDeviceInfo sl_nand_info
= {
1043 .init
= sl_nand_init
,
1044 .qdev
.name
= "sl-nand",
1045 .qdev
.size
= sizeof(SLNANDState
),
1046 .qdev
.vmsd
= &vmstate_sl_nand_info
,
1047 .qdev
.props
= (Property
[]) {
1048 DEFINE_PROP_UINT8("manf_id", SLNANDState
, manf_id
, NAND_MFR_SAMSUNG
),
1049 DEFINE_PROP_UINT8("chip_id", SLNANDState
, chip_id
, 0xf1),
1050 DEFINE_PROP_END_OF_LIST(),
1054 static const VMStateDescription vmstate_corgi_ssp_regs
= {
1055 .name
= "corgi-ssp",
1057 .minimum_version_id
= 1,
1058 .minimum_version_id_old
= 1,
1059 .fields
= (VMStateField
[]) {
1060 VMSTATE_UINT32_ARRAY(enable
, CorgiSSPState
, 3),
1061 VMSTATE_END_OF_LIST(),
1065 static SSISlaveInfo corgi_ssp_info
= {
1066 .qdev
.name
= "corgi-ssp",
1067 .qdev
.size
= sizeof(CorgiSSPState
),
1068 .qdev
.vmsd
= &vmstate_corgi_ssp_regs
,
1069 .init
= corgi_ssp_init
,
1070 .transfer
= corgi_ssp_transfer
1073 static const VMStateDescription vmstate_spitz_lcdtg_regs
= {
1074 .name
= "spitz-lcdtg",
1076 .minimum_version_id
= 1,
1077 .minimum_version_id_old
= 1,
1078 .fields
= (VMStateField
[]) {
1079 VMSTATE_UINT32(bl_intensity
, SpitzLCDTG
),
1080 VMSTATE_UINT32(bl_power
, SpitzLCDTG
),
1081 VMSTATE_END_OF_LIST(),
1085 static SSISlaveInfo spitz_lcdtg_info
= {
1086 .qdev
.name
= "spitz-lcdtg",
1087 .qdev
.size
= sizeof(SpitzLCDTG
),
1088 .qdev
.vmsd
= &vmstate_spitz_lcdtg_regs
,
1089 .init
= spitz_lcdtg_init
,
1090 .transfer
= spitz_lcdtg_transfer
1093 static void spitz_register_devices(void)
1095 ssi_register_slave(&corgi_ssp_info
);
1096 ssi_register_slave(&spitz_lcdtg_info
);
1097 sysbus_register_withprop(&sl_nand_info
);
1100 device_init(spitz_register_devices
)