2 * Copyright (C) 2010-2012 Guan Xuetao
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * Contributions from 2012-04-01 on are considered under GPL version 2,
9 * or (at your option) any later version.
15 #include "host-utils.h"
20 #define DPRINTF(fmt, ...) printf("%s: " fmt , __func__, ## __VA_ARGS__)
22 #define DPRINTF(fmt, ...) do {} while (0)
25 CPUUniCore32State
*uc32_cpu_init(const char *cpu_model
)
28 CPUUniCore32State
*env
;
29 static int inited
= 1;
31 if (object_class_by_name(cpu_model
) == NULL
) {
34 cpu
= UNICORE32_CPU(object_new(cpu_model
));
39 uc32_translate_init();
46 uint32_t HELPER(clo
)(uint32_t x
)
51 uint32_t HELPER(clz
)(uint32_t x
)
56 #ifndef CONFIG_USER_ONLY
57 void helper_cp0_set(CPUUniCore32State
*env
, uint32_t val
, uint32_t creg
,
61 * movc pp.nn, rn, #imm9
65 * 2: page table base reg.
66 * 3: data fault status reg.
67 * 4: insn fault status reg.
70 * imm9: split UCOP_IMM10 with bit5 is 0
77 env
->cp0
.c1_sys
= val
;
83 env
->cp0
.c2_base
= val
;
89 env
->cp0
.c3_faultstatus
= val
;
95 env
->cp0
.c4_faultaddr
= val
;
100 DPRINTF("Invalidate Entire I&D cache\n");
103 DPRINTF("Invalidate Entire Icache\n");
106 DPRINTF("Invalidate Entire Dcache\n");
109 DPRINTF("Clean Entire Dcache\n");
112 DPRINTF("Flush Entire Dcache\n");
115 DPRINTF("Invalidate Dcache line\n");
118 DPRINTF("Clean Dcache line\n");
121 DPRINTF("Flush Dcache line\n");
126 if ((cop
<= 6) && (cop
>= 2)) {
127 /* invalid all tlb */
137 DPRINTF("Wrong register (%d) or wrong operation (%d) in cp0_set!\n",
141 uint32_t helper_cp0_get(CPUUniCore32State
*env
, uint32_t creg
, uint32_t cop
)
144 * movc rd, pp.nn, #imm9
147 * 0: cpuid and cachetype
148 * 1: sys control reg.
149 * 2: page table base reg.
150 * 3: data fault status reg.
151 * 4: insn fault status reg.
152 * imm9: split UCOP_IMM10 with bit5 is 0
158 return env
->cp0
.c0_cpuid
;
160 return env
->cp0
.c0_cachetype
;
165 return env
->cp0
.c1_sys
;
170 return env
->cp0
.c2_base
;
175 return env
->cp0
.c3_faultstatus
;
180 return env
->cp0
.c4_faultaddr
;
184 DPRINTF("Wrong register (%d) or wrong operation (%d) in cp0_set!\n",
189 void helper_cp1_putc(target_ulong x
)
191 /* TODO: curses display should be added here for screen output. */
196 #ifdef CONFIG_USER_ONLY
197 void switch_mode(CPUUniCore32State
*env
, int mode
)
199 if (mode
!= ASR_MODE_USER
) {
200 cpu_abort(env
, "Tried to switch out of user mode\n");
204 void do_interrupt(CPUUniCore32State
*env
)
206 cpu_abort(env
, "NO interrupt in user mode\n");
209 int uc32_cpu_handle_mmu_fault(CPUUniCore32State
*env
, target_ulong address
,
210 int access_type
, int mmu_idx
)
212 cpu_abort(env
, "NO mmu fault in user mode\n");
217 /* UniCore-F64 support. We follow the convention used for F64 instrunctions:
218 Single precition routines have a "s" suffix, double precision a
221 /* Convert host exception flags to f64 form. */
222 static inline int ucf64_exceptbits_from_host(int host_bits
)
226 if (host_bits
& float_flag_invalid
) {
227 target_bits
|= UCF64_FPSCR_FLAG_INVALID
;
229 if (host_bits
& float_flag_divbyzero
) {
230 target_bits
|= UCF64_FPSCR_FLAG_DIVZERO
;
232 if (host_bits
& float_flag_overflow
) {
233 target_bits
|= UCF64_FPSCR_FLAG_OVERFLOW
;
235 if (host_bits
& float_flag_underflow
) {
236 target_bits
|= UCF64_FPSCR_FLAG_UNDERFLOW
;
238 if (host_bits
& float_flag_inexact
) {
239 target_bits
|= UCF64_FPSCR_FLAG_INEXACT
;
244 uint32_t HELPER(ucf64_get_fpscr
)(CPUUniCore32State
*env
)
249 fpscr
= (env
->ucf64
.xregs
[UC32_UCF64_FPSCR
] & UCF64_FPSCR_MASK
);
250 i
= get_float_exception_flags(&env
->ucf64
.fp_status
);
251 fpscr
|= ucf64_exceptbits_from_host(i
);
255 /* Convert ucf64 exception flags to target form. */
256 static inline int ucf64_exceptbits_to_host(int target_bits
)
260 if (target_bits
& UCF64_FPSCR_FLAG_INVALID
) {
261 host_bits
|= float_flag_invalid
;
263 if (target_bits
& UCF64_FPSCR_FLAG_DIVZERO
) {
264 host_bits
|= float_flag_divbyzero
;
266 if (target_bits
& UCF64_FPSCR_FLAG_OVERFLOW
) {
267 host_bits
|= float_flag_overflow
;
269 if (target_bits
& UCF64_FPSCR_FLAG_UNDERFLOW
) {
270 host_bits
|= float_flag_underflow
;
272 if (target_bits
& UCF64_FPSCR_FLAG_INEXACT
) {
273 host_bits
|= float_flag_inexact
;
278 void HELPER(ucf64_set_fpscr
)(CPUUniCore32State
*env
, uint32_t val
)
283 changed
= env
->ucf64
.xregs
[UC32_UCF64_FPSCR
];
284 env
->ucf64
.xregs
[UC32_UCF64_FPSCR
] = (val
& UCF64_FPSCR_MASK
);
287 if (changed
& (UCF64_FPSCR_RND_MASK
)) {
288 i
= UCF64_FPSCR_RND(val
);
291 i
= float_round_nearest_even
;
294 i
= float_round_to_zero
;
300 i
= float_round_down
;
302 default: /* 100 and 101 not implement */
303 cpu_abort(env
, "Unsupported UniCore-F64 round mode");
305 set_float_rounding_mode(i
, &env
->ucf64
.fp_status
);
308 i
= ucf64_exceptbits_to_host(UCF64_FPSCR_TRAPEN(val
));
309 set_float_exception_flags(i
, &env
->ucf64
.fp_status
);
312 float32
HELPER(ucf64_adds
)(float32 a
, float32 b
, CPUUniCore32State
*env
)
314 return float32_add(a
, b
, &env
->ucf64
.fp_status
);
317 float64
HELPER(ucf64_addd
)(float64 a
, float64 b
, CPUUniCore32State
*env
)
319 return float64_add(a
, b
, &env
->ucf64
.fp_status
);
322 float32
HELPER(ucf64_subs
)(float32 a
, float32 b
, CPUUniCore32State
*env
)
324 return float32_sub(a
, b
, &env
->ucf64
.fp_status
);
327 float64
HELPER(ucf64_subd
)(float64 a
, float64 b
, CPUUniCore32State
*env
)
329 return float64_sub(a
, b
, &env
->ucf64
.fp_status
);
332 float32
HELPER(ucf64_muls
)(float32 a
, float32 b
, CPUUniCore32State
*env
)
334 return float32_mul(a
, b
, &env
->ucf64
.fp_status
);
337 float64
HELPER(ucf64_muld
)(float64 a
, float64 b
, CPUUniCore32State
*env
)
339 return float64_mul(a
, b
, &env
->ucf64
.fp_status
);
342 float32
HELPER(ucf64_divs
)(float32 a
, float32 b
, CPUUniCore32State
*env
)
344 return float32_div(a
, b
, &env
->ucf64
.fp_status
);
347 float64
HELPER(ucf64_divd
)(float64 a
, float64 b
, CPUUniCore32State
*env
)
349 return float64_div(a
, b
, &env
->ucf64
.fp_status
);
352 float32
HELPER(ucf64_negs
)(float32 a
)
354 return float32_chs(a
);
357 float64
HELPER(ucf64_negd
)(float64 a
)
359 return float64_chs(a
);
362 float32
HELPER(ucf64_abss
)(float32 a
)
364 return float32_abs(a
);
367 float64
HELPER(ucf64_absd
)(float64 a
)
369 return float64_abs(a
);
372 /* XXX: check quiet/signaling case */
373 void HELPER(ucf64_cmps
)(float32 a
, float32 b
, uint32_t c
, CPUUniCore32State
*env
)
376 flag
= float32_compare_quiet(a
, b
, &env
->ucf64
.fp_status
);
392 if ((flag
== 0) || (flag
== 2)) {
402 if ((flag
== -1) || (flag
== 2)) {
407 if ((flag
== -1) || (flag
== 0)) {
417 env
->ucf64
.xregs
[UC32_UCF64_FPSCR
] = (env
->CF
<< 29)
418 | (env
->ucf64
.xregs
[UC32_UCF64_FPSCR
] & 0x0fffffff);
421 void HELPER(ucf64_cmpd
)(float64 a
, float64 b
, uint32_t c
, CPUUniCore32State
*env
)
424 flag
= float64_compare_quiet(a
, b
, &env
->ucf64
.fp_status
);
440 if ((flag
== 0) || (flag
== 2)) {
450 if ((flag
== -1) || (flag
== 2)) {
455 if ((flag
== -1) || (flag
== 0)) {
465 env
->ucf64
.xregs
[UC32_UCF64_FPSCR
] = (env
->CF
<< 29)
466 | (env
->ucf64
.xregs
[UC32_UCF64_FPSCR
] & 0x0fffffff);
469 /* Helper routines to perform bitwise copies between float and int. */
470 static inline float32
ucf64_itos(uint32_t i
)
481 static inline uint32_t ucf64_stoi(float32 s
)
492 static inline float64
ucf64_itod(uint64_t i
)
503 static inline uint64_t ucf64_dtoi(float64 d
)
514 /* Integer to float conversion. */
515 float32
HELPER(ucf64_si2sf
)(float32 x
, CPUUniCore32State
*env
)
517 return int32_to_float32(ucf64_stoi(x
), &env
->ucf64
.fp_status
);
520 float64
HELPER(ucf64_si2df
)(float32 x
, CPUUniCore32State
*env
)
522 return int32_to_float64(ucf64_stoi(x
), &env
->ucf64
.fp_status
);
525 /* Float to integer conversion. */
526 float32
HELPER(ucf64_sf2si
)(float32 x
, CPUUniCore32State
*env
)
528 return ucf64_itos(float32_to_int32(x
, &env
->ucf64
.fp_status
));
531 float32
HELPER(ucf64_df2si
)(float64 x
, CPUUniCore32State
*env
)
533 return ucf64_itos(float64_to_int32(x
, &env
->ucf64
.fp_status
));
536 /* floating point conversion */
537 float64
HELPER(ucf64_sf2df
)(float32 x
, CPUUniCore32State
*env
)
539 return float32_to_float64(x
, &env
->ucf64
.fp_status
);
542 float32
HELPER(ucf64_df2sf
)(float64 x
, CPUUniCore32State
*env
)
544 return float64_to_float32(x
, &env
->ucf64
.fp_status
);