hw/arm/armv7m.c

   1 /*
   2  * ARMV7M System emulation.
   3  *
   4  * Copyright (c) 2006-2007 CodeSourcery.
   5  * Written by Paul Brook
   6  *
   7  * This code is licensed under the GPL.
   8  */
   9
  10 #include "qemu/osdep.h"
  11 #include "hw/arm/armv7m.h"
  12 #include "qapi/error.h"
  13 #include "cpu.h"
  14 #include "hw/sysbus.h"
  15 #include "hw/arm/boot.h"
  16 #include "hw/loader.h"
  17 #include "hw/qdev-properties.h"
  18 #include "elf.h"
  19 #include "sysemu/reset.h"
  20 #include "qemu/error-report.h"
  21 #include "qemu/module.h"
  22 #include "exec/address-spaces.h"
  23 #include "target/arm/idau.h"
  24
  25 /* Bitbanded IO.  Each word corresponds to a single bit.  */
  26
  27 /* Get the byte address of the real memory for a bitband access.  */
  28 static inline hwaddr bitband_addr(BitBandState *s, hwaddr offset)
  29 {
  30     return s->base | (offset & 0x1ffffff) >> 5;
  31 }
  32
  33 static MemTxResult bitband_read(void *opaque, hwaddr offset,
  34                                 uint64_t *data, unsigned size, MemTxAttrs attrs)
  35 {
  36     BitBandState *s = opaque;
  37     uint8_t buf[4];
  38     MemTxResult res;
  39     int bitpos, bit;
  40     hwaddr addr;
  41
  42     assert(size <= 4);
  43
  44     /* Find address in underlying memory and round down to multiple of size */
  45     addr = bitband_addr(s, offset) & (-size);
  46     res = address_space_read(&s->source_as, addr, attrs, buf, size);
  47     if (res) {
  48         return res;
  49     }
  50     /* Bit position in the N bytes read... */
  51     bitpos = (offset >> 2) & ((size * 8) - 1);
  52     /* ...converted to byte in buffer and bit in byte */
  53     bit = (buf[bitpos >> 3] >> (bitpos & 7)) & 1;
  54     *data = bit;
  55     return MEMTX_OK;
  56 }
  57
  58 static MemTxResult bitband_write(void *opaque, hwaddr offset, uint64_t value,
  59                                  unsigned size, MemTxAttrs attrs)
  60 {
  61     BitBandState *s = opaque;
  62     uint8_t buf[4];
  63     MemTxResult res;
  64     int bitpos, bit;
  65     hwaddr addr;
  66
  67     assert(size <= 4);
  68
  69     /* Find address in underlying memory and round down to multiple of size */
  70     addr = bitband_addr(s, offset) & (-size);
  71     res = address_space_read(&s->source_as, addr, attrs, buf, size);
  72     if (res) {
  73         return res;
  74     }
  75     /* Bit position in the N bytes read... */
  76     bitpos = (offset >> 2) & ((size * 8) - 1);
  77     /* ...converted to byte in buffer and bit in byte */
  78     bit = 1 << (bitpos & 7);
  79     if (value & 1) {
  80         buf[bitpos >> 3] |= bit;
  81     } else {
  82         buf[bitpos >> 3] &= ~bit;
  83     }
  84     return address_space_write(&s->source_as, addr, attrs, buf, size);
  85 }
  86
  87 static const MemoryRegionOps bitband_ops = {
  88     .read_with_attrs = bitband_read,
  89     .write_with_attrs = bitband_write,
  90     .endianness = DEVICE_NATIVE_ENDIAN,
  91     .impl.min_access_size = 1,
  92     .impl.max_access_size = 4,
  93     .valid.min_access_size = 1,
  94     .valid.max_access_size = 4,
  95 };
  96
  97 static void bitband_init(Object *obj)
  98 {
  99     BitBandState *s = BITBAND(obj);
 100     SysBusDevice *dev = SYS_BUS_DEVICE(obj);
 101
 102     memory_region_init_io(&s->iomem, obj, &bitband_ops, s,
 103                           "bitband", 0x02000000);
 104     sysbus_init_mmio(dev, &s->iomem);
 105 }
 106
 107 static void bitband_realize(DeviceState *dev, Error **errp)
 108 {
 109     BitBandState *s = BITBAND(dev);
 110
 111     if (!s->source_memory) {
 112         error_setg(errp, "source-memory property not set");
 113         return;
 114     }
 115
 116     address_space_init(&s->source_as, s->source_memory, "bitband-source");
 117 }
 118
 119 /* Board init.  */
 120
 121 static const hwaddr bitband_input_addr[ARMV7M_NUM_BITBANDS] = {
 122     0x20000000, 0x40000000
 123 };
 124
 125 static const hwaddr bitband_output_addr[ARMV7M_NUM_BITBANDS] = {
 126     0x22000000, 0x42000000
 127 };
 128
 129 static void armv7m_instance_init(Object *obj)
 130 {
 131     ARMv7MState *s = ARMV7M(obj);
 132     int i;
 133
 134     /* Can't init the cpu here, we don't yet know which model to use */
 135
 136     memory_region_init(&s->container, obj, "armv7m-container", UINT64_MAX);
 137
 138     object_initialize_child(obj, "nvic", &s->nvic, TYPE_NVIC);
 139     object_property_add_alias(obj, "num-irq",
 140                               OBJECT(&s->nvic), "num-irq");
 141
 142     for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
 143         object_initialize_child(obj, "bitband[*]", &s->bitband[i],
 144                                 TYPE_BITBAND);
 145     }
 146 }
 147
 148 static void armv7m_realize(DeviceState *dev, Error **errp)
 149 {
 150     ARMv7MState *s = ARMV7M(dev);
 151     SysBusDevice *sbd;
 152     Error *err = NULL;
 153     int i;
 154
 155     if (!s->board_memory) {
 156         error_setg(errp, "memory property was not set");
 157         return;
 158     }
 159
 160     memory_region_add_subregion_overlap(&s->container, 0, s->board_memory, -1);
 161
 162     s->cpu = ARM_CPU(object_new_with_props(s->cpu_type, OBJECT(s), "cpu",
 163                                            &err, NULL));
 164     if (err != NULL) {
 165         error_propagate(errp, err);
 166         return;
 167     }
 168
 169     object_property_set_link(OBJECT(s->cpu), "memory", OBJECT(&s->container),
 170                              &error_abort);
 171     if (object_property_find(OBJECT(s->cpu), "idau")) {
 172         object_property_set_link(OBJECT(s->cpu), "idau", s->idau,
 173                                  &error_abort);
 174     }
 175     if (object_property_find(OBJECT(s->cpu), "init-svtor")) {
 176         if (!object_property_set_uint(OBJECT(s->cpu), "init-svtor",
 177                                       s->init_svtor, errp)) {
 178             return;
 179         }
 180     }
 181     if (object_property_find(OBJECT(s->cpu), "start-powered-off")) {
 182         if (!object_property_set_bool(OBJECT(s->cpu), "start-powered-off",
 183                                       s->start_powered_off, errp)) {
 184             return;
 185         }
 186     }
 187     if (object_property_find(OBJECT(s->cpu), "vfp")) {
 188         if (!object_property_set_bool(OBJECT(s->cpu), "vfp", s->vfp, errp)) {
 189             return;
 190         }
 191     }
 192     if (object_property_find(OBJECT(s->cpu), "dsp")) {
 193         if (!object_property_set_bool(OBJECT(s->cpu), "dsp", s->dsp, errp)) {
 194             return;
 195         }
 196     }
 197
 198     /*
 199      * Tell the CPU where the NVIC is; it will fail realize if it doesn't
 200      * have one. Similarly, tell the NVIC where its CPU is.
 201      */
 202     s->cpu->env.nvic = &s->nvic;
 203     s->nvic.cpu = s->cpu;
 204
 205     if (!qdev_realize(DEVICE(s->cpu), NULL, errp)) {
 206         return;
 207     }
 208
 209     /* Note that we must realize the NVIC after the CPU */
 210     if (!sysbus_realize(SYS_BUS_DEVICE(&s->nvic), errp)) {
 211         return;
 212     }
 213
 214     /* Alias the NVIC's input and output GPIOs as our own so the board
 215      * code can wire them up. (We do this in realize because the
 216      * NVIC doesn't create the input GPIO array until realize.)
 217      */
 218     qdev_pass_gpios(DEVICE(&s->nvic), dev, NULL);
 219     qdev_pass_gpios(DEVICE(&s->nvic), dev, "SYSRESETREQ");
 220     qdev_pass_gpios(DEVICE(&s->nvic), dev, "NMI");
 221
 222     /* Wire the NVIC up to the CPU */
 223     sbd = SYS_BUS_DEVICE(&s->nvic);
 224     sysbus_connect_irq(sbd, 0,
 225                        qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ));
 226
 227     memory_region_add_subregion(&s->container, 0xe0000000,
 228                                 sysbus_mmio_get_region(sbd, 0));
 229
 230     for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
 231         if (s->enable_bitband) {
 232             Object *obj = OBJECT(&s->bitband[i]);
 233             SysBusDevice *sbd = SYS_BUS_DEVICE(&s->bitband[i]);
 234
 235             if (!object_property_set_int(obj, "base",
 236                                          bitband_input_addr[i], errp)) {
 237                 return;
 238             }
 239             object_property_set_link(obj, "source-memory",
 240                                      OBJECT(s->board_memory), &error_abort);
 241             if (!sysbus_realize(SYS_BUS_DEVICE(obj), errp)) {
 242                 return;
 243             }
 244
 245             memory_region_add_subregion(&s->container, bitband_output_addr[i],
 246                                         sysbus_mmio_get_region(sbd, 0));
 247         } else {
 248             object_unparent(OBJECT(&s->bitband[i]));
 249         }
 250     }
 251 }
 252
 253 static Property armv7m_properties[] = {
 254     DEFINE_PROP_STRING("cpu-type", ARMv7MState, cpu_type),
 255     DEFINE_PROP_LINK("memory", ARMv7MState, board_memory, TYPE_MEMORY_REGION,
 256                      MemoryRegion *),
 257     DEFINE_PROP_LINK("idau", ARMv7MState, idau, TYPE_IDAU_INTERFACE, Object *),
 258     DEFINE_PROP_UINT32("init-svtor", ARMv7MState, init_svtor, 0),
 259     DEFINE_PROP_BOOL("enable-bitband", ARMv7MState, enable_bitband, false),
 260     DEFINE_PROP_BOOL("start-powered-off", ARMv7MState, start_powered_off,
 261                      false),
 262     DEFINE_PROP_BOOL("vfp", ARMv7MState, vfp, true),
 263     DEFINE_PROP_BOOL("dsp", ARMv7MState, dsp, true),
 264     DEFINE_PROP_END_OF_LIST(),
 265 };
 266
 267 static void armv7m_class_init(ObjectClass *klass, void *data)
 268 {
 269     DeviceClass *dc = DEVICE_CLASS(klass);
 270
 271     dc->realize = armv7m_realize;
 272     device_class_set_props(dc, armv7m_properties);
 273 }
 274
 275 static const TypeInfo armv7m_info = {
 276     .name = TYPE_ARMV7M,
 277     .parent = TYPE_SYS_BUS_DEVICE,
 278     .instance_size = sizeof(ARMv7MState),
 279     .instance_init = armv7m_instance_init,
 280     .class_init = armv7m_class_init,
 281 };
 282
 283 static void armv7m_reset(void *opaque)
 284 {
 285     ARMCPU *cpu = opaque;
 286
 287     cpu_reset(CPU(cpu));
 288 }
 289
 290 void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename, int mem_size)
 291 {
 292     int image_size;
 293     uint64_t entry;
 294     int big_endian;
 295     AddressSpace *as;
 296     int asidx;
 297     CPUState *cs = CPU(cpu);
 298
 299 #ifdef TARGET_WORDS_BIGENDIAN
 300     big_endian = 1;
 301 #else
 302     big_endian = 0;
 303 #endif
 304
 305     if (arm_feature(&cpu->env, ARM_FEATURE_EL3)) {
 306         asidx = ARMASIdx_S;
 307     } else {
 308         asidx = ARMASIdx_NS;
 309     }
 310     as = cpu_get_address_space(cs, asidx);
 311
 312     if (kernel_filename) {
 313         image_size = load_elf_as(kernel_filename, NULL, NULL, NULL,
 314                                  &entry, NULL, NULL,
 315                                  NULL, big_endian, EM_ARM, 1, 0, as);
 316         if (image_size < 0) {
 317             image_size = load_image_targphys_as(kernel_filename, 0,
 318                                                 mem_size, as);
 319         }
 320         if (image_size < 0) {
 321             error_report("Could not load kernel '%s'", kernel_filename);
 322             exit(1);
 323         }
 324     }
 325
 326     /* CPU objects (unlike devices) are not automatically reset on system
 327      * reset, so we must always register a handler to do so. Unlike
 328      * A-profile CPUs, we don't need to do anything special in the
 329      * handler to arrange that it starts correctly.
 330      * This is arguably the wrong place to do this, but it matches the
 331      * way A-profile does it. Note that this means that every M profile
 332      * board must call this function!
 333      */
 334     qemu_register_reset(armv7m_reset, cpu);
 335 }
 336
 337 static Property bitband_properties[] = {
 338     DEFINE_PROP_UINT32("base", BitBandState, base, 0),
 339     DEFINE_PROP_LINK("source-memory", BitBandState, source_memory,
 340                      TYPE_MEMORY_REGION, MemoryRegion *),
 341     DEFINE_PROP_END_OF_LIST(),
 342 };
 343
 344 static void bitband_class_init(ObjectClass *klass, void *data)
 345 {
 346     DeviceClass *dc = DEVICE_CLASS(klass);
 347
 348     dc->realize = bitband_realize;
 349     device_class_set_props(dc, bitband_properties);
 350 }
 351
 352 static const TypeInfo bitband_info = {
 353     .name          = TYPE_BITBAND,
 354     .parent        = TYPE_SYS_BUS_DEVICE,
 355     .instance_size = sizeof(BitBandState),
 356     .instance_init = bitband_init,
 357     .class_init    = bitband_class_init,
 358 };
 359
 360 static void armv7m_register_types(void)
 361 {
 362     type_register_static(&bitband_info);
 363     type_register_static(&armv7m_info);
 364 }
 365
 366 type_init(armv7m_register_types)