hw/mips/gt64xxx: Rename trace events related to interrupt registers
[qemu/ar7.git] / hw / mips / trace-events
blobb7e934c39331e91714a9644dccfe26689e40ce20
1 # gt64xxx_pci.c
2 gt64120_read_intreg(const char *regname, unsigned size, uint64_t value) "gt64120 read %s size:%u value:0x%08" PRIx64
3 gt64120_write_intreg(const char *regname, unsigned size, uint64_t value) "gt64120 write %s size:%u value:0x%08" PRIx64
4 gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_length, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" PRIx64 "@0x%08" PRIx64