tests/ivshmem-test.c

   1 /*
   2  * QTest testcase for ivshmem
   3  *
   4  * Copyright (c) 2014 SUSE LINUX Products GmbH
   5  * Copyright (c) 2015 Red Hat, Inc.
   6  *
   7  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   8  * See the COPYING file in the top-level directory.
   9  */
  10
  11 #include "qemu/osdep.h"
  12 #include <glib.h>
  13 #include <glib/gstdio.h>
  14 #include <sys/mman.h>
  15 #include "contrib/ivshmem-server/ivshmem-server.h"
  16 #include "libqos/pci-pc.h"
  17 #include "libqtest.h"
  18 #include "qemu-common.h"
  19
  20 #define TMPSHMSIZE (1 << 20)
  21 static char *tmpshm;
  22 static void *tmpshmem;
  23 static char *tmpdir;
  24 static char *tmpserver;
  25
  26 static void save_fn(QPCIDevice *dev, int devfn, void *data)
  27 {
  28     QPCIDevice **pdev = (QPCIDevice **) data;
  29
  30     *pdev = dev;
  31 }
  32
  33 static QPCIDevice *get_device(QPCIBus *pcibus)
  34 {
  35     QPCIDevice *dev;
  36
  37     dev = NULL;
  38     qpci_device_foreach(pcibus, 0x1af4, 0x1110, save_fn, &dev);
  39     g_assert(dev != NULL);
  40
  41     return dev;
  42 }
  43
  44 typedef struct _IVState {
  45     QTestState *qtest;
  46     void *reg_base, *mem_base;
  47     QPCIBus *pcibus;
  48     QPCIDevice *dev;
  49 } IVState;
  50
  51 enum Reg {
  52     INTRMASK = 0,
  53     INTRSTATUS = 4,
  54     IVPOSITION = 8,
  55     DOORBELL = 12,
  56 };
  57
  58 static const char* reg2str(enum Reg reg) {
  59     switch (reg) {
  60     case INTRMASK:
  61         return "IntrMask";
  62     case INTRSTATUS:
  63         return "IntrStatus";
  64     case IVPOSITION:
  65         return "IVPosition";
  66     case DOORBELL:
  67         return "DoorBell";
  68     default:
  69         return NULL;
  70     }
  71 }
  72
  73 static inline unsigned in_reg(IVState *s, enum Reg reg)
  74 {
  75     const char *name = reg2str(reg);
  76     QTestState *qtest = global_qtest;
  77     unsigned res;
  78
  79     global_qtest = s->qtest;
  80     res = qpci_io_readl(s->dev, s->reg_base + reg);
  81     g_test_message("*%s -> %x\n", name, res);
  82     global_qtest = qtest;
  83
  84     return res;
  85 }
  86
  87 static inline void out_reg(IVState *s, enum Reg reg, unsigned v)
  88 {
  89     const char *name = reg2str(reg);
  90     QTestState *qtest = global_qtest;
  91
  92     global_qtest = s->qtest;
  93     g_test_message("%x -> *%s\n", v, name);
  94     qpci_io_writel(s->dev, s->reg_base + reg, v);
  95     global_qtest = qtest;
  96 }
  97
  98 static void cleanup_vm(IVState *s)
  99 {
 100     g_free(s->dev);
 101     qpci_free_pc(s->pcibus);
 102     qtest_quit(s->qtest);
 103 }
 104
 105 static void setup_vm_cmd(IVState *s, const char *cmd, bool msix)
 106 {
 107     uint64_t barsize;
 108
 109     s->qtest = qtest_start(cmd);
 110     s->pcibus = qpci_init_pc();
 111     s->dev = get_device(s->pcibus);
 112
 113     s->reg_base = qpci_iomap(s->dev, 0, &barsize);
 114     g_assert_nonnull(s->reg_base);
 115     g_assert_cmpuint(barsize, ==, 256);
 116
 117     if (msix) {
 118         qpci_msix_enable(s->dev);
 119     }
 120
 121     s->mem_base = qpci_iomap(s->dev, 2, &barsize);
 122     g_assert_nonnull(s->mem_base);
 123     g_assert_cmpuint(barsize, ==, TMPSHMSIZE);
 124
 125     qpci_device_enable(s->dev);
 126 }
 127
 128 static void setup_vm(IVState *s)
 129 {
 130     char *cmd = g_strdup_printf("-device ivshmem,shm=%s,size=1M", tmpshm);
 131
 132     setup_vm_cmd(s, cmd, false);
 133
 134     g_free(cmd);
 135 }
 136
 137 static void test_ivshmem_single(void)
 138 {
 139     IVState state, *s;
 140     uint32_t data[1024];
 141     int i;
 142
 143     setup_vm(&state);
 144     s = &state;
 145
 146     /* initial state of readable registers */
 147     g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0);
 148     g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0);
 149     g_assert_cmpuint(in_reg(s, IVPOSITION), ==, 0);
 150
 151     /* trigger interrupt via registers */
 152     out_reg(s, INTRMASK, 0xffffffff);
 153     g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff);
 154     out_reg(s, INTRSTATUS, 1);
 155     /* check interrupt status */
 156     g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1);
 157     /* reading clears */
 158     g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0);
 159     /* TODO intercept actual interrupt (needs qtest work) */
 160
 161     /* invalid register access */
 162     out_reg(s, IVPOSITION, 1);
 163     in_reg(s, DOORBELL);
 164
 165     /* ring the (non-functional) doorbell */
 166     out_reg(s, DOORBELL, 8 << 16);
 167
 168     /* write shared memory */
 169     for (i = 0; i < G_N_ELEMENTS(data); i++) {
 170         data[i] = i;
 171     }
 172     qtest_memwrite(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
 173
 174     /* verify write */
 175     for (i = 0; i < G_N_ELEMENTS(data); i++) {
 176         g_assert_cmpuint(((uint32_t *)tmpshmem)[i], ==, i);
 177     }
 178
 179     /* read it back and verify read */
 180     memset(data, 0, sizeof(data));
 181     qtest_memread(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
 182     for (i = 0; i < G_N_ELEMENTS(data); i++) {
 183         g_assert_cmpuint(data[i], ==, i);
 184     }
 185
 186     cleanup_vm(s);
 187 }
 188
 189 static void test_ivshmem_pair(void)
 190 {
 191     IVState state1, state2, *s1, *s2;
 192     char *data;
 193     int i;
 194
 195     setup_vm(&state1);
 196     s1 = &state1;
 197     setup_vm(&state2);
 198     s2 = &state2;
 199
 200     data = g_malloc0(TMPSHMSIZE);
 201
 202     /* host write, guest 1 & 2 read */
 203     memset(tmpshmem, 0x42, TMPSHMSIZE);
 204     qtest_memread(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
 205     for (i = 0; i < TMPSHMSIZE; i++) {
 206         g_assert_cmpuint(data[i], ==, 0x42);
 207     }
 208     qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
 209     for (i = 0; i < TMPSHMSIZE; i++) {
 210         g_assert_cmpuint(data[i], ==, 0x42);
 211     }
 212
 213     /* guest 1 write, guest 2 read */
 214     memset(data, 0x43, TMPSHMSIZE);
 215     qtest_memwrite(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
 216     memset(data, 0, TMPSHMSIZE);
 217     qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
 218     for (i = 0; i < TMPSHMSIZE; i++) {
 219         g_assert_cmpuint(data[i], ==, 0x43);
 220     }
 221
 222     /* guest 2 write, guest 1 read */
 223     memset(data, 0x44, TMPSHMSIZE);
 224     qtest_memwrite(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
 225     memset(data, 0, TMPSHMSIZE);
 226     qtest_memread(s1->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
 227     for (i = 0; i < TMPSHMSIZE; i++) {
 228         g_assert_cmpuint(data[i], ==, 0x44);
 229     }
 230
 231     cleanup_vm(s1);
 232     cleanup_vm(s2);
 233     g_free(data);
 234 }
 235
 236 typedef struct ServerThread {
 237     GThread *thread;
 238     IvshmemServer *server;
 239     int pipe[2]; /* to handle quit */
 240 } ServerThread;
 241
 242 static void *server_thread(void *data)
 243 {
 244     ServerThread *t = data;
 245     IvshmemServer *server = t->server;
 246
 247     while (true) {
 248         fd_set fds;
 249         int maxfd, ret;
 250
 251         FD_ZERO(&fds);
 252         FD_SET(t->pipe[0], &fds);
 253         maxfd = t->pipe[0] + 1;
 254
 255         ivshmem_server_get_fds(server, &fds, &maxfd);
 256
 257         ret = select(maxfd, &fds, NULL, NULL, NULL);
 258
 259         if (ret < 0) {
 260             if (errno == EINTR) {
 261                 continue;
 262             }
 263
 264             g_critical("select error: %s\n", strerror(errno));
 265             break;
 266         }
 267         if (ret == 0) {
 268             continue;
 269         }
 270
 271         if (FD_ISSET(t->pipe[0], &fds)) {
 272             break;
 273         }
 274
 275         if (ivshmem_server_handle_fds(server, &fds, maxfd) < 0) {
 276             g_critical("ivshmem_server_handle_fds() failed\n");
 277             break;
 278         }
 279     }
 280
 281     return NULL;
 282 }
 283
 284 static void setup_vm_with_server(IVState *s, int nvectors, bool msi)
 285 {
 286     char *cmd = g_strdup_printf("-chardev socket,id=chr0,path=%s,nowait "
 287                                 "-device ivshmem,size=1M,chardev=chr0,vectors=%d,msi=%s",
 288                                 tmpserver, nvectors, msi ? "true" : "false");
 289
 290     setup_vm_cmd(s, cmd, msi);
 291
 292     g_free(cmd);
 293 }
 294
 295 static void test_ivshmem_server(bool msi)
 296 {
 297     IVState state1, state2, *s1, *s2;
 298     ServerThread thread;
 299     IvshmemServer server;
 300     int ret, vm1, vm2;
 301     int nvectors = 2;
 302     guint64 end_time = g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND;
 303
 304     ret = ivshmem_server_init(&server, tmpserver, tmpshm, true,
 305                               TMPSHMSIZE, nvectors,
 306                               g_test_verbose());
 307     g_assert_cmpint(ret, ==, 0);
 308
 309     ret = ivshmem_server_start(&server);
 310     g_assert_cmpint(ret, ==, 0);
 311
 312     setup_vm_with_server(&state1, nvectors, msi);
 313     s1 = &state1;
 314     setup_vm_with_server(&state2, nvectors, msi);
 315     s2 = &state2;
 316
 317     /* check state before server sends stuff */
 318     g_assert_cmpuint(in_reg(s1, IVPOSITION), ==, 0xffffffff);
 319     g_assert_cmpuint(in_reg(s2, IVPOSITION), ==, 0xffffffff);
 320     g_assert_cmpuint(qtest_readb(s1->qtest, (uintptr_t)s1->mem_base), ==, 0x00);
 321
 322     thread.server = &server;
 323     ret = pipe(thread.pipe);
 324     g_assert_cmpint(ret, ==, 0);
 325     thread.thread = g_thread_new("ivshmem-server", server_thread, &thread);
 326     g_assert(thread.thread != NULL);
 327
 328     /* waiting for devices to become operational */
 329     while (g_get_monotonic_time() < end_time) {
 330         g_usleep(1000);
 331         if ((int)in_reg(s1, IVPOSITION) >= 0 &&
 332             (int)in_reg(s2, IVPOSITION) >= 0) {
 333             break;
 334         }
 335     }
 336
 337     /* check got different VM ids */
 338     vm1 = in_reg(s1, IVPOSITION);
 339     vm2 = in_reg(s2, IVPOSITION);
 340     g_assert_cmpuint(vm1, !=, vm2);
 341
 342     global_qtest = s1->qtest;
 343     if (msi) {
 344         ret = qpci_msix_table_size(s1->dev);
 345         g_assert_cmpuint(ret, ==, nvectors);
 346     }
 347
 348     /* ping vm2 -> vm1 */
 349     if (msi) {
 350         ret = qpci_msix_pending(s1->dev, 0);
 351         g_assert_cmpuint(ret, ==, 0);
 352     } else {
 353         out_reg(s1, INTRSTATUS, 0);
 354     }
 355     out_reg(s2, DOORBELL, vm1 << 16);
 356     do {
 357         g_usleep(10000);
 358         ret = msi ? qpci_msix_pending(s1->dev, 0) : in_reg(s1, INTRSTATUS);
 359     } while (ret == 0 && g_get_monotonic_time() < end_time);
 360     g_assert_cmpuint(ret, !=, 0);
 361
 362     /* ping vm1 -> vm2 */
 363     global_qtest = s2->qtest;
 364     if (msi) {
 365         ret = qpci_msix_pending(s2->dev, 0);
 366         g_assert_cmpuint(ret, ==, 0);
 367     } else {
 368         out_reg(s2, INTRSTATUS, 0);
 369     }
 370     out_reg(s1, DOORBELL, vm2 << 16);
 371     do {
 372         g_usleep(10000);
 373         ret = msi ? qpci_msix_pending(s2->dev, 0) : in_reg(s2, INTRSTATUS);
 374     } while (ret == 0 && g_get_monotonic_time() < end_time);
 375     g_assert_cmpuint(ret, !=, 0);
 376
 377     cleanup_vm(s2);
 378     cleanup_vm(s1);
 379
 380     if (qemu_write_full(thread.pipe[1], "q", 1) != 1) {
 381         g_error("qemu_write_full: %s", g_strerror(errno));
 382     }
 383
 384     g_thread_join(thread.thread);
 385
 386     ivshmem_server_close(&server);
 387     close(thread.pipe[1]);
 388     close(thread.pipe[0]);
 389 }
 390
 391 static void test_ivshmem_server_msi(void)
 392 {
 393     test_ivshmem_server(true);
 394 }
 395
 396 static void test_ivshmem_server_irq(void)
 397 {
 398     test_ivshmem_server(false);
 399 }
 400
 401 #define PCI_SLOT_HP             0x06
 402
 403 static void test_ivshmem_hotplug(void)
 404 {
 405     gchar *opts;
 406
 407     qtest_start("");
 408
 409     opts = g_strdup_printf("'shm': '%s', 'size': '1M'", tmpshm);
 410
 411     qpci_plug_device_test("ivshmem", "iv1", PCI_SLOT_HP, opts);
 412     qpci_unplug_acpi_device_test("iv1", PCI_SLOT_HP);
 413
 414     qtest_end();
 415     g_free(opts);
 416 }
 417
 418 static void test_ivshmem_memdev(void)
 419 {
 420     IVState state;
 421
 422     /* just for the sake of checking memory-backend property */
 423     setup_vm_cmd(&state, "-object memory-backend-ram,size=1M,id=mb1"
 424                  " -device ivshmem,x-memdev=mb1", false);
 425
 426     cleanup_vm(&state);
 427 }
 428
 429 static void cleanup(void)
 430 {
 431     if (tmpshmem) {
 432         munmap(tmpshmem, TMPSHMSIZE);
 433         tmpshmem = NULL;
 434     }
 435
 436     if (tmpshm) {
 437         shm_unlink(tmpshm);
 438         g_free(tmpshm);
 439         tmpshm = NULL;
 440     }
 441
 442     if (tmpserver) {
 443         g_unlink(tmpserver);
 444         g_free(tmpserver);
 445         tmpserver = NULL;
 446     }
 447
 448     if (tmpdir) {
 449         g_rmdir(tmpdir);
 450         tmpdir = NULL;
 451     }
 452 }
 453
 454 static void abrt_handler(void *data)
 455 {
 456     cleanup();
 457 }
 458
 459 static gchar *mktempshm(int size, int *fd)
 460 {
 461     while (true) {
 462         gchar *name;
 463
 464         name = g_strdup_printf("/qtest-%u-%u", getpid(), g_random_int());
 465         *fd = shm_open(name, O_CREAT|O_RDWR|O_EXCL,
 466                        S_IRWXU|S_IRWXG|S_IRWXO);
 467         if (*fd > 0) {
 468             g_assert(ftruncate(*fd, size) == 0);
 469             return name;
 470         }
 471
 472         g_free(name);
 473
 474         if (errno != EEXIST) {
 475             perror("shm_open");
 476             return NULL;
 477         }
 478     }
 479 }
 480
 481 int main(int argc, char **argv)
 482 {
 483     int ret, fd;
 484     gchar dir[] = "/tmp/ivshmem-test.XXXXXX";
 485
 486 #if !GLIB_CHECK_VERSION(2, 31, 0)
 487     if (!g_thread_supported()) {
 488         g_thread_init(NULL);
 489     }
 490 #endif
 491
 492     g_test_init(&argc, &argv, NULL);
 493
 494     qtest_add_abrt_handler(abrt_handler, NULL);
 495     /* shm */
 496     tmpshm = mktempshm(TMPSHMSIZE, &fd);
 497     if (!tmpshm) {
 498         return 0;
 499     }
 500     tmpshmem = mmap(0, TMPSHMSIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
 501     g_assert(tmpshmem != MAP_FAILED);
 502     /* server */
 503     if (mkdtemp(dir) == NULL) {
 504         g_error("mkdtemp: %s", g_strerror(errno));
 505     }
 506     tmpdir = dir;
 507     tmpserver = g_strconcat(tmpdir, "/server", NULL);
 508
 509     qtest_add_func("/ivshmem/single", test_ivshmem_single);
 510     qtest_add_func("/ivshmem/hotplug", test_ivshmem_hotplug);
 511     qtest_add_func("/ivshmem/memdev", test_ivshmem_memdev);
 512     if (g_test_slow()) {
 513         qtest_add_func("/ivshmem/pair", test_ivshmem_pair);
 514         qtest_add_func("/ivshmem/server-msi", test_ivshmem_server_msi);
 515         qtest_add_func("/ivshmem/server-irq", test_ivshmem_server_irq);
 516     }
 517
 518     ret = g_test_run();
 519
 520     cleanup();
 521
 522     return ret;
 523 }