pseries: Fix some small errors in XICS logic
commite03c902cb617414dae49d77a810f6957ff7affac
authorDavid Gibson <david@gibson.dropbear.id.au>
Sun, 7 Apr 2013 19:08:21 +0000 (7 19:08 +0000)
committerAlexander Graf <agraf@suse.de>
Fri, 26 Apr 2013 21:02:41 +0000 (26 23:02 +0200)
tree89cfa89ace80401c09d4f6263f43f1ec97dc774e
parent702763fa322ea69dde92517735507e0ac3879b5d
pseries: Fix some small errors in XICS logic

Under certain circumstances the emulation for the pseries "XICS" interrupt
controller was clearing a pending interrupt from the XISR register, without
also clearing the corresponding priority variable.  This will cause
problems later when can trigger sanity checks in the under-development
in-kernel XICS implementation.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
hw/ppc/xics.c