| commit | a1bc20dfbb012ea2a5fb1228cb77abd04490fd79 | |
| author | Alexander Graf <agraf@suse.de> | |
| Mon, 8 Oct 2012 10:21:30 +0000 (8 12:21 +0200) | ||
| committer | Alexander Graf <agraf@suse.de> | |
| Mon, 29 Oct 2012 10:45:56 +0000 (29 11:45 +0100) | ||
| tree | 9ef704599b65f54a1e7e9703b2dab16f08f470c0 | treesnapshot (tar.gz zip) |
| parent | 626c7a171e644fbe1579516b8b794d611c295d2f | commitdiff |
PPC: e500: Map PIO space into core memory region
On PPC, we don't have PIO. So usually PIO space behind a PCI bridge is
accessible via MMIO. Do this mapping explicitly by mapping the PIO space
of our PCI bus into a memory region that lives in memory space.
Signed-off-by: Alexander Graf <agraf@suse.de>
On PPC, we don't have PIO. So usually PIO space behind a PCI bridge is
accessible via MMIO. Do this mapping explicitly by mapping the PIO space
of our PCI bus into a memory region that lives in memory space.
Signed-off-by: Alexander Graf <agraf@suse.de>
| hw/ppc/e500.c | diffblobblamehistory | |
| hw/ppce500_pci.c | diffblobblamehistory |