| 2019-02-21 | Richard Henderson | tcg: Remove TODO file Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Sven Schnelle | hw/hppa: forward requests to CPU HPA Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Sven Schnelle | target/hppa: fix dcor instruction Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Sven Schnelle | target/hppa: Fix addition '</<=' conditions Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Rearrange log conditions Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Sven Schnelle | target/hppa: move GETPC to HELPER() functions Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Merge translate_one into hppa_tr_translate_insn Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Convert fp operate insns Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Convert fp fused multiply-add insns Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Convert halt/reset insns Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Convert fp indexed memory insns Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Convert offset memory insns Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Convert arithmetic immediate insns Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Convert direct and indirect branches Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Convert shift, extract, deposit insns Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Convert conditional branches Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Convert fp multiply-add Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Convert indexed memory insns Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Convert arithmetic/logical insns Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Convert memory management insns Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Unify specializations of OR Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Convert remainder of system insns Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Convert move to/from system registers Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Begin using scripts/decodetree.py Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-12 | Richard Henderson | target/hppa: Use DisasContextBase.is_jmp Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-11 | Emilio G. Cota | cputlb: update TLB entry/index after tlb_fill Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-11 | Emilio G. Cota | exec-all: document that tlb_fill can trigger a TLB... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-11 | Mark Cave-Ayland | tcg/i386: fix unsigned vector saturating arithmetic Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-11 | Richard Henderson | tcg: Diagnose referenced labels that have not been... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-06 | Sven Schnelle | target/hppa: fix PSW Q bit behaviour to match hardware Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-06 | Sven Schnelle | target/hppa: fix setting registers via gdb Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-06 | Emilio G. Cota | target/hppa: use tb_cflags() to access tb->cflags Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-06 | Peter Maydell | accel/tcg: Consider cluster index in tb_lookup__cpu_state() Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-02-06 | Catherine Ho | tcg: add early clober modifier in atomic16_cmpxchg... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | cputlb: Remove static tlb sizing Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg/tci: enable dynamic TLB sizing Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg/mips: enable dynamic TLB sizing Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg/mips: Fix tcg_out_qemu_ld_slow_path Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg/arm: enable dynamic TLB sizing Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg/riscv: enable dynamic TLB sizing Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg/s390: enable dynamic TLB sizing Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg/sparc: enable dynamic TLB sizing Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg/ppc: enable dynamic TLB sizing Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg/aarch64: enable dynamic TLB sizing Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Emilio G. Cota | tcg/i386: enable dynamic TLB sizing Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Emilio G. Cota | tcg: introduce dynamic TLB sizing Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Emilio G. Cota | cputlb: do not evict empty entries to the vtlb Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg/aarch64: Implement vector minmax arithmetic Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg/aarch64: Implement vector saturating arithmetic Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg/i386: Implement vector minmax arithmetic Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg/i386: Implement vector saturating arithmetic Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg/i386: Split subroutines out of tcg_expand_vec_op Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg: Add opcodes for vector minmax arithmetic Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg: Add opcodes for vector saturated arithmetic Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg: Add write_aofs to GVecGen4 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg: Add gvec expanders for nand, nor, eqv Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-28 | Richard Henderson | tcg: Add logical simplifications during gvec expand Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-08 | Richard Henderson | pc-bios: Update palcode-clipper Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-07 | Richard Henderson | target/alpha: Fix user-only initialization of fpcr Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2019-01-07 | Peter Maydell | hw/alpha/typhoon: Stop calling cpu_unassigned_access() Tested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | tcg: Improve call argument loading Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | tcg: Record register preferences during liveness Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | tcg: Add TCG_OPF_BB_EXIT Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | tcg: Split out more subroutines from liveness_pass_1 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | tcg: Rename and adjust liveness_pass_1 helpers Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | tcg: Reindent parts of liveness_pass_1 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | tcg: Dump register preference info with liveness Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | tcg: Improve register allocation for matching constraints Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | tcg: Add output_pref to TCGOp Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | tcg: Add preferred_reg argument to tcg_reg_alloc_do_movi Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | tcg: Add preferred_reg argument to temp_sync Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | tcg: Add preferred_reg argument to temp_load Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | tcg: Add preferred_reg argument to tcg_reg_alloc Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | tcg: Add reachable_code_pass Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | tcg: Reference count labels Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | tcg: Add TCG_CALL_NO_RETURN Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | tcg: Renumber TCG_CALL_* flags Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | linux-user: Add safe_syscall for riscv64 host Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Richard Henderson | disas/microblaze: Remove unused REG_SP macro Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | configure: Add support for building RISC-V host Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | disas: Add RISC-V support Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | tcg: Add RISC-V cpu signal handler Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | tcg/riscv: Add the target init code Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | tcg/riscv: Add the prologue generation and register... Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | tcg/riscv: Add the out op decoder Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | tcg/riscv: Add direct load and store instructions Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | tcg/riscv: Add slowpath load and store instructions Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | tcg/riscv: Add branch and jump instructions Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | tcg/riscv: Add the add2 and sub2 instructions Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | tcg/riscv: Add the out load and store instructions Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | tcg/riscv: Add the extract instructions Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | tcg/riscv: Add the mov and movi instruction Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | tcg/riscv: Add the relocation functions Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | tcg/riscv: Add the instruction emitters Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | tcg/riscv: Add the immediate encoders Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | tcg/riscv: Add support for the constraints Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | tcg/riscv: Add the tcg target registers Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | tcg/riscv: Add the tcg-target.h file Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | exec: Add RISC-V GCC poison macro Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| 2018-12-25 | Alistair Francis | linux-user: Add host dependency for RISC-V 64-bit Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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