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target/ppc: use TCG_CALL_NO_RWG in vector helpers without env
2022-05-24
Bin Meng
hw/core: lo
a
d
er: Set
is_linux to true for
V
x
Works u
I
mage
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2022-05-24
Bin Meng
hw/cor
e
: Sync uboot_ima
g
e
.
h fr
o
m U-Boot v2
0
22
.
0
1
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2022-05-05
Bin Meng
t
arget/ppc:
Fix BookE
debu
g
i
nt
e
rrupt generation
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2022-04-29
B
i
n Meng
h
w
/
riscv: Do
n
't add e
m
pty bootargs
t
o
device tre
e
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2022-04-29
Bin
Meng
hw/riscv: spike:
A
d
d '/chosen/stdo
u
t-pa
t
h' in devi
c
e
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2022-04-22
Bin Meng
hw/core
:
t
c
g-c
p
u-ops
.
h:
Update com
m
ents
o
f d
e
bug_ch
e
ck_watch
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2022-04-22
Bin Meng
targ
e
t/ris
c
v
:
cpu: Ena
b
le native debug feature
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2022-04-22
Bin Meng
target/ris
c
v: machine: Add
d
ebug state description
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2022-04-22
Bin
M
e
ng
target/riscv: c
s
r: Hook debug CSR read/wr
i
te
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2022-04-22
Bin
Meng
target/r
i
scv: cpu: Add
a conf
i
g option for native debug
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2022-04-22
Bin
M
eng
target/riscv: debug: Implemen
t
debug re
l
ated
TCGCPU
O
ps
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2022-04-22
B
i
n
Meng
target/riscv: Add initial support for
t
h
e Sdtrig
e
x
t
ension
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2022-01-08
Bin M
e
n
g
roms/open
s
bi: Upgrade f
r
om v0
.
9 to v1
.
0
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-11-17
B
in
Me
n
g
target/riscv: machine: Sort the
.
subsections
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-10-22
Bin Meng
hw/ris
c
v: spike: Use Machi
n
eState::ra
m
and Mach
i
neClass
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-10-22
Bin Meng
hw/ris
c
v
: sifi
v
e_u: Use Mach
i
neState::ra
m
and M
a
ch
i
neClass
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-10-22
Bin Meng
hw/riscv:
sifive_e: Use MachineState::ram and Mac
h
ineClass
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-10-22
Bin
M
eng
hw/riscv: shakti_c: Use MachineState::ram and Ma
c
h
i
neClass
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-10-22
Bin Me
n
g
hw/riscv: open
t
itan: Use Machine
S
tate::r
a
m
and
M
achineCl
a
ss
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-10-22
Bin M
e
n
g
hw/riscv: microc
h
ip_pf
s
oc: Use MachineState::ram
and
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-10-06
Bin
Me
n
g
hw/
d
ma:
s
ifive_pdma: Don
'
t run DMA when channel
is
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-10-06
Bin Meng
hw/
d
ma
:
s
i
five_pdma: Fix Control
.
claim bit detectio
n
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-10-06
Bin
M
eng
hw/char: sifive_uart: Register device i
n
'input' c
a
te
g
ory
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-10-06
Bin Meng
h
w
/char: sha
k
ti_uart
:
R
egis
t
er
device
in
'
input' category
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-10-06
Bi
n
Meng
h
w
/
c
har
:
ibex_uart: Register device in 'input' category
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-09-30
Bin Meng
hw/intc: o
p
enpic: Cl
e
a
n
up the
styles
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-09-30
Bin
Meng
hw/
i
ntc: openpic: Drop Raven
related cod
e
s
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-09-30
Bin
Meng
hw
/
int
c
:
openpic: Co
r
r
e
ct the reset value
o
f IPIDR
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-09-21
Bin
M
eng
tar
g
e
t
/riscv: csr:
R
ename HCO
U
NTEREN_CY and friends
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-09-20
Bin Men
g
docs/
s
ystem/r
i
scv:
sifive_u: Upd
a
te
U-
B
oo
t
instructions
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-09-14
B
in Meng
tcg: Re
m
ov
e
tcg_glob
a
l_reg_new
d
efines
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-09-13
Bin M
e
ng
h
w
/char: ca
d
ence_uart: Log a gue
s
t error whe
n
device
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-09-13
Bin Me
n
g
hw/char: ca
d
e
n
ce_uart
:
Ignore a
c
cess when unclocked
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-09-13
Bin Meng
h
w/char: cadence_uart: Co
n
ve
r
t t
o
memop_
w
ith_attrs
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-09-13
Bi
n
M
e
ng
hw/c
h
a
r
: cadence_uart: Move clock/reset c
h
eck to
uart_can_re
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-09-13
Bin Meng
hw/char: cad
e
nce_uart:
Disable transmit when inp
u
t
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-09-13
Bin
Meng
h
w
/
misc
:
zynq_slcr: Correct
l
y compu
t
e
o
utput clock
s
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-09-01
Bin Meng
target/riscv: Correct
a
commen
t
in
risc
v
_csrrw
(
)
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-09-01
Bin Meng
hw/ri
s
cv: vir
t
: Move fla
s
h node to ro
o
t
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-07-14
Bin Meng
hw/riscv: sifi
v
e_u: Make sure
firmwa
r
e info is 8-byt
e
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-07-14
Bin
M
en
g
hw/riscv:
sifive_u: Correc
t
t
he CLINT timebase
frequenc
y
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-07-14
Bin
Meng
docs
/
system:
r
iscv: Update Microchip Ici
c
le Kit f
o
r
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-07-14
Bin Meng
docs/system: riscv: Add do
c
u
m
entation f
o
r v
i
rt
m
achine
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-07-14
Bin
M
eng
docs/sy
s
tem:
r
is
c
v: Fix CLINT na
m
e
in the s
i
five_u doc
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-07-14
B
in Meng
target/riscv:
c
sr: Remove redundant c
h
eck i
n
fp csr
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-07-14
Bin M
e
n
g
t
a
rget/
r
iscv: pmp: Fix
some typos
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-07-09
Bin
M
eng
d
o
c
s
/
s
y
stem: ppc: Upda
t
e ppce5
0
0
do
c
u
mentat
i
o
n
with
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-07-09
Bin Meng
roms/u-boot: Bump pp
c
e500 u-boot
to v
2
0
2
1
.
07
t
o
add
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-06-24
Bi
n
M
e
ng
target/riscv: gd
b
stub:
F
i
x
d
ynam
i
c CSR XML generation
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-06-07
Bin
Meng
targe
t
/riscv: R
e
move
u
nnecessary
r
i
scv_*_names[] declaration
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-06-07
Bin Meng
h
w/riscv: m
i
crochi
p
_pfs
o
c: Suppo
r
t direct kernel boot
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-06-07
Bin
Men
g
hw/r
i
scv
:
Use macros for
B
IOS
i
mage names
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-06-07
B
i
n
Meng
docs/
s
ys
t
em
/
riscv: sifive_u:
D
oc
u
ment '-dtb' usage
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-06-07
Bin Me
n
g
docs/system/
r
is
c
v: Co
r
r
e
ct the indenta
t
i
on lev
e
l of
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-06-07
Bin
Me
n
g
hw/riscv: Supp
o
rt the officia
l
PLIC DT bi
n
dings
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-06-07
Bin Meng
hw/ri
s
cv: Sup
p
ort th
e
official CLINT
D
T bindings
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-06-07
Bin Meng
hw/ris
c
v: vi
r
t
:
Switch to use qemu_fdt_setprop_stri
n
g_array
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-06-07
Bin
Meng
hw/riscv: sifi
v
e_u: Swi
t
ch
t
o
u
s
e
qemu
_
fdt_setprop_string_ar
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-05-11
Bin
Meng
hw/risc
v
:
s
if
i
ve_e: Ad
d
'const' to sifive_e_memma
p
[]
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-05-04
Bin
Meng
docs/syste
m
: ppc: Add docum
e
ntation for
p
pce500 machine
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-05-04
Bin Meng
ro
m
s/
u
-boot:
B
um
p
pp
c
e
5
00
u-boot
to v202
1
.
04 to f
i
x
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-05-04
B
i
n Meng
r
oms/Makefile: Update ppce500 u-boot bu
i
ld directory
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-03-31
B
in
Meng
hw/net: fsl_etsec: Tx padding
l
e
ngth shoul
d
exclu
d
e CRC
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-03-31
B
i
n M
e
ng
h
w/ppc:
e
500: Ad
d
missing #address-c
e
lls and #
s
ize
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-23
Bin Meng
docs/
s
yst
e
m: ri
s
cv
:
Ad
d
documentation fo
r
'mi
c
rochi
p
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-23
Bin Men
g
hw/riscv
:
m
i
crochip_pfsoc: Ma
p
E
MMC/S
D
mux r
e
giste
r
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-23
Bin Meng
h
w
/
bloc
k
: m25p80: Sup
p
ort fast read for
S
ST flas
h
es
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-22
Bin
M
e
ng
hw/sd: sdhci: R
e
set the data pointe
r
of s->fifo_buffer
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-03-22
B
i
n Meng
h
w
/sd: sdhci: Limit bloc
k
size only when
S
D
H
C_BLK
S
IZE
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-03-22
Bin Me
n
g
hw/sd:
sdhci
:
Correctl
y
set the
controller status for
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-03-22
Bin
Meng
hw/sd
:
sdhci:
D
on't w
r
ite to
SDHC_SYSAD regist
e
r
when
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-03-22
B
i
n
M
eng
hw/sd: sdhci: Don't
t
ransfer any da
t
a wh
e
n command
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-03-22
Bin Men
g
h
w
/
s
d: sd: Actually perform the erase
o
p
eration
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-22
Bi
n
Meng
h
w/s
d
: sd: Fix build er
r
or w
h
en
D
EBUG_SD is on
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-22
B
in M
e
ng
hw/
n
et:
v
irtio-net: Ini
t
i
a
lize nc
-
>do_
n
o
t_pad
t
o
t
r
u
e
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-03-22
B
i
n Meng
net: Pa
d
shor
t
fr
a
mes to minimum size before sendi
n
g
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-03-22
Bin
M
en
g
net: Add a '
d
o_not_pad"
t
o Ne
t
ClientState
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
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tree
2021-03-22
Bin Meng
n
et:
e
th:
A
dd a helper
t
o
pad a sh
o
rt E
t
hernet
frame
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
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commitdiff
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tree
2021-03-15
B
i
n Me
n
g
n
e
t: Fix
b
uild er
r
or
w
hen DEBUG_NET is on
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
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tree
2021-03-09
Bin Meng
h
w
/
pp
c
: e500: Add
m
iss
i
ng <ran
g
es> in the eT
S
EC
node
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
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tree
2021-03-09
B
i
n Meng
hw/net: fsl_etsec: Fix
build error when HE
X
_DUMP
i
s
o
n
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
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tree
2021-03-04
Bin Me
n
g
h
w/r
i
scv: virt: Map
hi
g
h mmio for PCIe
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
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tree
2021-03-04
Bin Meng
hw/riscv: v
i
rt
:
L
imit RA
M
size in
a
3
2
-bit sys
t
em
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
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tree
2021-03-04
Bin Meng
h
w
/riscv: virt:
Drop the 'link_up' par
a
meter of gpex_pcie_init()
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
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tree
2021-03-04
Bin Meng
h
w/risc
v
:
Drop 'struct
MemmapEntry'
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
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tree
2021-03-04
Bin
Meng
docs/sy
s
tem: ris
c
v:
A
dd documenta
t
ion for sifi
v
e_u
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
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tree
2021-03-04
Bin Meng
doc
s
/system: Add RISC-V documentation
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-04
Bin Meng
docs/system:
S
o
rt targets in a
l
phabeti
c
al
order
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
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tree
2021-03-04
Bin Meng
hw/riscv:
s
ifive
_
u: Change SIF
I
VE
_
U_GEM_IRQ to decima
l
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-04
B
i
n
Meng
hw/
r
i
scv: sifive_u:
Add QSPI2 controller and connect
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
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commitdiff
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tree
2021-03-04
Bin
M
eng
hw/r
i
scv: sifive_u: Add Q
S
PI0
c
o
ntroller an
d
connect
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-04
B
i
n Meng
hw/ssi: Ad
d
SiFive
SPI controller support
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-04
Bin Meng
hw/block
:
m25p80: Add various
I
SS
I
flash i
n
f
ormation
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-04
Bin Meng
hw/bl
o
ck: m25p80: Add ISSI SPI flash support
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-04
B
in Meng
roms/opens
b
i: Upgrad
e
from
v0
.
8 to v0
.
9
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-04
Bin
M
eng
hw/misc: sif
i
ve_
u
_otp: Use er
r
or
_
report
(
) when blo
c
k
.
.
.
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-04
B
in
Meng
targ
e
t/ri
s
cv: Declare csr_ops[] with a known size
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-02-21
Bin
Men
g
hw/m
i
ps: loon
g
so
n
3:
D
r
o
p 'st
r
uct MemmapEntry'
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
commit
|
commitdiff
|
tree
2021-02-19
Bin
M
e
n
g
hw
/
s
d: sdhci: Simplif
y
updat
i
ng s->prnsts in sdhci_sdma_tran
.
.
.
Signed-off-by:
Bin Meng
<bmeng.cn@gmail.com>
commit
|
commitdiff
|
tree
2021-02-19
Bin Meng
hw/
s
d:
sd:
B
ypass the RC
A
check for CMD13 in SP
I
m
o
de
Signed-off-by:
Bin Meng
<bin.meng@windriver.com>
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