2021-06-03 |
Richard Henderson | softfpu: Add float_round_to_odd_inf Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-06-03 |
Richard Henderson | target/arm: Implement vector float32 to bfloat16 conversion Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-06-03 |
Richard Henderson | target/arm: Implement scalar float32 to bfloat16 conversion Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-06-03 |
Richard Henderson | target/arm: Unify unallocated path in disas_fp_1src Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-06-03 |
Richard Henderson | target/arm: Add isar_feature_{aa32, aa64, aa64_sve... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-06-03 |
Richard Henderson | target/arm: Mark LDS{MIN,MAX} as signed operations Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-06-03 |
Richard Henderson | target/ppc: Implement prefixed integer store instructions Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-06-03 |
Richard Henderson | target/ppc: Move D/DS/X-form integer stores to decodetree Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-06-03 |
Richard Henderson | target/ppc: Implement prefixed integer load instructions Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-06-03 |
Richard Henderson | target/ppc: Move D/DS/X-form integer loads to decodetree Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-06-03 |
Richard Henderson | target/ppc: Implement PNOP Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-06-03 |
Richard Henderson | target/ppc: Move ADDI, ADDIS to decodetree, implement... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-06-03 |
Richard Henderson | target/ppc: Add infrastructure for prefixed insns Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-06-03 |
Richard Henderson | target/ppc: Move page crossing check to ppc_tr_translate_insn Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-06-03 |
Richard Henderson | target/ppc: Introduce macros to check isa extensions Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-27 |
Richard Henderson | gitlab: Enable cross-i386 builds of TCI Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-27 |
Richard Henderson | gitlab: Rename ACCEL_CONFIGURE_OPTS to EXTRA_CONFIGURE_OPTS Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-26 |
Richard Henderson | hw/core: Constify TCGCPUOps Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-26 |
Richard Henderson | target/mips: Fold jazz behaviour into mips_cpu_do_transactio... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Enable SVE2 and related extensions Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | linux-user/aarch64: Enable hwcap bits for sve2 and... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement integer matrix multiply accumulate Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement aarch32 VSUDOT, VUSDOT Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Split decode of VSDOT and VUDOT Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Split out do_neon_ddda Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Fix decode for VDOT (indexed) Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Remove unused fpst from VDOT_scalar Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Split out do_neon_ddda_fpst Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement aarch64 SUDOT, USDOT Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Move endian adjustment macros to vec_internal.h Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement 128-bit ZIP, UZP, TRN Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 LD1RO Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Tidy do_ldrq Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Share table of sve load functions Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 FCVTNT Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 crypto constructive binary... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 crypto destructive binary... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 crypto unary operations Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE mixed sign dot product Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE mixed sign dot product (indexed) Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Macroize helper_gvec_{s,u}dot_idx_{b,h} Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Macroize helper_gvec_{s,u}dot_{b,h} Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 complex integer dot product Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 complex integer multiply... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 integer multiply long (indexed) Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 multiply-add long (indexed) Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 saturating multiply high... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 signed saturating doubling... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 saturating multiply (indexed) Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 saturating multiply-add... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 saturating multiply-add... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 integer multiply-add (indexed) Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 integer multiply (indexed) Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Split out formats for 3 vectors + 1 index Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Split out formats for 2 vectors + 1 index Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Pass separate addend to FCMLA helpers Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Pass separate addend to {U, S}DOT helpers Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Use correct output type for gvec_sdot_*_b Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 XAR Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 complex integer multiply-add Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 integer multiply-add long Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 saturating multiply-add... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 saturating multiply-add... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 bitwise ternary operations Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 WHILERW, WHILEWR Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 WHILEGT, WHILEGE, WHILEHI... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 SQSHRN, SQRSHRN Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 UQSHRN, UQRSHRN Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 SQSHRUN, SQRSHRUN Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 SHRN, RSHRN Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 saturating extract narrow Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 integer absolute difference... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 bitwise shift and insert Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 bitwise shift right and... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 integer add/subtract long... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 integer absolute difference... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 complex integer add Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 bitwise permute Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 bitwise exclusive-or interleaved Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 bitwise shift left long Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 PMULLB, PMULLT Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 integer multiply long Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 integer add/subtract wide Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 integer add/subtract interleaved... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 integer add/subtract long Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 saturating add/subtract... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 integer pairwise arithmetic Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 integer halving add/subtract... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 saturating/rounding bitwise... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Split out saturating/rounding shifts from... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 integer unary operations... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 integer pairwise add and... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Implement SVE2 Integer Multiply - Unpredicated Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | target/arm: Add ID_AA64ZFR0 fields and isar_feature_aa64_sve2 Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | accel/tlb: Rename tlb_flush_[page_bits > range]_by_mmuidx_as... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | accel/tcg: Rename tlb_flush_page_bits -> range]_by_mmuidx_as... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | accel/tlb: Add tlb_flush_range_by_mmuidx_all_cpus_synced() Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | accel/tcg: Add tlb_flush_range_by_mmuidx_all_cpus() Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | accel/tcg: Add tlb_flush_range_by_mmuidx() Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2021-05-25 |
Richard Henderson | accel/tcg: Remove {encode,decode}_pbm_to_runon Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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