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target/riscv: cpu: Add a config option for native debug
2022-04-22 Bin Mengtarget/riscv: cpu: Add a config option for native debug
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2022-04-22 Bin Mengtarget/riscv: debug: Implement debug related TCGCPUOps
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2022-04-22 Bin Mengtarget/riscv: Add initial support for the Sdtrig extension
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2022-01-08 Bin Mengroms/opensbi: Upgrade from v0.9 to v1.0
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-11-17 Bin Mengtarget/riscv: machine: Sort the .subsections
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-10-22 Bin Menghw/riscv: spike: Use MachineState::ram and MachineClass...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-10-22 Bin Menghw/riscv: sifive_u: Use MachineState::ram and MachineClass...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-10-22 Bin Menghw/riscv: sifive_e: Use MachineState::ram and MachineClass...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-10-22 Bin Menghw/riscv: shakti_c: Use MachineState::ram and MachineClass...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-10-22 Bin Menghw/riscv: opentitan: Use MachineState::ram and MachineClass...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-10-22 Bin Menghw/riscv: microchip_pfsoc: Use MachineState::ram and...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-10-06 Bin Menghw/dma: sifive_pdma: Don't run DMA when channel is...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-10-06 Bin Menghw/dma: sifive_pdma: Fix Control.claim bit detection
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-10-06 Bin Menghw/char: sifive_uart: Register device in 'input' category
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-10-06 Bin Menghw/char: shakti_uart: Register device in 'input' category
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-10-06 Bin Menghw/char: ibex_uart: Register device in 'input' category
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-09-30 Bin Menghw/intc: openpic: Clean up the styles
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-09-30 Bin Menghw/intc: openpic: Drop Raven related codes
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-09-30 Bin Menghw/intc: openpic: Correct the reset value of IPIDR...
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-09-21 Bin Mengtarget/riscv: csr: Rename HCOUNTEREN_CY and friends
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-09-20 Bin Mengdocs/system/riscv: sifive_u: Update U-Boot instructions
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-09-14 Bin Mengtcg: Remove tcg_global_reg_new defines
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-09-13 Bin Menghw/char: cadence_uart: Log a guest error when device...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-09-13 Bin Menghw/char: cadence_uart: Ignore access when unclocked...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-09-13 Bin Menghw/char: cadence_uart: Convert to memop_with_attrs...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-09-13 Bin Menghw/char: cadence_uart: Move clock/reset check to uart_can_re...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-09-13 Bin Menghw/char: cadence_uart: Disable transmit when input...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-09-13 Bin Menghw/misc: zynq_slcr: Correctly compute output clocks...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-09-01 Bin Mengtarget/riscv: Correct a comment in riscv_csrrw()
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-09-01 Bin Menghw/riscv: virt: Move flash node to root
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-07-14 Bin Menghw/riscv: sifive_u: Make sure firmware info is 8-byte...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-07-14 Bin Menghw/riscv: sifive_u: Correct the CLINT timebase frequency
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-07-14 Bin Mengdocs/system: riscv: Update Microchip Icicle Kit for...
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-07-14 Bin Mengdocs/system: riscv: Add documentation for virt machine
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-07-14 Bin Mengdocs/system: riscv: Fix CLINT name in the sifive_u doc
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-07-14 Bin Mengtarget/riscv: csr: Remove redundant check in fp csr...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-07-14 Bin Mengtarget/riscv: pmp: Fix some typos
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-07-09 Bin Mengdocs/system: ppc: Update ppce500 documentation with...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-07-09 Bin Mengroms/u-boot: Bump ppce500 u-boot to v2021.07 to add...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-06-24 Bin Mengtarget/riscv: gdbstub: Fix dynamic CSR XML generation
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-06-07 Bin Mengtarget/riscv: Remove unnecessary riscv_*_names[] declaration
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-06-07 Bin Menghw/riscv: microchip_pfsoc: Support direct kernel boot
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-06-07 Bin Menghw/riscv: Use macros for BIOS image names
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-06-07 Bin Mengdocs/system/riscv: sifive_u: Document '-dtb' usage
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-06-07 Bin Mengdocs/system/riscv: Correct the indentation level of...
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-06-07 Bin Menghw/riscv: Support the official PLIC DT bindings
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-06-07 Bin Menghw/riscv: Support the official CLINT DT bindings
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-06-07 Bin Menghw/riscv: virt: Switch to use qemu_fdt_setprop_string_array...
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-06-07 Bin Menghw/riscv: sifive_u: Switch to use qemu_fdt_setprop_string_ar...
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-05-11 Bin Menghw/riscv: sifive_e: Add 'const' to sifive_e_memmap[]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-05-04 Bin Mengdocs/system: ppc: Add documentation for ppce500 machine
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-05-04 Bin Mengroms/u-boot: Bump ppce500 u-boot to v2021.04 to fix...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-05-04 Bin Mengroms/Makefile: Update ppce500 u-boot build directory...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-03-31 Bin Menghw/net: fsl_etsec: Tx padding length should exclude CRC
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-03-31 Bin Menghw/ppc: e500: Add missing #address-cells and #size...
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-23 Bin Mengdocs/system: riscv: Add documentation for 'microchip...
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-23 Bin Menghw/riscv: microchip_pfsoc: Map EMMC/SD mux register
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-23 Bin Menghw/block: m25p80: Support fast read for SST flashes
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-22 Bin Menghw/sd: sdhci: Reset the data pointer of s->fifo_buffer...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-03-22 Bin Menghw/sd: sdhci: Limit block size only when SDHC_BLKSIZE...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-03-22 Bin Menghw/sd: sdhci: Correctly set the controller status for...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-03-22 Bin Menghw/sd: sdhci: Don't write to SDHC_SYSAD register when...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-03-22 Bin Menghw/sd: sdhci: Don't transfer any data when command...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-03-22 Bin Menghw/sd: sd: Actually perform the erase operation
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-22 Bin Menghw/sd: sd: Fix build error when DEBUG_SD is on
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-22 Bin Menghw/net: virtio-net: Initialize nc->do_not_pad to true
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-03-22 Bin Mengnet: Pad short frames to minimum size before sending...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-03-22 Bin Mengnet: Add a 'do_not_pad" to NetClientState
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-03-22 Bin Mengnet: eth: Add a helper to pad a short Ethernet frame
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-03-15 Bin Mengnet: Fix build error when DEBUG_NET is on
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-09 Bin Menghw/ppc: e500: Add missing <ranges> in the eTSEC node
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-09 Bin Menghw/net: fsl_etsec: Fix build error when HEX_DUMP is on
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-04 Bin Menghw/riscv: virt: Map high mmio for PCIe
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-04 Bin Menghw/riscv: virt: Limit RAM size in a 32-bit system
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-04 Bin Menghw/riscv: virt: Drop the 'link_up' parameter of gpex_pcie_init()
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-04 Bin Menghw/riscv: Drop 'struct MemmapEntry'
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-04 Bin Mengdocs/system: riscv: Add documentation for sifive_u...
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-04 Bin Mengdocs/system: Add RISC-V documentation
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-04 Bin Mengdocs/system: Sort targets in alphabetical order
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-04 Bin Menghw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal...
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-04 Bin Menghw/riscv: sifive_u: Add QSPI2 controller and connect...
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-04 Bin Menghw/riscv: sifive_u: Add QSPI0 controller and connect...
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-04 Bin Menghw/ssi: Add SiFive SPI controller support
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-04 Bin Menghw/block: m25p80: Add various ISSI flash information
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-04 Bin Menghw/block: m25p80: Add ISSI SPI flash support
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-04 Bin Mengroms/opensbi: Upgrade from v0.8 to v0.9
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-04 Bin Menghw/misc: sifive_u_otp: Use error_report() when block...
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-03-04 Bin Mengtarget/riscv: Declare csr_ops[] with a known size
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-02-21 Bin Menghw/mips: loongson3: Drop 'struct MemmapEntry'
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-02-19 Bin Menghw/sd: sdhci: Simplify updating s->prnsts in sdhci_sdma_tran...
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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2021-02-19 Bin Menghw/sd: sd: Bypass the RCA check for CMD13 in SPI mode
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-02-19 Bin Menghw/sd: sd: Skip write protect groups check in CMD24...
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-02-19 Bin Menghw/sd: sd: Skip write protect groups check in sd_erase...
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-02-19 Bin Menghw/sd: sd: Move the sd_block_{read, write} and macros...
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-02-19 Bin Menghw/sd: sd: Fix CMD30 response type
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-02-19 Bin Menghw/sd: sd: Only SDSC cards support CMD28/29/30
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-02-19 Bin Menghw/sd: sd: Fix address check in sd_erase()
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-02-19 Bin Menghw/sd: ssi-sd: Handle the rest commands with R1b response...
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-02-19 Bin Menghw/sd: ssi-sd: Fix STOP_TRANSMISSION (CMD12) response
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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2021-02-19 Bin Menghw/sd: ssi-sd: Fix SEND_IF_COND (CMD8) response
Signed-off-by: Bin Meng <bin.meng@windriver.com>
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