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target-tricore: fix OPC2_32_RR_DVINIT_HU having write before use on the result
2015-05-30 Bastian Koppelmanntarget-tricore: fix OPC2_32_RR_DVINIT_HU having write...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-05-22 Bastian Koppelmanntarget-tricore: add RR_DIV and RR_DIV_U instructions...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-05-22 Bastian Koppelmanntarget-tricore: add FRET instructions of the v1.6 ISA
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-05-22 Bastian Koppelmanntarget-tricore: add FCALL instructions of the v1.6 ISA
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-05-22 Bastian Koppelmanntarget-tricore: add SYS_RESTORE instruction of the...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-05-22 Bastian Koppelmanntarget-tricore: add RR_CRC32 instruction of the v1...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-05-22 Bastian Koppelmanntarget-tricore: add SWAPMSK instructions of the v1...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-05-22 Bastian Koppelmanntarget-tricore: add CMPSWP instructions of the v1.6...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-05-22 Bastian Koppelmanntarget-tricore: Add SRC_MOV_E instruction of the v1...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-05-22 Bastian Koppelmanntarget-tricore: introduce ISA v1.6.1 feature
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-05-22 Bastian Koppelmanntarget-tricore: Add ISA v1.3.1 cpu and fix tc1796 to...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-05-11 Bastian Koppelmanntarget-tricore: fix rfe not restoring the PC
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-05-11 Bastian Koppelmanntarget-tricore: fix rslcx restoring the upper context...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-05-11 Bastian Koppelmanntarget-tricore: fix BO_OFF10_SEXT calculating the wrong...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-05-11 Bastian Koppelmanntarget-tricore: fix SLR_LD_W and SLR_LD_W_POSTINC insn...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-05-11 Bastian Koppelmanntarget-tricore: Fix LOOP using wrong register for compare
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-03-30 Bastian Koppelmanntarget-tricore: fix CACHEA/I_POSTINC/PREINC using data...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-03-24 Bastian Koppelmanntarget-tricore: properly fix dvinit_b/h_13
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-03-24 Bastian Koppelmanntarget-tricore: fix RRPW_DEXTR using wrong reg
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-03-24 Bastian Koppelmanntarget-tricore: fix DVINIT_HU/BU calculating overflow...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-03-16 Bastian Koppelmanntarget-tricore: Add instructions of SYS opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-03-16 Bastian Koppelmanntarget-tricore: Add instructions of RRRW opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-03-16 Bastian Koppelmanntarget-tricore: Add instructions of RRRR opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-03-16 Bastian Koppelmanntarget-tricore: Add instructions of RRR1 opcode format...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-03-16 Bastian Koppelmanntarget-tricore: Add instructions of RRR1 opcode format...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-03-16 Bastian Koppelmanntarget-tricore: Add instructions of RRR1 opcode format...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-03-03 Bastian Koppelmanntarget-tricore: Add instructions of RRR1 opcode format...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-03-03 Bastian Koppelmanntarget-tricore: Add instructions of RRR1 opcode format...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-03-03 Bastian Koppelmanntarget-tricore: Add instructions of RRR1 opcode format...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-03-03 Bastian Koppelmanntarget-tricore: Add instructions of RRR2 opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-03-03 Bastian Koppelmanntarget-tricore: fix msub32_suov return wrong results
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-03-03 Bastian Koppelmanntarget-tricore: Fix RLC_ADDI, RLC_ADDIH using wrong...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-01-27 Bastian Koppelmanntarget-tricore: Add instructions of RRR opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-01-27 Bastian Koppelmanntarget-tricore: Add instructions of RRPW opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-01-27 Bastian Koppelmanntarget-tricore: Add instructions of RR2 opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-01-27 Bastian Koppelmanntarget-tricore: Add instructions of RR1 opcode format...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-01-26 Bastian Koppelmanntarget-tricore: split up suov32 into suov32_pos and...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-01-26 Bastian Koppelmanntarget-tricore: Fix bugs found by coverity
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-01-26 Bastian Koppelmanntarget-tricore: calculate av bits before saturation
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2015-01-26 Bastian Koppelmanntarget-tricore: Several translator and cpu model fixes
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-21 Bastian Koppelmanntarget-tricore: Add instructions of RR1 opcode format...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-21 Bastian Koppelmanntarget-tricore: Fix MFCR/MTCR insn and B format offset.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-21 Bastian Koppelmanntarget-tricore: Add missing 1.6 insn of BOL opcode...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-21 Bastian Koppelmanntarget-tricore: Add instructions of RR opcode format...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-21 Bastian Koppelmanntarget-tricore: Add instructions of RR opcode format...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-21 Bastian Koppelmanntarget-tricore: Add instructions of RR opcode format...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-21 Bastian Koppelmanntarget-tricore: Add instructions of RR opcode format...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-21 Bastian Koppelmanntarget-tricore: Change SSOV/SUOV makro name to SSOV32...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-21 Bastian Koppelmanntarget-tricore: Fix mask handling JNZ.T being 7 bit...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-10 Bastian Koppelmanntarget-tricore: Add instructions of RCR opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-10 Bastian Koppelmanntarget-tricore: Add instructions of RLC opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-10 Bastian Koppelmanntarget-tricore: Add instructions of RCPW, RCRR and...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-10 Bastian Koppelmanntarget-tricore: Make TRICORE_FEATURES implying others.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-10 Bastian Koppelmanntarget-tricore: Add instructions of RC opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-10 Bastian Koppelmanntarget-tricore: Add instructions of BRR opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-10 Bastian Koppelmanntarget-tricore: Add instructions of BRN opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-10 Bastian Koppelmanntarget-tricore: Add instructions of BRC opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-12-10 Bastian Koppelmanntarget-tricore: Add instructions of BOL opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-10-20 Bastian Koppelmanntarget-tricore: Add instructions of BO opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-10-20 Bastian Koppelmanntarget-tricore: Add instructions of BIT opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-10-20 Bastian Koppelmanntarget-tricore: Add instructions of B opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-10-20 Bastian Koppelmanntarget-tricore: Add instructions of ABS, ABSB opcode...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-10-20 Bastian Koppelmanntarget-tricore: Cleanup and Bugfixes
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-09-22 Bastian Koppelmannarch_init: Setting QEMU_ARCH enum straight
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-09-01 Bastian Koppelmanntarget-tricore: Add instructions of SR opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-09-01 Bastian Koppelmanntarget-tricore: Add instructions of SLR, SSRO and SRO...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-09-01 Bastian Koppelmanntarget-tricore: Add instructions of SC opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-09-01 Bastian Koppelmanntarget-tricore: Add instructions of SBR opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-09-01 Bastian Koppelmanntarget-tricore: Add instructions of SBC and SBRN opcode...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-09-01 Bastian Koppelmanntarget-tricore: Add instructions of SB opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-09-01 Bastian Koppelmanntarget-tricore: Add instructions of SRRS and SLRO opcode...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-09-01 Bastian Koppelmanntarget-tricore: Add instructions of SSR opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-09-01 Bastian Koppelmanntarget-tricore: Add instructions of SRR opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-09-01 Bastian Koppelmanntarget-tricore: Add instructions of SRC opcode format
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-09-01 Bastian Koppelmanntarget-tricore: Add masks and opcodes for decoding
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-09-01 Bastian Koppelmanntarget-tricore: Add initialization for translation...
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-09-01 Bastian Koppelmanntarget-tricore: Add softmmu support
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-09-01 Bastian Koppelmanntarget-tricore: Add board for systemmode
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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2014-09-01 Bastian Koppelmanntarget-tricore: Add target stubs and qom-cpu
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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QEmu